lab 6
Dependencies: ADXL362 mbed MPL3115A2
main.cpp@20:8d93acd1f8cd, 2018-02-23 (annotated)
- Committer:
- htdoughe
- Date:
- Fri Feb 23 17:46:12 2018 +0000
- Revision:
- 20:8d93acd1f8cd
- Parent:
- 19:51b2b42a82f1
- Child:
- 21:b85d1a4f0373
full of errors but i have registers mapped
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
rmneubau | 0:0f663d16e8a2 | 1 | #include "mbed.h" |
rmneubau | 0:0f663d16e8a2 | 2 | #include "ADXL362.h" |
htdoughe | 4:8065ca897f8b | 3 | #include "string.h" |
htdoughe | 16:993757c8b398 | 4 | #include "MPL3115A2.h" |
htdoughe | 9:a14593af628d | 5 | |
htdoughe | 18:216cc41b55f3 | 6 | DigitalOut led3(LED3); |
htdoughe | 4:8065ca897f8b | 7 | |
htdoughe | 16:993757c8b398 | 8 | //map of register values and names for the adxl |
htdoughe | 20:8d93acd1f8cd | 9 | int aregids[34]; |
htdoughe | 20:8d93acd1f8cd | 10 | char* aregnames[34]; |
htdoughe | 20:8d93acd1f8cd | 11 | //populating the map |
htdoughe | 20:8d93acd1f8cd | 12 | void initmap() { |
htdoughe | 20:8d93acd1f8cd | 13 | aregids[0] = 0x00; |
htdoughe | 20:8d93acd1f8cd | 14 | aregids[1] = 0x01; |
htdoughe | 20:8d93acd1f8cd | 15 | aregids[2] = 0x02; |
htdoughe | 20:8d93acd1f8cd | 16 | aregids[3] = 0x03; |
htdoughe | 20:8d93acd1f8cd | 17 | aregids[4] = 0x08; |
htdoughe | 20:8d93acd1f8cd | 18 | aregids[5] = 0x09; |
htdoughe | 20:8d93acd1f8cd | 19 | aregids[6] = 0x0A; |
htdoughe | 20:8d93acd1f8cd | 20 | aregids[7] = 0x0B; |
htdoughe | 20:8d93acd1f8cd | 21 | aregids[8] = 0x0c; |
htdoughe | 20:8d93acd1f8cd | 22 | aregids[9] = 0x0D; |
htdoughe | 20:8d93acd1f8cd | 23 | aregids[10] = 0x0E; |
htdoughe | 20:8d93acd1f8cd | 24 | aregids[11] = 0x0F; |
htdoughe | 20:8d93acd1f8cd | 25 | aregids[12] = 0x10; |
htdoughe | 20:8d93acd1f8cd | 26 | aregids[13] = 0x11; |
htdoughe | 20:8d93acd1f8cd | 27 | aregids[14] = 0x12; |
htdoughe | 20:8d93acd1f8cd | 28 | aregids[15] = 0x13; |
htdoughe | 20:8d93acd1f8cd | 29 | aregids[16] = 0x14; |
htdoughe | 20:8d93acd1f8cd | 30 | aregids[17] = 0x15; |
htdoughe | 20:8d93acd1f8cd | 31 | aregids[18] = 0x1F; |
htdoughe | 20:8d93acd1f8cd | 32 | aregids[19] = 0x20; |
htdoughe | 20:8d93acd1f8cd | 33 | aregids[20] = 0x21; |
htdoughe | 20:8d93acd1f8cd | 34 | aregids[21] = 0x22; |
htdoughe | 20:8d93acd1f8cd | 35 | aregids[22] = 0x23; |
htdoughe | 20:8d93acd1f8cd | 36 | aregids[23] = 0x24; |
htdoughe | 20:8d93acd1f8cd | 37 | aregids[24] = 0x25; |
htdoughe | 20:8d93acd1f8cd | 38 | aregids[25] = 0x26; |
htdoughe | 20:8d93acd1f8cd | 39 | aregids[26] = 0x27; |
htdoughe | 20:8d93acd1f8cd | 40 | aregids[27] = 0x28; |
htdoughe | 20:8d93acd1f8cd | 41 | aregids[28] = 0x29; |
htdoughe | 20:8d93acd1f8cd | 42 | aregids[29] = 0x2A; |
htdoughe | 20:8d93acd1f8cd | 43 | aregids[30] = 0x2B; |
htdoughe | 20:8d93acd1f8cd | 44 | aregids[31] = 0x2C; |
htdoughe | 20:8d93acd1f8cd | 45 | aregids[32] = 0x2D; |
htdoughe | 20:8d93acd1f8cd | 46 | aregids[33] = 0x2E; |
htdoughe | 20:8d93acd1f8cd | 47 | |
htdoughe | 20:8d93acd1f8cd | 48 | aregnames[0] = "DEVID_AD"; |
htdoughe | 20:8d93acd1f8cd | 49 | aregnames[1] = "DEVID_MST"; |
htdoughe | 20:8d93acd1f8cd | 50 | aregnames[2] = "PARTID"; |
htdoughe | 20:8d93acd1f8cd | 51 | aregnames[3] = "REVID"; |
htdoughe | 20:8d93acd1f8cd | 52 | aregnames[4] = "XDATA"; |
htdoughe | 20:8d93acd1f8cd | 53 | aregnames[5] = "YDATA"; |
htdoughe | 20:8d93acd1f8cd | 54 | aregnames[6] = "ZDATA"; |
htdoughe | 20:8d93acd1f8cd | 55 | aregnames[7] = "STATUS"; |
htdoughe | 20:8d93acd1f8cd | 56 | aregnames[8] = "FIFO_ENTRIES_L"; |
htdoughe | 20:8d93acd1f8cd | 57 | aregnames[9] = "FIFO_ENTRIES_H"; |
htdoughe | 20:8d93acd1f8cd | 58 | aregnames[10] = "XDATA_L"; |
htdoughe | 20:8d93acd1f8cd | 59 | aregnames[11] = "XDATA_H"; |
htdoughe | 20:8d93acd1f8cd | 60 | aregnames[12] = "YDATA_L"; |
htdoughe | 20:8d93acd1f8cd | 61 | aregnames[13] = "YDATA_H"; |
htdoughe | 20:8d93acd1f8cd | 62 | aregnames[14] = "ZDATA_L"; |
htdoughe | 20:8d93acd1f8cd | 63 | aregnames[15] = "ZDATA_H"; |
htdoughe | 20:8d93acd1f8cd | 64 | aregnames[16] = "TEMP_L"; |
htdoughe | 20:8d93acd1f8cd | 65 | aregnames[17] = "TEMP_H"; |
htdoughe | 20:8d93acd1f8cd | 66 | aregnames[18] = "SOFT_RESET"; |
htdoughe | 20:8d93acd1f8cd | 67 | aregnames[19] = "THRESH_ACT_L"; |
htdoughe | 20:8d93acd1f8cd | 68 | aregnames[20] = "THRESH_ACT_H"; |
htdoughe | 20:8d93acd1f8cd | 69 | aregnames[21] = "TIME_ACT"; |
htdoughe | 20:8d93acd1f8cd | 70 | aregnames[22] = "THRESH_INACT_L"; |
htdoughe | 20:8d93acd1f8cd | 71 | aregnames[23] = "THRESH_INACT_H"; |
htdoughe | 20:8d93acd1f8cd | 72 | aregnames[24] = "TIME_INACT_L"; |
htdoughe | 20:8d93acd1f8cd | 73 | aregnames[25] = "TIME_INACT_H"; |
htdoughe | 20:8d93acd1f8cd | 74 | aregnames[26] = "ACT_INACT_CTL"; |
htdoughe | 20:8d93acd1f8cd | 75 | aregnames[27] = "FIFO_CONTROL"; |
htdoughe | 20:8d93acd1f8cd | 76 | aregnames[28] = "FIFO_SAMPLES"; |
htdoughe | 20:8d93acd1f8cd | 77 | aregnames[29] = "INTMAP1"; |
htdoughe | 20:8d93acd1f8cd | 78 | aregnames[30] = "INTMAP2"; |
htdoughe | 20:8d93acd1f8cd | 79 | aregnames[31] = "FILTER_CTL"; |
htdoughe | 20:8d93acd1f8cd | 80 | aregnames[32] = "POWER_CTL"; |
htdoughe | 20:8d93acd1f8cd | 81 | aregnames[33] = "SELF_TEST"; |
htdoughe | 20:8d93acd1f8cd | 82 | } |
htdoughe | 20:8d93acd1f8cd | 83 | |
htdoughe | 20:8d93acd1f8cd | 84 | //map of register values and names for the adxl |
htdoughe | 20:8d93acd1f8cd | 85 | int mregids[34]; |
htdoughe | 20:8d93acd1f8cd | 86 | char* mregnames[34]; |
htdoughe | 4:8065ca897f8b | 87 | //populating the map |
htdoughe | 4:8065ca897f8b | 88 | void initmap() { |
htdoughe | 20:8d93acd1f8cd | 89 | mregids[0] = 0x00; |
htdoughe | 20:8d93acd1f8cd | 90 | mregids[1] = 0x01; |
htdoughe | 20:8d93acd1f8cd | 91 | mregids[2] = 0x02; |
htdoughe | 20:8d93acd1f8cd | 92 | mregids[3] = 0x03; |
htdoughe | 20:8d93acd1f8cd | 93 | mregids[4] = 0x04; |
htdoughe | 20:8d93acd1f8cd | 94 | mregids[5] = 0x05; |
htdoughe | 20:8d93acd1f8cd | 95 | mregids[6] = 0x06; |
htdoughe | 20:8d93acd1f8cd | 96 | mregids[7] = 0x07; |
htdoughe | 20:8d93acd1f8cd | 97 | mregids[8] = 0x08; |
htdoughe | 20:8d93acd1f8cd | 98 | mregids[9] = 0x09; |
htdoughe | 20:8d93acd1f8cd | 99 | mregids[10] = 0x0A; |
htdoughe | 20:8d93acd1f8cd | 100 | mregids[11] = 0x0B; |
htdoughe | 20:8d93acd1f8cd | 101 | mregids[12] = 0x0C; |
htdoughe | 20:8d93acd1f8cd | 102 | mregids[13] = 0x0D; |
htdoughe | 20:8d93acd1f8cd | 103 | mregids[14] = 0x0E; |
htdoughe | 20:8d93acd1f8cd | 104 | mregids[15] = 0x0F; |
htdoughe | 20:8d93acd1f8cd | 105 | mregids[16] = 0x10; |
htdoughe | 20:8d93acd1f8cd | 106 | mregids[17] = 0x11; |
htdoughe | 20:8d93acd1f8cd | 107 | mregids[18] = 0x12; |
htdoughe | 20:8d93acd1f8cd | 108 | mregids[19] = 0x13; |
htdoughe | 20:8d93acd1f8cd | 109 | mregids[20] = 0x14; |
htdoughe | 20:8d93acd1f8cd | 110 | mregids[21] = 0x15; |
htdoughe | 20:8d93acd1f8cd | 111 | mregids[22] = 0x16; |
htdoughe | 20:8d93acd1f8cd | 112 | mregids[23] = 0x17; |
htdoughe | 20:8d93acd1f8cd | 113 | mregids[24] = 0x18; |
htdoughe | 20:8d93acd1f8cd | 114 | mregids[25] = 0x19; |
htdoughe | 20:8d93acd1f8cd | 115 | mregids[26] = 0x1A; |
htdoughe | 20:8d93acd1f8cd | 116 | mregids[27] = 0x1B; |
htdoughe | 20:8d93acd1f8cd | 117 | mregids[28] = 0x1C; |
htdoughe | 20:8d93acd1f8cd | 118 | mregids[29] = 0x1D; |
htdoughe | 20:8d93acd1f8cd | 119 | mregids[30] = 0x1E; |
htdoughe | 20:8d93acd1f8cd | 120 | mregids[31] = 0x1F; |
htdoughe | 20:8d93acd1f8cd | 121 | mregids[32] = 0x20; |
htdoughe | 20:8d93acd1f8cd | 122 | mregids[33] = 0x21; |
htdoughe | 20:8d93acd1f8cd | 123 | mregids[34] = 0x22; |
htdoughe | 20:8d93acd1f8cd | 124 | mregids[35] = 0x23; |
htdoughe | 20:8d93acd1f8cd | 125 | mregids[36] = 0x24; |
htdoughe | 20:8d93acd1f8cd | 126 | mregids[37] = 0x25; |
htdoughe | 20:8d93acd1f8cd | 127 | mregids[38] = 0x26; |
htdoughe | 20:8d93acd1f8cd | 128 | mregids[39] = 0x27; |
htdoughe | 20:8d93acd1f8cd | 129 | mregids[40] = 0x28; |
htdoughe | 20:8d93acd1f8cd | 130 | mregids[41] = 0x29; |
htdoughe | 20:8d93acd1f8cd | 131 | mregids[42] = 0x2A; |
htdoughe | 20:8d93acd1f8cd | 132 | mregids[43] = 0x2B; |
htdoughe | 20:8d93acd1f8cd | 133 | mregids[44] = 0x2C; |
htdoughe | 20:8d93acd1f8cd | 134 | mregids[45] = 0x2D; |
htdoughe | 5:02aa71487c01 | 135 | |
htdoughe | 20:8d93acd1f8cd | 136 | mregnames[0] = "STATUS"; |
htdoughe | 20:8d93acd1f8cd | 137 | mregnames[1] = "OUT_P_MSB"; |
htdoughe | 20:8d93acd1f8cd | 138 | mregnames[2] = "OUT_P_CSB"; |
htdoughe | 20:8d93acd1f8cd | 139 | mregnames[3] = "OUT_P_LSB"; |
htdoughe | 20:8d93acd1f8cd | 140 | mregnames[4] = "OUT_T_MSB"; |
htdoughe | 20:8d93acd1f8cd | 141 | mregnames[5] = "OUT_T_LSB"; |
htdoughe | 20:8d93acd1f8cd | 142 | mregnames[6] = "DR_STATUS"; |
htdoughe | 20:8d93acd1f8cd | 143 | mregnames[7] = "OUT_P_DELTA_MSB"; |
htdoughe | 20:8d93acd1f8cd | 144 | mregnames[8] = "OUT_P_DELTA_CSB"; |
htdoughe | 20:8d93acd1f8cd | 145 | mregnames[9] = "OUT_T_DELTA_MSB"; |
htdoughe | 20:8d93acd1f8cd | 146 | mregnames[10] = "OUT_T_DELTA_LSB"; |
htdoughe | 20:8d93acd1f8cd | 147 | mregnames[11] = "WHO_AM_I"; |
htdoughe | 20:8d93acd1f8cd | 148 | mregnames[12] = "F_STATUS"; |
htdoughe | 20:8d93acd1f8cd | 149 | mregnames[13] = "F_DATA"; |
htdoughe | 20:8d93acd1f8cd | 150 | mregnames[14] = "F_SETUP"; |
htdoughe | 20:8d93acd1f8cd | 151 | mregnames[15] = "TIME_DLY"; |
htdoughe | 20:8d93acd1f8cd | 152 | mregnames[16] = "SYSMOD"; |
htdoughe | 20:8d93acd1f8cd | 153 | mregnames[17] = "INT_SOURCE"; |
htdoughe | 20:8d93acd1f8cd | 154 | mregnames[18] = "SOFT_RESET"; |
htdoughe | 20:8d93acd1f8cd | 155 | mregnames[19] = "PT_DATA_CFG"; |
htdoughe | 20:8d93acd1f8cd | 156 | mregnames[20] = "BAR_IN_MSB"; |
htdoughe | 20:8d93acd1f8cd | 157 | mregnames[21] = "BAR_IN_LSB"; |
htdoughe | 20:8d93acd1f8cd | 158 | mregnames[22] = "P_TGT_MSB"; |
htdoughe | 20:8d93acd1f8cd | 159 | mregnames[23] = "P_TGT_LSB"; |
htdoughe | 20:8d93acd1f8cd | 160 | mregnames[24] = "T_TGT"; |
htdoughe | 20:8d93acd1f8cd | 161 | mregnames[25] = "P_WND_MSB"; |
htdoughe | 20:8d93acd1f8cd | 162 | mregnames[26] = "P_WND_LSB"; |
htdoughe | 20:8d93acd1f8cd | 163 | mregnames[27] = "T_WND"; |
htdoughe | 20:8d93acd1f8cd | 164 | mregnames[28] = "P_MIN_MSB"; |
htdoughe | 20:8d93acd1f8cd | 165 | mregnames[29] = "P_MIN_CSB"; |
htdoughe | 20:8d93acd1f8cd | 166 | mregnames[30] = "P_MIN_LSB"; |
htdoughe | 20:8d93acd1f8cd | 167 | mregnames[31] = "T_MIN_MSB"; |
htdoughe | 20:8d93acd1f8cd | 168 | mregnames[32] = "T_MIN_LSB"; |
htdoughe | 20:8d93acd1f8cd | 169 | mregnames[33] = "P_MAX_MSB"; |
htdoughe | 20:8d93acd1f8cd | 170 | mregnames[34] = "P_MAX_CSB"; |
htdoughe | 20:8d93acd1f8cd | 171 | mregnames[35] = "P_MAX_LSB"; |
htdoughe | 20:8d93acd1f8cd | 172 | mregnames[36] = "T_MAX_MSB"; |
htdoughe | 20:8d93acd1f8cd | 173 | mregnames[37] = "T_MAX_LSB"; |
htdoughe | 20:8d93acd1f8cd | 174 | mregnames[38] = "CTRL_REG1"; |
htdoughe | 20:8d93acd1f8cd | 175 | mregnames[39] = "CTRL_REG2"; |
htdoughe | 20:8d93acd1f8cd | 176 | mregnames[40] = "CTRL_REG3"; |
htdoughe | 20:8d93acd1f8cd | 177 | mregnames[41] = "CTRL_REG4"; |
htdoughe | 20:8d93acd1f8cd | 178 | mregnames[42] = "CTRL_REG5"; |
htdoughe | 20:8d93acd1f8cd | 179 | mregnames[43] = "OFF_P"; |
htdoughe | 20:8d93acd1f8cd | 180 | mregnames[44] = "OFF_T"; |
htdoughe | 20:8d93acd1f8cd | 181 | mregnames[45] = "OFF_H"; |
htdoughe | 4:8065ca897f8b | 182 | } |
htdoughe | 4:8065ca897f8b | 183 | |
rmneubau | 0:0f663d16e8a2 | 184 | // Interface pulled from ADXL362.cpp |
rmneubau | 0:0f663d16e8a2 | 185 | // ADXL362::ADXL362(PinName CS, PinName MOSI, PinName MISO, PinName SCK) : |
rmneubau | 0:0f663d16e8a2 | 186 | ADXL362 adxl362(PA_0,PA_7,PA_6,PA_1); |
rmneubau | 0:0f663d16e8a2 | 187 | |
rmneubau | 0:0f663d16e8a2 | 188 | int adxl362_reg_print(int s, int l){ |
htdoughe | 4:8065ca897f8b | 189 | //check s is between 0x00 and 0x2E |
rmneubau | 0:0f663d16e8a2 | 190 | if(s > 0x2E || s < 0x00){ |
htdoughe | 1:b8716571ecac | 191 | printf("adx: requires start between 0x00 and 0x2E; given %d (0x%01x)\n", s,s); |
htdoughe | 4:8065ca897f8b | 192 | return -1; |
rmneubau | 0:0f663d16e8a2 | 193 | }else if(l < 0){ |
htdoughe | 4:8065ca897f8b | 194 | //check length > 0 |
htdoughe | 1:b8716571ecac | 195 | printf("adx: requires length >= 0, given %d\n", l); |
htdoughe | 4:8065ca897f8b | 196 | return -1; |
rmneubau | 0:0f663d16e8a2 | 197 | }else{ |
rmneubau | 0:0f663d16e8a2 | 198 | // start sending stuff |
rmneubau | 0:0f663d16e8a2 | 199 | //first check DEVID_AD == 0xAD |
htdoughe | 7:446c8e17a945 | 200 | uint8_t devid = adxl362.read_reg(ADXL362::DEVID_AD); |
htdoughe | 6:f05c72e636aa | 201 | printf("devid = %d\n", devid); |
htdoughe | 5:02aa71487c01 | 202 | if(devid != 0xAD){ |
htdoughe | 2:496a662be854 | 203 | printf("error: DEVID_AD is not 0xAD; exiting\n"); |
htdoughe | 4:8065ca897f8b | 204 | return -1; |
rmneubau | 0:0f663d16e8a2 | 205 | }else{ |
rmneubau | 0:0f663d16e8a2 | 206 | //now do stuff |
htdoughe | 1:b8716571ecac | 207 | //if length == 0, send everything from s to end of registers |
htdoughe | 4:8065ca897f8b | 208 | //else print from s to l |
htdoughe | 4:8065ca897f8b | 209 | // formula : range = end - start - length |
htdoughe | 4:8065ca897f8b | 210 | // area = start + range |
htdoughe | 4:8065ca897f8b | 211 | int stop = 0; |
htdoughe | 1:b8716571ecac | 212 | if(l == 0){ |
htdoughe | 4:8065ca897f8b | 213 | stop = 34; |
htdoughe | 3:813694e51f72 | 214 | }else{ |
htdoughe | 4:8065ca897f8b | 215 | stop = s + l; |
htdoughe | 4:8065ca897f8b | 216 | } |
htdoughe | 4:8065ca897f8b | 217 | int in = s; |
htdoughe | 4:8065ca897f8b | 218 | while(in < stop){ |
htdoughe | 4:8065ca897f8b | 219 | //get register name |
htdoughe | 5:02aa71487c01 | 220 | char * name = regnames[in]; //GET NAME |
htdoughe | 5:02aa71487c01 | 221 | ADXL362::ADXL362_register_t reg = (ADXL362::ADXL362_register_t) regids[in]; |
htdoughe | 8:9c9d58ca2b79 | 222 | uint8_t val = adxl362.read_reg(reg); //GET REG VAL |
htdoughe | 4:8065ca897f8b | 223 | //print val |
htdoughe | 5:02aa71487c01 | 224 | printf("0x%01x: %s=0x%01x\r\n", regids[in], name, val); |
htdoughe | 4:8065ca897f8b | 225 | in++; |
htdoughe | 1:b8716571ecac | 226 | } |
rmneubau | 0:0f663d16e8a2 | 227 | } |
rmneubau | 0:0f663d16e8a2 | 228 | } |
htdoughe | 5:02aa71487c01 | 229 | return 0; |
htdoughe | 5:02aa71487c01 | 230 | } |
htdoughe | 5:02aa71487c01 | 231 | |
htdoughe | 16:993757c8b398 | 232 | void knocks(){ |
rmneubau | 11:5aba4ea23082 | 233 | int8_t x,y,z, initx, inity, initz; |
htdoughe | 10:8dcc46dd53bf | 234 | //initial values of x, y, and z. |
htdoughe | 10:8dcc46dd53bf | 235 | //These values are the baseline for the accelerometer; knocks are detected |
htdoughe | 10:8dcc46dd53bf | 236 | // in relation to these initial values |
htdoughe | 9:a14593af628d | 237 | initx=adxl362.scanx_u8(); |
htdoughe | 9:a14593af628d | 238 | inity=adxl362.scany_u8(); |
htdoughe | 9:a14593af628d | 239 | initz=adxl362.scanz_u8(); |
htdoughe | 15:5ce9c63e7da2 | 240 | int count = 0; |
htdoughe | 18:216cc41b55f3 | 241 | int bs = 7; |
rmneubau | 0:0f663d16e8a2 | 242 | |
htdoughe | 5:02aa71487c01 | 243 | while(1) { |
htdoughe | 10:8dcc46dd53bf | 244 | //get the values of x, y, and z to test for a knock |
htdoughe | 5:02aa71487c01 | 245 | x=adxl362.scanx_u8(); |
htdoughe | 5:02aa71487c01 | 246 | y=adxl362.scany_u8(); |
htdoughe | 5:02aa71487c01 | 247 | z=adxl362.scanz_u8(); |
htdoughe | 13:1cae1960370c | 248 | //if x, y, or z vary from baseline by at least 3, a knock has occured. |
htdoughe | 19:51b2b42a82f1 | 249 | if(x > initx+bs || y > inity+bs || z > initz+bs || x < initx-bs || y < inity-bs || z < initz-bs){ |
htdoughe | 18:216cc41b55f3 | 250 | led3 = 1; |
htdoughe | 15:5ce9c63e7da2 | 251 | count++; |
htdoughe | 15:5ce9c63e7da2 | 252 | printf("number of knocks: %d\r\n", count); |
rmneubau | 11:5aba4ea23082 | 253 | wait_ms(2000); |
htdoughe | 18:216cc41b55f3 | 254 | led3 = 0; |
htdoughe | 9:a14593af628d | 255 | } |
htdoughe | 16:993757c8b398 | 256 | //printf("x = %d y = %d z = %d\r\n",x,y,z); |
htdoughe | 5:02aa71487c01 | 257 | wait_ms(100); |
htdoughe | 5:02aa71487c01 | 258 | } |
htdoughe | 1:b8716571ecac | 259 | } |
htdoughe | 16:993757c8b398 | 260 | |
htdoughe | 20:8d93acd1f8cd | 261 | int mpl3115_reg_print(int s, int l){ |
htdoughe | 20:8d93acd1f8cd | 262 | if(s > 0x2D || s < 0x00){ |
htdoughe | 20:8d93acd1f8cd | 263 | printf("mpl: requires start between 0x00 and 0x20; given %d (0x%01x)\n\r", s,s); |
htdoughe | 20:8d93acd1f8cd | 264 | return -1; |
htdoughe | 20:8d93acd1f8cd | 265 | }else if(l < 0){ |
htdoughe | 20:8d93acd1f8cd | 266 | //check length > 0 |
htdoughe | 20:8d93acd1f8cd | 267 | printf("mpl: requires length >= 0, given %d\n\r", l); |
htdoughe | 20:8d93acd1f8cd | 268 | return -1; |
htdoughe | 20:8d93acd1f8cd | 269 | }else{ |
htdoughe | 20:8d93acd1f8cd | 270 | //else do stuff |
htdoughe | 20:8d93acd1f8cd | 271 | if(WHOAMI IS NOT 0xC4){ |
htdoughe | 20:8d93acd1f8cd | 272 | //return error |
htdoughe | 20:8d93acd1f8cd | 273 | printf("error: WHO_AM_I is not 0xC4; exiting\n\r"); |
htdoughe | 20:8d93acd1f8cd | 274 | return -1; |
htdoughe | 20:8d93acd1f8cd | 275 | }else{ |
htdoughe | 20:8d93acd1f8cd | 276 | //else do stuff again |
htdoughe | 20:8d93acd1f8cd | 277 | } |
htdoughe | 20:8d93acd1f8cd | 278 | } |
htdoughe | 20:8d93acd1f8cd | 279 | } |
htdoughe | 20:8d93acd1f8cd | 280 | |
htdoughe | 16:993757c8b398 | 281 | int main() { |
htdoughe | 16:993757c8b398 | 282 | initmap(); |
htdoughe | 16:993757c8b398 | 283 | adxl362.reset(); |
htdoughe | 16:993757c8b398 | 284 | wait_ms(600); // we need to wait at least 500ms after ADXL362 reset |
htdoughe | 16:993757c8b398 | 285 | adxl362.set_mode(ADXL362::MEASUREMENT); |
htdoughe | 16:993757c8b398 | 286 | int start, length; |
htdoughe | 16:993757c8b398 | 287 | start = 0; |
htdoughe | 16:993757c8b398 | 288 | length = 0; |
htdoughe | 17:6a08357dbb3f | 289 | //while(1){ |
htdoughe | 16:993757c8b398 | 290 | adxl362_reg_print(start, length); |
htdoughe | 17:6a08357dbb3f | 291 | //} |
htdoughe | 16:993757c8b398 | 292 | knocks(); |
htdoughe | 16:993757c8b398 | 293 | |
htdoughe | 16:993757c8b398 | 294 | } |