CIS541 / Mbed 2 deprecated Pacemaker_2

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Dependencies:   mbed-rtos mbed

GlobalVar.h@0:6477530de2c0, 2015-11-27 (annotated)

Committer:
Huazhi
Date:
Fri Nov 27 21:43:33 2015 +0000
Revision:
0:6477530de2c0
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Huazhi 0:6477530de2c0 1 #include "mbed.h"
Huazhi 0:6477530de2c0 2 #include "rtos.h"
Huazhi 0:6477530de2c0 3 #include "state_type.h"
Huazhi 0:6477530de2c0 4 #include "pacemaker_Param.h"
Huazhi 0:6477530de2c0 5 #include "transition.h"
Huazhi 0:6477530de2c0 6 #include <map>
Huazhi 0:6477530de2c0 7 using namespace std;
Huazhi 0:6477530de2c0 8
Huazhi 0:6477530de2c0 9 Serial pc (USBTX, USBRX);
Huazhi 0:6477530de2c0 10
Huazhi 0:6477530de2c0 11 /* Transition Table and Status */
Huazhi 0:6477530de2c0 12 TRANS_T TRANS[100];
Huazhi 0:6477530de2c0 13 map<Sync, long> SyncStatus;
Huazhi 0:6477530de2c0 14
Huazhi 0:6477530de2c0 15 /* Init Transition Table */
Huazhi 0:6477530de2c0 16 void initTrans(){
Huazhi 0:6477530de2c0 17 TRANS[0] = TRANS_T(true, AMACHINE_INITIAL, AMACHINE_V, ASENSE);
Huazhi 0:6477530de2c0 18 TRANS[1] = TRANS_T(true, AMACHINE_INITIAL, AMACHINE_INITIAL, VPACE);
Huazhi 0:6477530de2c0 19 TRANS[2] = TRANS_T(true, AMACHINE_INITIAL, AMACHINE_INITIAL, VSENSE);
Huazhi 0:6477530de2c0 20 TRANS[3] = TRANS_T(false, AMACHINE_V, AMACHINE_INITIAL, VPACE);
Huazhi 0:6477530de2c0 21 TRANS[4] = TRANS_T(false, AMACHINE_V, AMACHINE_INITIAL, VSENSE);
Huazhi 0:6477530de2c0 22 TRANS[10] = TRANS_T(true, VMACHINE_INITIAL, VMACHINE_INITIAL, VSENSE);
Huazhi 0:6477530de2c0 23 TRANS[11] = TRANS_T(true, VMACHINE_INITIAL, VMACHINE_AEVENT, ASENSE);
Huazhi 0:6477530de2c0 24 TRANS[12] = TRANS_T(true, VMACHINE_INITIAL, VMACHINE_AEVENT, APACE);
Huazhi 0:6477530de2c0 25 TRANS[13] = TRANS_T(false, VMACHINE_AEVENT, VMACHINE_INITIAL, VSENSE);
Huazhi 0:6477530de2c0 26 TRANS[14] = TRANS_T(false, VMACHINE_AEVENT, VMACHINE_INTER, NONE);
Huazhi 0:6477530de2c0 27 TRANS[15] = TRANS_T(false, VMACHINE_INTER, VMACHINE_INITIAL, VSENSE);
Huazhi 0:6477530de2c0 28 TRANS[16] = TRANS_T(false, VMACHINE_INTER, VMACHINE_AEVENT, ASENSE);
Huazhi 0:6477530de2c0 29 TRANS[20] = TRANS_T(true, VRP_INITIAL, VRP_WAIT, VPACE);
Huazhi 0:6477530de2c0 30 TRANS[21] = TRANS_T(true, VRP_INITIAL, VRP_VSENSE, VSIGNAL);
Huazhi 0:6477530de2c0 31 TRANS[22] = TRANS_T(false, VRP_WAIT, VRP_INITIAL, NONE);
Huazhi 0:6477530de2c0 32 TRANS[30] = TRANS_T(true, PVARP_INITIAL, PVARP_INTER, VPACE);
Huazhi 0:6477530de2c0 33 TRANS[31] = TRANS_T(true, PVARP_INITIAL, PVARP_INTER, VSENSE);
Huazhi 0:6477530de2c0 34 TRANS[32] = TRANS_T(false, PVARP_INTER, PVARP_AEVENT, NONE);
Huazhi 0:6477530de2c0 35 TRANS[33] = TRANS_T(false, PVARP_AEVENT, PVARP_ASENSE, ASIGNAL);
Huazhi 0:6477530de2c0 36 TRANS[34] = TRANS_T(false, PVARP_AEVENT, PVARP_INITIAL, APACE);
Huazhi 0:6477530de2c0 37
Huazhi 0:6477530de2c0 38 SyncStatus[APACE] = -1000;
Huazhi 0:6477530de2c0 39 SyncStatus[ASENSE] = -1000;
Huazhi 0:6477530de2c0 40 SyncStatus[ASIGNAL] = -1000;
Huazhi 0:6477530de2c0 41 SyncStatus[VPACE] = -1000;
Huazhi 0:6477530de2c0 42 SyncStatus[VSENSE] = -1000;
Huazhi 0:6477530de2c0 43 SyncStatus[VSIGNAL] = -1000;
Huazhi 0:6477530de2c0 44 }
Huazhi 0:6477530de2c0 45
Huazhi 0:6477530de2c0 46 /* Global Timer */
Huazhi 0:6477530de2c0 47 long global_time = 0;
Huazhi 0:6477530de2c0 48 long agre_time = 0;
Huazhi 0:6477530de2c0 49 void tick_timer(void const *n)
Huazhi 0:6477530de2c0 50 {
Huazhi 0:6477530de2c0 51 global_time++;
Huazhi 0:6477530de2c0 52 agre_time++;
Huazhi 0:6477530de2c0 53 }
Huazhi 0:6477530de2c0 54
Huazhi 0:6477530de2c0 55 /* AMachine Timer */
Huazhi 0:6477530de2c0 56 long AMachine_clock = 0;
Huazhi 0:6477530de2c0 57 void AMachine_timer(void const *n)
Huazhi 0:6477530de2c0 58 {
Huazhi 0:6477530de2c0 59 AMachine_clock++;
Huazhi 0:6477530de2c0 60 }
Huazhi 0:6477530de2c0 61
Huazhi 0:6477530de2c0 62 /* VMachine Timer */
Huazhi 0:6477530de2c0 63 long VMachine_clock = 0;
Huazhi 0:6477530de2c0 64 void VMachine_timer(void const *n)
Huazhi 0:6477530de2c0 65 {
Huazhi 0:6477530de2c0 66 VMachine_clock++;
Huazhi 0:6477530de2c0 67 }
Huazhi 0:6477530de2c0 68
Huazhi 0:6477530de2c0 69 /* VRP Timer */
Huazhi 0:6477530de2c0 70 long VRP_clock = 0;
Huazhi 0:6477530de2c0 71 void VRP_timer(void const *n)
Huazhi 0:6477530de2c0 72 {
Huazhi 0:6477530de2c0 73 VRP_clock++;
Huazhi 0:6477530de2c0 74 }
Huazhi 0:6477530de2c0 75
Huazhi 0:6477530de2c0 76 /* PVARP Timer */
Huazhi 0:6477530de2c0 77 long PVARP_clock = 0;
Huazhi 0:6477530de2c0 78 void PVARP_timer(void const *n)
Huazhi 0:6477530de2c0 79 {
Huazhi 0:6477530de2c0 80 PVARP_clock++;
Huazhi 0:6477530de2c0 81 }
Huazhi 0:6477530de2c0 82
Huazhi 0:6477530de2c0 83 /* Evaluate Guard */
Huazhi 0:6477530de2c0 84 bool EVAL_GUARD(int trn)
Huazhi 0:6477530de2c0 85 {
Huazhi 0:6477530de2c0 86 switch(trn) {
Huazhi 0:6477530de2c0 87 case 0:
Huazhi 0:6477530de2c0 88 return AMachine_clock >= CURRENT_LRI-AVI;
Huazhi 0:6477530de2c0 89 case 1:
Huazhi 0:6477530de2c0 90 return true;
Huazhi 0:6477530de2c0 91 case 2:
Huazhi 0:6477530de2c0 92 case 3:
Huazhi 0:6477530de2c0 93 case 4:
Huazhi 0:6477530de2c0 94 case 5:
Huazhi 0:6477530de2c0 95 return true;
Huazhi 0:6477530de2c0 96 case 10:
Huazhi 0:6477530de2c0 97 case 11:
Huazhi 0:6477530de2c0 98 case 12:
Huazhi 0:6477530de2c0 99 case 13:
Huazhi 0:6477530de2c0 100 return true;
Huazhi 0:6477530de2c0 101 case 14:
Huazhi 0:6477530de2c0 102 return (VMachine_clock >= AVI && global_time < CURRENT_URI);
Huazhi 0:6477530de2c0 103 case 15:
Huazhi 0:6477530de2c0 104 case 16:
Huazhi 0:6477530de2c0 105 return true;
Huazhi 0:6477530de2c0 106 case 20:
Huazhi 0:6477530de2c0 107 case 21:
Huazhi 0:6477530de2c0 108 return true;
Huazhi 0:6477530de2c0 109 case 22:
Huazhi 0:6477530de2c0 110 return global_time >= VRP_TIME;
Huazhi 0:6477530de2c0 111 case 30:
Huazhi 0:6477530de2c0 112 case 31:
Huazhi 0:6477530de2c0 113 return true;
Huazhi 0:6477530de2c0 114 case 32:
Huazhi 0:6477530de2c0 115 return PVARP_clock >= PVARP_TIME;
Huazhi 0:6477530de2c0 116 }
Huazhi 0:6477530de2c0 117 return false;
Huazhi 0:6477530de2c0 118 }
Huazhi 0:6477530de2c0 119
Huazhi 0:6477530de2c0 120 /* Implement Update*/
Huazhi 0:6477530de2c0 121 void ASSIGN(int trn)
Huazhi 0:6477530de2c0 122 {
Huazhi 0:6477530de2c0 123 switch(trn) {
Huazhi 0:6477530de2c0 124 case 0:
Huazhi 0:6477530de2c0 125 break; // Lighten LED
Huazhi 0:6477530de2c0 126 case 1:
Huazhi 0:6477530de2c0 127 case 2:
Huazhi 0:6477530de2c0 128 case 3:
Huazhi 0:6477530de2c0 129 case 4:
Huazhi 0:6477530de2c0 130 AMachine_clock = 0;
Huazhi 0:6477530de2c0 131 break;
Huazhi 0:6477530de2c0 132 case 10:
Huazhi 0:6477530de2c0 133 case 13:
Huazhi 0:6477530de2c0 134 case 15:
Huazhi 0:6477530de2c0 135 global_time = 0;
Huazhi 0:6477530de2c0 136 break;
Huazhi 0:6477530de2c0 137 case 11:
Huazhi 0:6477530de2c0 138 case 12:
Huazhi 0:6477530de2c0 139 case 16:
Huazhi 0:6477530de2c0 140 VMachine_clock = 0;
Huazhi 0:6477530de2c0 141 break;
Huazhi 0:6477530de2c0 142 case 14:
Huazhi 0:6477530de2c0 143 break;
Huazhi 0:6477530de2c0 144 case 20:
Huazhi 0:6477530de2c0 145 case 21:
Huazhi 0:6477530de2c0 146 VRP_clock = 0;
Huazhi 0:6477530de2c0 147 break;
Huazhi 0:6477530de2c0 148 case 22:
Huazhi 0:6477530de2c0 149 case 32:
Huazhi 0:6477530de2c0 150 break;
Huazhi 0:6477530de2c0 151 case 30:
Huazhi 0:6477530de2c0 152 case 31:
Huazhi 0:6477530de2c0 153 case 33:
Huazhi 0:6477530de2c0 154 case 34:
Huazhi 0:6477530de2c0 155 PVARP_clock = 0;
Huazhi 0:6477530de2c0 156 break;
Huazhi 0:6477530de2c0 157 }
Huazhi 0:6477530de2c0 158 }