Diff: main.cpp

Revision:

3:d84f98b6920e

Parent:

2:9f3ea84403ca

diff -r 9f3ea84403ca -r d84f98b6920e main.cpp
--- a/main.cpp	Mon Jun 16 16:59:59 2014 +0000
+++ b/main.cpp	Tue Jun 17 17:17:41 2014 +0000
@@ -1292,60 +1292,75 @@
 int main() {
     
     Thread thread(blinky);
-    
-    
-    
+    // LPC_I2C1
     uint8_t myByte;
     int count =0;
-
-    I2C_Init(LPC_I2C1,100000);                  //* @brief Initializes the I2Cx peripheral with specified parameter.
-    I2C_Cmd(LPC_I2C1, ENABLE);                  // * @brief Enable or disable I2C peripheral's operation
-    I2C_MonitorModeCmd(LPC_I2C1, ENABLE);       // * @brief Enable/Disable I2C monitor mode -- I2C_I2MMCTRL_MM_ENA
-    I2C_MonitorModeConfig(LPC_I2C1, I2C_MONITOR_CFG_MATCHALL, ENABLE); // Configure to catch on all addresses - I2C_MONITOR_CFG_MATCHALL
+    
+    LPC_I2C_TypeDef *I2Cx = LPC_I2C2;
     
-    //LPC_I2C1->I2CONCLR = 0x08;
+
+    I2C_Init(I2Cx,1000);                   //* @brief Initializes the I2Cx peripheral with specified parameter.
+    I2C_Cmd(I2Cx, ENABLE);                  // * @brief Enable or disable I2C peripheral's operation
+    I2C_MonitorModeCmd(I2Cx, ENABLE);       // * @brief Enable/Disable I2C monitor mode -- I2C_I2MMCTRL_MM_ENA
+    I2C_MonitorModeConfig(I2Cx, I2C_MONITOR_CFG_MATCHALL, ENABLE); // Configure to catch on all addresses - I2C_MONITOR_CFG_MATCHALL
     
-    //I2C_SetClock (LPC_I2C1, 100000);                // * @brief Setup clock rate for I2C peripheral
-    LPC_I2C1->MMCTRL |= I2C_I2MMCTRL_MM_ENA;        // enable monitor mode
-    LPC_I2C1->MMCTRL |= I2C_MONITOR_CFG_MATCHALL;   // I2C_MONITOR_CFG_MATCHALL 
-    LPC_I2C1->I2CONSET |= I2C_I2CONSET_I2EN;        // enable the i2c interface
-    
+    //I2C_SetClock (LPC_I2C1, 1000);          // * @brief Setup clock rate for I2C peripheral
+    I2Cx->MMCTRL |= I2C_I2MMCTRL_MM_ENA;        // enable monitor mode
+    I2Cx->MMCTRL |= I2C_MONITOR_CFG_MATCHALL;   // I2C_MONITOR_CFG_MATCHALL 
+    I2Cx->MMCTRL |= (1<<1);                     // Enable ENA_SCL bit
+    I2Cx->I2CONSET |= I2C_I2CONSET_I2EN;        // Enable the i2c interface    
+    I2C_IntCmd(I2Cx, TRUE);
     
     /* interrupt handler */
-    NVIC_EnableIRQ(I2C1_IRQn);
-    
-    printf("LPC_I2C1->MMCTRL == %x \n\r",LPC_I2C1->MMCTRL);
-
+   // NVIC_EnableIRQ(I2C1_IRQn);
+    pc.printf(" **************** **************** **************** **************** **************** \n\r");
+    printf("I2Cx->MMCTRL == %x \n\r",I2Cx->MMCTRL);
     wait(3);    
+    I2Cx->I2CONCLR =         I2C_I2CONSET_STA | I2C_I2CONCLR_STAC;
     while (1) {
-        pc.printf(" **************** \n\r");
-        wait(0.3);        
-        LPC_I2C1->I2CONCLR = 0x08;                      // Clear the interrupt flag
-        pc.printf("dataBuff has %x in it , and the count is %x \n\r",myByte, count++);
-
+//        pc.printf("dataBuff has %x in it , and the count is %x \n\r",myByte, count++);
+        
+        //uint8_t retdat;
+        //pc.printf("Waiting for a Byte to come in\r\n");
+        //uint32_t aWord = I2C_GetByte (LPC_I2C1, &retdat, FALSE);
+        //pc.printf(" retDat = %x, stat = %x \n\r",retdat,aWord);       
+        //pc.printf("Data Buffer *********** = %x !\n\r",I2Cx->I2DATA_BUFFER);
+        I2Cx->I2CONCLR =         I2C_I2CONSET_STA | I2C_I2CONCLR_STAC;        
         
-        // uint8_t retdat;
-        // pc.printf("Waiting for a Byte to come in\r\n");
-        // uint32_t aWord = I2C_GetByte (LPC_I2C1, &retdat, FALSE);
-        // pc.printf(" retDat = %x, stat = %x \n\r",retdat,aWord);       
-        pc.printf("Data Buffer *********** = %x !\n\r",LPC_I2C1->I2DATA_BUFFER);
-        pc.printf("Status    = %x\n\r",LPC_I2C1->I2STAT);               
-        pc.printf("I2CONSET  = %x\n\r",LPC_I2C1->I2CONSET);                       
-        pc.printf("Interrupt = %x\n\r",I2C_I2CONSET_SI);      // what is the value of the interupt 
+        
+//        I2Cx->I2DATA_BUFFER = 0xff;
+        
+        pc.printf("Status    = %x\n\r",I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);               
+        pc.printf("I2CONSET  = %x\n\r",I2Cx->I2CONSET);                       
+        pc.printf("Interrupt = %x\n\r",I2C_I2CONSET_SI & I2Cx->I2CONSET);      // what is the value of the interupt 
+        pc.printf("I2C_I2CONSET_STA  = %x\n\r",I2Cx->I2CONSET & I2C_I2CONSET_STA); // I2C Status Register.                       
+        pc.printf("I2C_I2CONCLR_STAC  = %x\n\r",I2Cx->I2CONSET & I2C_I2CONCLR_STAC);                    
+        pc.printf("Data Byte = %x \n\r,", I2Cx->I2DAT & I2C_I2DAT_BITMASK);
 
 
+//  0xFF into the DAT
+
+
+        //pc.printf("the count is %x \n\r\n\r",count++);
+        // Clear the interrupt flag
+        I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
+        wait(0.3); 
         
-        /* Check SI flag ready */
-        //if ((LPC_I2C1->I2CONSET & I2C_I2CONSET_SI) ){
-                if(1) {
-                //pc.printf("LPC_I2C1->I2CONSET & I2C_I2CONSET_SI is true \r\n");
-                myByte = I2C_MonitorGetDatabuffer(LPC_I2C1);
-                LPC_I2C1->I2CONCLR = 0x08;                      // Clear the interrupt flag
+        // Check SI flag ready 
+        if ((I2Cx->I2CONSET & I2C_I2CONSET_SI) ){
+            //    if(1) {
+                pc.printf("I2Cx->I2CONSET & I2C_I2CONSET_SI is true \r\n");
+                myByte = I2C_MonitorGetDatabuffer(I2Cx);
+                // Clear the interrupt flag
+                I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
                 pc.printf("dataBuff has %x in it , and the count is %x \n\r",myByte, count++);
             }        
             else {
-                pc.printf("count = %x \n\r",count++);
+                pc.printf("I2C_I2CONSET_SI not set count = %x \n\r",count++);
             }
+        pc.printf(" **************** \n\r");
+        wait(0.3);        
+
     }    
 }
 
@@ -1358,5 +1373,17 @@
 
 
 
+/*
+
+//LPC_I2C1->I2CONCLR = 0x04;
 
 
+While SI is set, the low period of the serial
+clock on the SCL line is stretched, and the
+serial transfer is suspended. When SCL is HIGH, it is unaffected by the state of the SI flag.
+SI must be reset by software, by writing a 1
+to the SIC bit in I2CONCLR register. The SI bit
+should be cleared only after the required bit(s) has (have) been set and the value in I2DAT
+has been loaded or read.
+*/
+