BE@R lab / Mbed 2 deprecated MPU9250AHRS_OOP

Class of MPU9250

Dependencies:   AHRS_fillter mbed

Fork of MPU9250AHRS by BE@R lab

register.h@8:928673148b55, 2016-01-20 (annotated)

Committer:
icyzkungz
Date:
Wed Jan 20 02:42:22 2016 +0000
Revision:
8:928673148b55
Parent:
6:5665d427bceb 
add tx,rx in AHRS class

Who changed what in which revision?

UserRevisionLine numberNew contents of line
icyzkungz 6:5665d427bceb 1 // See also MPU-9250 Register Map and Descriptions, Revision 4.0, RM-MPU-9250A-00, Rev. 1.4, 9/9/2013 for registers not listed in
icyzkungz 6:5665d427bceb 2 // above document; the MPU9250 and MPU9150 are virtually identical but the latter has a different register map
icyzkungz 6:5665d427bceb 3 //
icyzkungz 6:5665d427bceb 4 //AD0
icyzkungz 6:5665d427bceb 5 #define MPU9250_ADDRESS_68 0x68
icyzkungz 6:5665d427bceb 6 #define MPU9250_ADDRESS_69 0x69
icyzkungz 6:5665d427bceb 7
icyzkungz 6:5665d427bceb 8 //Magnetometer Registers
icyzkungz 6:5665d427bceb 9 #define AK8963_ADDRESS 0x0C<<1
icyzkungz 6:5665d427bceb 10 #define WHO_AM_I_AK8963 0x00 // should return 0x48
icyzkungz 6:5665d427bceb 11 #define INFO 0x01
icyzkungz 6:5665d427bceb 12 #define AK8963_ST1 0x02 // data ready status bit 0
icyzkungz 6:5665d427bceb 13 #define AK8963_XOUT_L 0x03 // data
icyzkungz 6:5665d427bceb 14 #define AK8963_XOUT_H 0x04
icyzkungz 6:5665d427bceb 15 #define AK8963_YOUT_L 0x05
icyzkungz 6:5665d427bceb 16 #define AK8963_YOUT_H 0x06
icyzkungz 6:5665d427bceb 17 #define AK8963_ZOUT_L 0x07
icyzkungz 6:5665d427bceb 18 #define AK8963_ZOUT_H 0x08
icyzkungz 6:5665d427bceb 19 #define AK8963_ST2 0x09 // Data overflow bit 3 and data read error status bit 2
icyzkungz 6:5665d427bceb 20 #define AK8963_CNTL 0x0A // Power down (0000), single-measurement (0001), self-test (1000) and Fuse ROM (1111) modes on bits 3:0
icyzkungz 6:5665d427bceb 21 #define AK8963_ASTC 0x0C // Self test control
icyzkungz 6:5665d427bceb 22 #define AK8963_I2CDIS 0x0F // I2C disable
icyzkungz 6:5665d427bceb 23 #define AK8963_ASAX 0x10 // Fuse ROM x-axis sensitivity adjustment value
icyzkungz 6:5665d427bceb 24 #define AK8963_ASAY 0x11 // Fuse ROM y-axis sensitivity adjustment value
icyzkungz 6:5665d427bceb 25 #define AK8963_ASAZ 0x12 // Fuse ROM z-axis sensitivity adjustment value
icyzkungz 6:5665d427bceb 26
icyzkungz 6:5665d427bceb 27 #define SELF_TEST_X_GYRO 0x00
icyzkungz 6:5665d427bceb 28 #define SELF_TEST_Y_GYRO 0x01
icyzkungz 6:5665d427bceb 29 #define SELF_TEST_Z_GYRO 0x02
icyzkungz 6:5665d427bceb 30
icyzkungz 6:5665d427bceb 31 /*#define X_FINE_GAIN 0x03 // [7:0] fine gain
icyzkungz 6:5665d427bceb 32 #define Y_FINE_GAIN 0x04
icyzkungz 6:5665d427bceb 33 #define Z_FINE_GAIN 0x05
icyzkungz 6:5665d427bceb 34 #define XA_OFFSET_H 0x06 // User-defined trim values for accelerometer
icyzkungz 6:5665d427bceb 35 #define XA_OFFSET_L_TC 0x07
icyzkungz 6:5665d427bceb 36 #define YA_OFFSET_H 0x08
icyzkungz 6:5665d427bceb 37 #define YA_OFFSET_L_TC 0x09
icyzkungz 6:5665d427bceb 38 #define ZA_OFFSET_H 0x0A
icyzkungz 6:5665d427bceb 39 #define ZA_OFFSET_L_TC 0x0B */
icyzkungz 6:5665d427bceb 40
icyzkungz 6:5665d427bceb 41 #define SELF_TEST_X_ACCEL 0x0D
icyzkungz 6:5665d427bceb 42 #define SELF_TEST_Y_ACCEL 0x0E
icyzkungz 6:5665d427bceb 43 #define SELF_TEST_Z_ACCEL 0x0F
icyzkungz 6:5665d427bceb 44
icyzkungz 6:5665d427bceb 45 #define SELF_TEST_A 0x10
icyzkungz 6:5665d427bceb 46
icyzkungz 6:5665d427bceb 47 #define XG_OFFSET_H 0x13 // User-defined trim values for gyroscope
icyzkungz 6:5665d427bceb 48 #define XG_OFFSET_L 0x14
icyzkungz 6:5665d427bceb 49 #define YG_OFFSET_H 0x15
icyzkungz 6:5665d427bceb 50 #define YG_OFFSET_L 0x16
icyzkungz 6:5665d427bceb 51 #define ZG_OFFSET_H 0x17
icyzkungz 6:5665d427bceb 52 #define ZG_OFFSET_L 0x18
icyzkungz 6:5665d427bceb 53 #define SMPLRT_DIV 0x19
icyzkungz 6:5665d427bceb 54 #define CONFIG 0x1A
icyzkungz 6:5665d427bceb 55 #define GYRO_CONFIG 0x1B
icyzkungz 6:5665d427bceb 56 #define ACCEL_CONFIG 0x1C
icyzkungz 6:5665d427bceb 57 #define ACCEL_CONFIG2 0x1D
icyzkungz 6:5665d427bceb 58 #define LP_ACCEL_ODR 0x1E
icyzkungz 6:5665d427bceb 59 #define WOM_THR 0x1F
icyzkungz 6:5665d427bceb 60
icyzkungz 6:5665d427bceb 61 #define MOT_DUR 0x20 // Duration counter threshold for motion interrupt generation, 1 kHz rate, LSB = 1 ms
icyzkungz 6:5665d427bceb 62 #define ZMOT_THR 0x21 // Zero-motion detection threshold bits [7:0]
icyzkungz 6:5665d427bceb 63 #define ZRMOT_DUR 0x22 // Duration counter threshold for zero motion interrupt generation, 16 Hz rate, LSB = 64 ms
icyzkungz 6:5665d427bceb 64
icyzkungz 6:5665d427bceb 65 #define FIFO_EN 0x23
icyzkungz 6:5665d427bceb 66 #define I2C_MST_CTRL 0x24
icyzkungz 6:5665d427bceb 67 #define I2C_SLV0_ADDR 0x25
icyzkungz 6:5665d427bceb 68 #define I2C_SLV0_REG 0x26
icyzkungz 6:5665d427bceb 69 #define I2C_SLV0_CTRL 0x27
icyzkungz 6:5665d427bceb 70 #define I2C_SLV1_ADDR 0x28
icyzkungz 6:5665d427bceb 71 #define I2C_SLV1_REG 0x29
icyzkungz 6:5665d427bceb 72 #define I2C_SLV1_CTRL 0x2A
icyzkungz 6:5665d427bceb 73 #define I2C_SLV2_ADDR 0x2B
icyzkungz 6:5665d427bceb 74 #define I2C_SLV2_REG 0x2C
icyzkungz 6:5665d427bceb 75 #define I2C_SLV2_CTRL 0x2D
icyzkungz 6:5665d427bceb 76 #define I2C_SLV3_ADDR 0x2E
icyzkungz 6:5665d427bceb 77 #define I2C_SLV3_REG 0x2F
icyzkungz 6:5665d427bceb 78 #define I2C_SLV3_CTRL 0x30
icyzkungz 6:5665d427bceb 79 #define I2C_SLV4_ADDR 0x31
icyzkungz 6:5665d427bceb 80 #define I2C_SLV4_REG 0x32
icyzkungz 6:5665d427bceb 81 #define I2C_SLV4_DO 0x33
icyzkungz 6:5665d427bceb 82 #define I2C_SLV4_CTRL 0x34
icyzkungz 6:5665d427bceb 83 #define I2C_SLV4_DI 0x35
icyzkungz 6:5665d427bceb 84 #define I2C_MST_STATUS 0x36
icyzkungz 6:5665d427bceb 85 #define INT_PIN_CFG 0x37
icyzkungz 6:5665d427bceb 86 #define INT_ENABLE 0x38
icyzkungz 6:5665d427bceb 87 #define DMP_INT_STATUS 0x39 // Check DMP interrupt
icyzkungz 6:5665d427bceb 88 #define INT_STATUS 0x3A
icyzkungz 6:5665d427bceb 89 #define ACCEL_XOUT_H 0x3B
icyzkungz 6:5665d427bceb 90 #define ACCEL_XOUT_L 0x3C
icyzkungz 6:5665d427bceb 91 #define ACCEL_YOUT_H 0x3D
icyzkungz 6:5665d427bceb 92 #define ACCEL_YOUT_L 0x3E
icyzkungz 6:5665d427bceb 93 #define ACCEL_ZOUT_H 0x3F
icyzkungz 6:5665d427bceb 94 #define ACCEL_ZOUT_L 0x40
icyzkungz 6:5665d427bceb 95 #define TEMP_OUT_H 0x41
icyzkungz 6:5665d427bceb 96 #define TEMP_OUT_L 0x42
icyzkungz 6:5665d427bceb 97 #define GYRO_XOUT_H 0x43
icyzkungz 6:5665d427bceb 98 #define GYRO_XOUT_L 0x44
icyzkungz 6:5665d427bceb 99 #define GYRO_YOUT_H 0x45
icyzkungz 6:5665d427bceb 100 #define GYRO_YOUT_L 0x46
icyzkungz 6:5665d427bceb 101 #define GYRO_ZOUT_H 0x47
icyzkungz 6:5665d427bceb 102 #define GYRO_ZOUT_L 0x48
icyzkungz 6:5665d427bceb 103 #define EXT_SENS_DATA_00 0x49
icyzkungz 6:5665d427bceb 104 #define EXT_SENS_DATA_01 0x4A
icyzkungz 6:5665d427bceb 105 #define EXT_SENS_DATA_02 0x4B
icyzkungz 6:5665d427bceb 106 #define EXT_SENS_DATA_03 0x4C
icyzkungz 6:5665d427bceb 107 #define EXT_SENS_DATA_04 0x4D
icyzkungz 6:5665d427bceb 108 #define EXT_SENS_DATA_05 0x4E
icyzkungz 6:5665d427bceb 109 #define EXT_SENS_DATA_06 0x4F
icyzkungz 6:5665d427bceb 110 #define EXT_SENS_DATA_07 0x50
icyzkungz 6:5665d427bceb 111 #define EXT_SENS_DATA_08 0x51
icyzkungz 6:5665d427bceb 112 #define EXT_SENS_DATA_09 0x52
icyzkungz 6:5665d427bceb 113 #define EXT_SENS_DATA_10 0x53
icyzkungz 6:5665d427bceb 114 #define EXT_SENS_DATA_11 0x54
icyzkungz 6:5665d427bceb 115 #define EXT_SENS_DATA_12 0x55
icyzkungz 6:5665d427bceb 116 #define EXT_SENS_DATA_13 0x56
icyzkungz 6:5665d427bceb 117 #define EXT_SENS_DATA_14 0x57
icyzkungz 6:5665d427bceb 118 #define EXT_SENS_DATA_15 0x58
icyzkungz 6:5665d427bceb 119 #define EXT_SENS_DATA_16 0x59
icyzkungz 6:5665d427bceb 120 #define EXT_SENS_DATA_17 0x5A
icyzkungz 6:5665d427bceb 121 #define EXT_SENS_DATA_18 0x5B
icyzkungz 6:5665d427bceb 122 #define EXT_SENS_DATA_19 0x5C
icyzkungz 6:5665d427bceb 123 #define EXT_SENS_DATA_20 0x5D
icyzkungz 6:5665d427bceb 124 #define EXT_SENS_DATA_21 0x5E
icyzkungz 6:5665d427bceb 125 #define EXT_SENS_DATA_22 0x5F
icyzkungz 6:5665d427bceb 126 #define EXT_SENS_DATA_23 0x60
icyzkungz 6:5665d427bceb 127 #define MOT_DETECT_STATUS 0x61
icyzkungz 6:5665d427bceb 128 #define I2C_SLV0_DO 0x63
icyzkungz 6:5665d427bceb 129 #define I2C_SLV1_DO 0x64
icyzkungz 6:5665d427bceb 130 #define I2C_SLV2_DO 0x65
icyzkungz 6:5665d427bceb 131 #define I2C_SLV3_DO 0x66
icyzkungz 6:5665d427bceb 132 #define I2C_MST_DELAY_CTRL 0x67
icyzkungz 6:5665d427bceb 133 #define SIGNAL_PATH_RESET 0x68
icyzkungz 6:5665d427bceb 134 #define MOT_DETECT_CTRL 0x69
icyzkungz 6:5665d427bceb 135 #define USER_CTRL 0x6A // Bit 7 enable DMP, bit 3 reset DMP
icyzkungz 6:5665d427bceb 136 #define PWR_MGMT_1 0x6B // Device defaults to the SLEEP mode
icyzkungz 6:5665d427bceb 137 #define PWR_MGMT_2 0x6C
icyzkungz 6:5665d427bceb 138 #define DMP_BANK 0x6D // Activates a specific bank in the DMP
icyzkungz 6:5665d427bceb 139 #define DMP_RW_PNT 0x6E // Set read/write pointer to a specific start address in specified DMP bank
icyzkungz 6:5665d427bceb 140 #define DMP_REG 0x6F // Register in DMP from which to read or to which to write
icyzkungz 6:5665d427bceb 141 #define DMP_REG_1 0x70
icyzkungz 6:5665d427bceb 142 #define DMP_REG_2 0x71
icyzkungz 6:5665d427bceb 143 #define FIFO_COUNTH 0x72
icyzkungz 6:5665d427bceb 144 #define FIFO_COUNTL 0x73
icyzkungz 6:5665d427bceb 145 #define FIFO_R_W 0x74
icyzkungz 6:5665d427bceb 146 #define WHO_AM_I_MPU9250 0x75 // Should return 0x71
icyzkungz 6:5665d427bceb 147 #define XA_OFFSET_H 0x77
icyzkungz 6:5665d427bceb 148 #define XA_OFFSET_L 0x78
icyzkungz 6:5665d427bceb 149 #define YA_OFFSET_H 0x7A
icyzkungz 6:5665d427bceb 150 #define YA_OFFSET_L 0x7B
icyzkungz 6:5665d427bceb 151 #define ZA_OFFSET_H 0x7D
icyzkungz 6:5665d427bceb 152 #define ZA_OFFSET_L 0x7E
icyzkungz 6:5665d427bceb 153
icyzkungz 6:5665d427bceb 154
icyzkungz 6:5665d427bceb 155 // Using the MSENSR-9250 breakout board, ADO is set to 0
icyzkungz 6:5665d427bceb 156 // Seven-bit device address is 110100 for ADO = 0 and 110101 for ADO = 1
icyzkungz 6:5665d427bceb 157 //mbed uses the eight-bit device address, so shift seven-bit addresses left by one!
icyzkungz 6:5665d427bceb 158 /*#define ADO 0
icyzkungz 6:5665d427bceb 159 #if ADO
icyzkungz 6:5665d427bceb 160 #define MPU9250_ADDRESS 0x69<<1 // Device address when ADO = 1
icyzkungz 6:5665d427bceb 161 #else
icyzkungz 6:5665d427bceb 162 #define MPU9250_ADDRESS 0x68<<1 // Device address when ADO = 0
icyzkungz 6:5665d427bceb 163 #endif*/