sfbsg

Dependencies:   mbed

Committer:
borlanic
Date:
Tue Apr 03 15:17:11 2018 +0000
Revision:
0:8ab621116ccd
fg

Who changed what in which revision?

UserRevisionLine numberNew contents of line
borlanic 0:8ab621116ccd 1 /*
borlanic 0:8ab621116ccd 2 * EncoderCounter.cpp
borlanic 0:8ab621116ccd 3 * Copyright (c) 2017, ZHAW
borlanic 0:8ab621116ccd 4 * All rights reserved.
borlanic 0:8ab621116ccd 5 */
borlanic 0:8ab621116ccd 6
borlanic 0:8ab621116ccd 7 #include "EncoderCounter.h"
borlanic 0:8ab621116ccd 8
borlanic 0:8ab621116ccd 9 using namespace std;
borlanic 0:8ab621116ccd 10
borlanic 0:8ab621116ccd 11 /**
borlanic 0:8ab621116ccd 12 * Creates and initializes the driver to read the quadrature
borlanic 0:8ab621116ccd 13 * encoder counter of the STM32 microcontroller.
borlanic 0:8ab621116ccd 14 * @param a the input pin for the channel A.
borlanic 0:8ab621116ccd 15 * @param b the input pin for the channel B.
borlanic 0:8ab621116ccd 16 */
borlanic 0:8ab621116ccd 17 EncoderCounter::EncoderCounter(PinName a, PinName b) {
borlanic 0:8ab621116ccd 18
borlanic 0:8ab621116ccd 19 // check pins
borlanic 0:8ab621116ccd 20
borlanic 0:8ab621116ccd 21 if ((a == PA_6) && (b == PC_7)) {
borlanic 0:8ab621116ccd 22
borlanic 0:8ab621116ccd 23 // pinmap OK for TIM3 CH1 and CH2
borlanic 0:8ab621116ccd 24
borlanic 0:8ab621116ccd 25 TIM = TIM3;
borlanic 0:8ab621116ccd 26
borlanic 0:8ab621116ccd 27 // configure reset and clock control registers
borlanic 0:8ab621116ccd 28
borlanic 0:8ab621116ccd 29 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // manually enable port C (port A enabled by mbed library)
borlanic 0:8ab621116ccd 30
borlanic 0:8ab621116ccd 31 // configure general purpose I/O registers
borlanic 0:8ab621116ccd 32
borlanic 0:8ab621116ccd 33 GPIOA->MODER &= ~GPIO_MODER_MODER6; // reset port A6
borlanic 0:8ab621116ccd 34 GPIOA->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port A6
borlanic 0:8ab621116ccd 35 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port A6
borlanic 0:8ab621116ccd 36 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
borlanic 0:8ab621116ccd 37 GPIOA->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port A6
borlanic 0:8ab621116ccd 38 GPIOA->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port A6
borlanic 0:8ab621116ccd 39
borlanic 0:8ab621116ccd 40 GPIOC->MODER &= ~GPIO_MODER_MODER7; // reset port C7
borlanic 0:8ab621116ccd 41 GPIOC->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port C7
borlanic 0:8ab621116ccd 42 GPIOC->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port C7
borlanic 0:8ab621116ccd 43 GPIOC->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
borlanic 0:8ab621116ccd 44 GPIOC->AFR[0] &= ~0xF0000000; // reset alternate function of port C7
borlanic 0:8ab621116ccd 45 GPIOC->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port C7
borlanic 0:8ab621116ccd 46
borlanic 0:8ab621116ccd 47 // configure reset and clock control registers
borlanic 0:8ab621116ccd 48
borlanic 0:8ab621116ccd 49 RCC->APB1RSTR |= RCC_APB1RSTR_TIM3RST; //reset TIM3 controller
borlanic 0:8ab621116ccd 50 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM3RST;
borlanic 0:8ab621116ccd 51
borlanic 0:8ab621116ccd 52 RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; // TIM3 clock enable
borlanic 0:8ab621116ccd 53
borlanic 0:8ab621116ccd 54 } else if ((a == PB_6) && (b == PB_7)) {
borlanic 0:8ab621116ccd 55
borlanic 0:8ab621116ccd 56 // pinmap OK for TIM4 CH1 and CH2
borlanic 0:8ab621116ccd 57
borlanic 0:8ab621116ccd 58 TIM = TIM4;
borlanic 0:8ab621116ccd 59
borlanic 0:8ab621116ccd 60 // configure reset and clock control registers
borlanic 0:8ab621116ccd 61
borlanic 0:8ab621116ccd 62 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; // manually enable port B (port A enabled by mbed library)
borlanic 0:8ab621116ccd 63
borlanic 0:8ab621116ccd 64 // configure general purpose I/O registers
borlanic 0:8ab621116ccd 65
borlanic 0:8ab621116ccd 66 GPIOB->MODER &= ~GPIO_MODER_MODER6; // reset port B6
borlanic 0:8ab621116ccd 67 GPIOB->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port B6
borlanic 0:8ab621116ccd 68 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port B6
borlanic 0:8ab621116ccd 69 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
borlanic 0:8ab621116ccd 70 GPIOB->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port B6
borlanic 0:8ab621116ccd 71 GPIOB->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port B6
borlanic 0:8ab621116ccd 72
borlanic 0:8ab621116ccd 73 GPIOB->MODER &= ~GPIO_MODER_MODER7; // reset port B7
borlanic 0:8ab621116ccd 74 GPIOB->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port B7
borlanic 0:8ab621116ccd 75 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port B7
borlanic 0:8ab621116ccd 76 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
borlanic 0:8ab621116ccd 77 GPIOB->AFR[0] &= ~0xF0000000; // reset alternate function of port B7
borlanic 0:8ab621116ccd 78 GPIOB->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port B7
borlanic 0:8ab621116ccd 79
borlanic 0:8ab621116ccd 80 // configure reset and clock control registers
borlanic 0:8ab621116ccd 81
borlanic 0:8ab621116ccd 82 RCC->APB1RSTR |= RCC_APB1RSTR_TIM4RST; //reset TIM4 controller
borlanic 0:8ab621116ccd 83 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM4RST;
borlanic 0:8ab621116ccd 84
borlanic 0:8ab621116ccd 85 RCC->APB1ENR |= RCC_APB1ENR_TIM4EN; // TIM4 clock enable
borlanic 0:8ab621116ccd 86
borlanic 0:8ab621116ccd 87 } else {
borlanic 0:8ab621116ccd 88
borlanic 0:8ab621116ccd 89 printf("pinmap not found for peripheral\n");
borlanic 0:8ab621116ccd 90 }
borlanic 0:8ab621116ccd 91
borlanic 0:8ab621116ccd 92 // configure general purpose timer 3 or 4
borlanic 0:8ab621116ccd 93
borlanic 0:8ab621116ccd 94 TIM->CR1 = 0x0000; // counter disable
borlanic 0:8ab621116ccd 95 TIM->CR2 = 0x0000; // reset master mode selection
borlanic 0:8ab621116ccd 96 TIM->SMCR = TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0; // counting on both TI1 & TI2 edges
borlanic 0:8ab621116ccd 97 TIM->CCMR1 = TIM_CCMR1_CC2S_0 | TIM_CCMR1_CC1S_0;
borlanic 0:8ab621116ccd 98 TIM->CCMR2 = 0x0000; // reset capture mode register 2
borlanic 0:8ab621116ccd 99 TIM->CCER = TIM_CCER_CC2E | TIM_CCER_CC1E;
borlanic 0:8ab621116ccd 100 TIM->CNT = 0x0000; // reset counter value
borlanic 0:8ab621116ccd 101 TIM->ARR = 0xFFFF; // auto reload register
borlanic 0:8ab621116ccd 102 TIM->CR1 = TIM_CR1_CEN; // counter enable
borlanic 0:8ab621116ccd 103 }
borlanic 0:8ab621116ccd 104
borlanic 0:8ab621116ccd 105 EncoderCounter::~EncoderCounter() {}
borlanic 0:8ab621116ccd 106
borlanic 0:8ab621116ccd 107 /**
borlanic 0:8ab621116ccd 108 * Resets the counter value to zero.
borlanic 0:8ab621116ccd 109 */
borlanic 0:8ab621116ccd 110 void EncoderCounter::reset() {
borlanic 0:8ab621116ccd 111
borlanic 0:8ab621116ccd 112 TIM->CNT = 0x0000;
borlanic 0:8ab621116ccd 113 }
borlanic 0:8ab621116ccd 114
borlanic 0:8ab621116ccd 115 /**
borlanic 0:8ab621116ccd 116 * Resets the counter value to a given offset value.
borlanic 0:8ab621116ccd 117 * @param offset the offset value to reset the counter to.
borlanic 0:8ab621116ccd 118 */
borlanic 0:8ab621116ccd 119 void EncoderCounter::reset(short offset) {
borlanic 0:8ab621116ccd 120
borlanic 0:8ab621116ccd 121 TIM->CNT = -offset;
borlanic 0:8ab621116ccd 122 }
borlanic 0:8ab621116ccd 123
borlanic 0:8ab621116ccd 124 /**
borlanic 0:8ab621116ccd 125 * Reads the quadrature encoder counter value.
borlanic 0:8ab621116ccd 126 * @return the quadrature encoder counter as a signed 16-bit integer value.
borlanic 0:8ab621116ccd 127 */
borlanic 0:8ab621116ccd 128 short EncoderCounter::read() {
borlanic 0:8ab621116ccd 129
borlanic 0:8ab621116ccd 130 return (short)(-TIM->CNT);
borlanic 0:8ab621116ccd 131 }
borlanic 0:8ab621116ccd 132
borlanic 0:8ab621116ccd 133 /**
borlanic 0:8ab621116ccd 134 * The empty operator is a shorthand notation of the <code>read()</code> method.
borlanic 0:8ab621116ccd 135 */
borlanic 0:8ab621116ccd 136 EncoderCounter::operator short() {
borlanic 0:8ab621116ccd 137
borlanic 0:8ab621116ccd 138 return read();
borlanic 0:8ab621116ccd 139 }