BA / Mbed OS BaBoRo_test2

Backup 1

mbed-os/hal/spi_api.h@0:02dd72d1d465, 2018-04-24 (annotated)

Committer:
borlanic
Date:
Tue Apr 24 11:45:18 2018 +0000
Revision:
0:02dd72d1d465
BaBoRo_test2 - backup 1

Who changed what in which revision?

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borlanic 0:02dd72d1d465 1
borlanic 0:02dd72d1d465 2 /** \addtogroup hal */
borlanic 0:02dd72d1d465 3 /** @{*/
borlanic 0:02dd72d1d465 4 /* mbed Microcontroller Library
borlanic 0:02dd72d1d465 5 * Copyright (c) 2006-2013 ARM Limited
borlanic 0:02dd72d1d465 6 *
borlanic 0:02dd72d1d465 7 * Licensed under the Apache License, Version 2.0 (the "License");
borlanic 0:02dd72d1d465 8 * you may not use this file except in compliance with the License.
borlanic 0:02dd72d1d465 9 * You may obtain a copy of the License at
borlanic 0:02dd72d1d465 10 *
borlanic 0:02dd72d1d465 11 * http://www.apache.org/licenses/LICENSE-2.0
borlanic 0:02dd72d1d465 12 *
borlanic 0:02dd72d1d465 13 * Unless required by applicable law or agreed to in writing, software
borlanic 0:02dd72d1d465 14 * distributed under the License is distributed on an "AS IS" BASIS,
borlanic 0:02dd72d1d465 15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
borlanic 0:02dd72d1d465 16 * See the License for the specific language governing permissions and
borlanic 0:02dd72d1d465 17 * limitations under the License.
borlanic 0:02dd72d1d465 18 */
borlanic 0:02dd72d1d465 19 #ifndef MBED_SPI_API_H
borlanic 0:02dd72d1d465 20 #define MBED_SPI_API_H
borlanic 0:02dd72d1d465 21
borlanic 0:02dd72d1d465 22 #include "device.h"
borlanic 0:02dd72d1d465 23 #include "hal/dma_api.h"
borlanic 0:02dd72d1d465 24 #include "hal/buffer.h"
borlanic 0:02dd72d1d465 25
borlanic 0:02dd72d1d465 26 #if DEVICE_SPI
borlanic 0:02dd72d1d465 27
borlanic 0:02dd72d1d465 28 #define SPI_EVENT_ERROR (1 << 1)
borlanic 0:02dd72d1d465 29 #define SPI_EVENT_COMPLETE (1 << 2)
borlanic 0:02dd72d1d465 30 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
borlanic 0:02dd72d1d465 31 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
borlanic 0:02dd72d1d465 32
borlanic 0:02dd72d1d465 33 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // Internal flag to report that an event occurred
borlanic 0:02dd72d1d465 34
borlanic 0:02dd72d1d465 35 #define SPI_FILL_WORD (0xFFFF)
borlanic 0:02dd72d1d465 36 #define SPI_FILL_CHAR (0xFF)
borlanic 0:02dd72d1d465 37
borlanic 0:02dd72d1d465 38 #if DEVICE_SPI_ASYNCH
borlanic 0:02dd72d1d465 39 /** Asynch SPI HAL structure
borlanic 0:02dd72d1d465 40 */
borlanic 0:02dd72d1d465 41 typedef struct {
borlanic 0:02dd72d1d465 42 struct spi_s spi; /**< Target specific SPI structure */
borlanic 0:02dd72d1d465 43 struct buffer_s tx_buff; /**< Tx buffer */
borlanic 0:02dd72d1d465 44 struct buffer_s rx_buff; /**< Rx buffer */
borlanic 0:02dd72d1d465 45 } spi_t;
borlanic 0:02dd72d1d465 46
borlanic 0:02dd72d1d465 47 #else
borlanic 0:02dd72d1d465 48 /** Non-asynch SPI HAL structure
borlanic 0:02dd72d1d465 49 */
borlanic 0:02dd72d1d465 50 typedef struct spi_s spi_t;
borlanic 0:02dd72d1d465 51
borlanic 0:02dd72d1d465 52 #endif
borlanic 0:02dd72d1d465 53
borlanic 0:02dd72d1d465 54 #ifdef __cplusplus
borlanic 0:02dd72d1d465 55 extern "C" {
borlanic 0:02dd72d1d465 56 #endif
borlanic 0:02dd72d1d465 57
borlanic 0:02dd72d1d465 58 /**
borlanic 0:02dd72d1d465 59 * \defgroup hal_GeneralSPI SPI Configuration Functions
borlanic 0:02dd72d1d465 60 * @{
borlanic 0:02dd72d1d465 61 */
borlanic 0:02dd72d1d465 62
borlanic 0:02dd72d1d465 63 /** Initialize the SPI peripheral
borlanic 0:02dd72d1d465 64 *
borlanic 0:02dd72d1d465 65 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
borlanic 0:02dd72d1d465 66 * @param[out] obj The SPI object to initialize
borlanic 0:02dd72d1d465 67 * @param[in] mosi The pin to use for MOSI
borlanic 0:02dd72d1d465 68 * @param[in] miso The pin to use for MISO
borlanic 0:02dd72d1d465 69 * @param[in] sclk The pin to use for SCLK
borlanic 0:02dd72d1d465 70 * @param[in] ssel The pin to use for SSEL
borlanic 0:02dd72d1d465 71 */
borlanic 0:02dd72d1d465 72 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
borlanic 0:02dd72d1d465 73
borlanic 0:02dd72d1d465 74 /** Release a SPI object
borlanic 0:02dd72d1d465 75 *
borlanic 0:02dd72d1d465 76 * TODO: spi_free is currently unimplemented
borlanic 0:02dd72d1d465 77 * This will require reference counting at the C++ level to be safe
borlanic 0:02dd72d1d465 78 *
borlanic 0:02dd72d1d465 79 * Return the pins owned by the SPI object to their reset state
borlanic 0:02dd72d1d465 80 * Disable the SPI peripheral
borlanic 0:02dd72d1d465 81 * Disable the SPI clock
borlanic 0:02dd72d1d465 82 * @param[in] obj The SPI object to deinitialize
borlanic 0:02dd72d1d465 83 */
borlanic 0:02dd72d1d465 84 void spi_free(spi_t *obj);
borlanic 0:02dd72d1d465 85
borlanic 0:02dd72d1d465 86 /** Configure the SPI format
borlanic 0:02dd72d1d465 87 *
borlanic 0:02dd72d1d465 88 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode.
borlanic 0:02dd72d1d465 89 * The default bit order is MSB.
borlanic 0:02dd72d1d465 90 * @param[in,out] obj The SPI object to configure
borlanic 0:02dd72d1d465 91 * @param[in] bits The number of bits per frame
borlanic 0:02dd72d1d465 92 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
borlanic 0:02dd72d1d465 93 * @param[in] slave Zero for master mode or non-zero for slave mode
borlanic 0:02dd72d1d465 94 */
borlanic 0:02dd72d1d465 95 void spi_format(spi_t *obj, int bits, int mode, int slave);
borlanic 0:02dd72d1d465 96
borlanic 0:02dd72d1d465 97 /** Set the SPI baud rate
borlanic 0:02dd72d1d465 98 *
borlanic 0:02dd72d1d465 99 * Actual frequency may differ from the desired frequency due to available dividers and bus clock
borlanic 0:02dd72d1d465 100 * Configures the SPI peripheral's baud rate
borlanic 0:02dd72d1d465 101 * @param[in,out] obj The SPI object to configure
borlanic 0:02dd72d1d465 102 * @param[in] hz The baud rate in Hz
borlanic 0:02dd72d1d465 103 */
borlanic 0:02dd72d1d465 104 void spi_frequency(spi_t *obj, int hz);
borlanic 0:02dd72d1d465 105
borlanic 0:02dd72d1d465 106 /**@}*/
borlanic 0:02dd72d1d465 107 /**
borlanic 0:02dd72d1d465 108 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
borlanic 0:02dd72d1d465 109 * @{
borlanic 0:02dd72d1d465 110 */
borlanic 0:02dd72d1d465 111
borlanic 0:02dd72d1d465 112 /** Write a byte out in master mode and receive a value
borlanic 0:02dd72d1d465 113 *
borlanic 0:02dd72d1d465 114 * @param[in] obj The SPI peripheral to use for sending
borlanic 0:02dd72d1d465 115 * @param[in] value The value to send
borlanic 0:02dd72d1d465 116 * @return Returns the value received during send
borlanic 0:02dd72d1d465 117 */
borlanic 0:02dd72d1d465 118 int spi_master_write(spi_t *obj, int value);
borlanic 0:02dd72d1d465 119
borlanic 0:02dd72d1d465 120 /** Write a block out in master mode and receive a value
borlanic 0:02dd72d1d465 121 *
borlanic 0:02dd72d1d465 122 * The total number of bytes sent and received will be the maximum of
borlanic 0:02dd72d1d465 123 * tx_length and rx_length. The bytes written will be padded with the
borlanic 0:02dd72d1d465 124 * value 0xff.
borlanic 0:02dd72d1d465 125 *
borlanic 0:02dd72d1d465 126 * @param[in] obj The SPI peripheral to use for sending
borlanic 0:02dd72d1d465 127 * @param[in] tx_buffer Pointer to the byte-array of data to write to the device
borlanic 0:02dd72d1d465 128 * @param[in] tx_length Number of bytes to write, may be zero
borlanic 0:02dd72d1d465 129 * @param[in] rx_buffer Pointer to the byte-array of data to read from the device
borlanic 0:02dd72d1d465 130 * @param[in] rx_length Number of bytes to read, may be zero
borlanic 0:02dd72d1d465 131 * @param[in] write_fill Default data transmitted while performing a read
borlanic 0:02dd72d1d465 132 * @returns
borlanic 0:02dd72d1d465 133 * The number of bytes written and read from the device. This is
borlanic 0:02dd72d1d465 134 * maximum of tx_length and rx_length.
borlanic 0:02dd72d1d465 135 */
borlanic 0:02dd72d1d465 136 int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length, char write_fill);
borlanic 0:02dd72d1d465 137
borlanic 0:02dd72d1d465 138 /** Check if a value is available to read
borlanic 0:02dd72d1d465 139 *
borlanic 0:02dd72d1d465 140 * @param[in] obj The SPI peripheral to check
borlanic 0:02dd72d1d465 141 * @return non-zero if a value is available
borlanic 0:02dd72d1d465 142 */
borlanic 0:02dd72d1d465 143 int spi_slave_receive(spi_t *obj);
borlanic 0:02dd72d1d465 144
borlanic 0:02dd72d1d465 145 /** Get a received value out of the SPI receive buffer in slave mode
borlanic 0:02dd72d1d465 146 *
borlanic 0:02dd72d1d465 147 * Blocks until a value is available
borlanic 0:02dd72d1d465 148 * @param[in] obj The SPI peripheral to read
borlanic 0:02dd72d1d465 149 * @return The value received
borlanic 0:02dd72d1d465 150 */
borlanic 0:02dd72d1d465 151 int spi_slave_read(spi_t *obj);
borlanic 0:02dd72d1d465 152
borlanic 0:02dd72d1d465 153 /** Write a value to the SPI peripheral in slave mode
borlanic 0:02dd72d1d465 154 *
borlanic 0:02dd72d1d465 155 * Blocks until the SPI peripheral can be written to
borlanic 0:02dd72d1d465 156 * @param[in] obj The SPI peripheral to write
borlanic 0:02dd72d1d465 157 * @param[in] value The value to write
borlanic 0:02dd72d1d465 158 */
borlanic 0:02dd72d1d465 159 void spi_slave_write(spi_t *obj, int value);
borlanic 0:02dd72d1d465 160
borlanic 0:02dd72d1d465 161 /** Checks if the specified SPI peripheral is in use
borlanic 0:02dd72d1d465 162 *
borlanic 0:02dd72d1d465 163 * @param[in] obj The SPI peripheral to check
borlanic 0:02dd72d1d465 164 * @return non-zero if the peripheral is currently transmitting
borlanic 0:02dd72d1d465 165 */
borlanic 0:02dd72d1d465 166 int spi_busy(spi_t *obj);
borlanic 0:02dd72d1d465 167
borlanic 0:02dd72d1d465 168 /** Get the module number
borlanic 0:02dd72d1d465 169 *
borlanic 0:02dd72d1d465 170 * @param[in] obj The SPI peripheral to check
borlanic 0:02dd72d1d465 171 * @return The module number
borlanic 0:02dd72d1d465 172 */
borlanic 0:02dd72d1d465 173 uint8_t spi_get_module(spi_t *obj);
borlanic 0:02dd72d1d465 174
borlanic 0:02dd72d1d465 175 /**@}*/
borlanic 0:02dd72d1d465 176
borlanic 0:02dd72d1d465 177 #if DEVICE_SPI_ASYNCH
borlanic 0:02dd72d1d465 178 /**
borlanic 0:02dd72d1d465 179 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
borlanic 0:02dd72d1d465 180 * @{
borlanic 0:02dd72d1d465 181 */
borlanic 0:02dd72d1d465 182
borlanic 0:02dd72d1d465 183 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
borlanic 0:02dd72d1d465 184 *
borlanic 0:02dd72d1d465 185 * @param[in] obj The SPI object that holds the transfer information
borlanic 0:02dd72d1d465 186 * @param[in] tx The transmit buffer
borlanic 0:02dd72d1d465 187 * @param[in] tx_length The number of bytes to transmit
borlanic 0:02dd72d1d465 188 * @param[in] rx The receive buffer
borlanic 0:02dd72d1d465 189 * @param[in] rx_length The number of bytes to receive
borlanic 0:02dd72d1d465 190 * @param[in] bit_width The bit width of buffer words
borlanic 0:02dd72d1d465 191 * @param[in] event The logical OR of events to be registered
borlanic 0:02dd72d1d465 192 * @param[in] handler SPI interrupt handler
borlanic 0:02dd72d1d465 193 * @param[in] hint A suggestion for how to use DMA with this transfer
borlanic 0:02dd72d1d465 194 */
borlanic 0:02dd72d1d465 195 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
borlanic 0:02dd72d1d465 196
borlanic 0:02dd72d1d465 197 /** The asynchronous IRQ handler
borlanic 0:02dd72d1d465 198 *
borlanic 0:02dd72d1d465 199 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
borlanic 0:02dd72d1d465 200 * conditions, such as buffer overflows or transfer complete.
borlanic 0:02dd72d1d465 201 * @param[in] obj The SPI object that holds the transfer information
borlanic 0:02dd72d1d465 202 * @return Event flags if a transfer termination condition was met; otherwise 0.
borlanic 0:02dd72d1d465 203 */
borlanic 0:02dd72d1d465 204 uint32_t spi_irq_handler_asynch(spi_t *obj);
borlanic 0:02dd72d1d465 205
borlanic 0:02dd72d1d465 206 /** Attempts to determine if the SPI peripheral is already in use
borlanic 0:02dd72d1d465 207 *
borlanic 0:02dd72d1d465 208 * If a temporary DMA channel has been allocated, peripheral is in use.
borlanic 0:02dd72d1d465 209 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
borlanic 0:02dd72d1d465 210 * channel were allocated.
borlanic 0:02dd72d1d465 211 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
borlanic 0:02dd72d1d465 212 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
borlanic 0:02dd72d1d465 213 * there are any bytes in the FIFOs.
borlanic 0:02dd72d1d465 214 * @param[in] obj The SPI object to check for activity
borlanic 0:02dd72d1d465 215 * @return Non-zero if the SPI port is active or zero if it is not.
borlanic 0:02dd72d1d465 216 */
borlanic 0:02dd72d1d465 217 uint8_t spi_active(spi_t *obj);
borlanic 0:02dd72d1d465 218
borlanic 0:02dd72d1d465 219 /** Abort an SPI transfer
borlanic 0:02dd72d1d465 220 *
borlanic 0:02dd72d1d465 221 * @param obj The SPI peripheral to stop
borlanic 0:02dd72d1d465 222 */
borlanic 0:02dd72d1d465 223 void spi_abort_asynch(spi_t *obj);
borlanic 0:02dd72d1d465 224
borlanic 0:02dd72d1d465 225
borlanic 0:02dd72d1d465 226 #endif
borlanic 0:02dd72d1d465 227
borlanic 0:02dd72d1d465 228 /**@}*/
borlanic 0:02dd72d1d465 229
borlanic 0:02dd72d1d465 230 #ifdef __cplusplus
borlanic 0:02dd72d1d465 231 }
borlanic 0:02dd72d1d465 232 #endif // __cplusplus
borlanic 0:02dd72d1d465 233
borlanic 0:02dd72d1d465 234 #endif // SPI_DEVICE
borlanic 0:02dd72d1d465 235
borlanic 0:02dd72d1d465 236 #endif // MBED_SPI_API_H
borlanic 0:02dd72d1d465 237
borlanic 0:02dd72d1d465 238 /** @}*/