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mbed-os/drivers/SPI.cpp@4:75df35ef4fb6, 2018-03-30 (annotated)

Committer:
borlanic
Date:
Fri Mar 30 14:07:05 2018 +0000
Revision:
4:75df35ef4fb6
Parent:
0:380207fcb5c1 
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borlanic 0:380207fcb5c1 1 /* mbed Microcontroller Library
borlanic 0:380207fcb5c1 2 * Copyright (c) 2006-2013 ARM Limited
borlanic 0:380207fcb5c1 3 *
borlanic 0:380207fcb5c1 4 * Licensed under the Apache License, Version 2.0 (the "License");
borlanic 0:380207fcb5c1 5 * you may not use this file except in compliance with the License.
borlanic 0:380207fcb5c1 6 * You may obtain a copy of the License at
borlanic 0:380207fcb5c1 7 *
borlanic 0:380207fcb5c1 8 * http://www.apache.org/licenses/LICENSE-2.0
borlanic 0:380207fcb5c1 9 *
borlanic 0:380207fcb5c1 10 * Unless required by applicable law or agreed to in writing, software
borlanic 0:380207fcb5c1 11 * distributed under the License is distributed on an "AS IS" BASIS,
borlanic 0:380207fcb5c1 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
borlanic 0:380207fcb5c1 13 * See the License for the specific language governing permissions and
borlanic 0:380207fcb5c1 14 * limitations under the License.
borlanic 0:380207fcb5c1 15 */
borlanic 0:380207fcb5c1 16 #include "drivers/SPI.h"
borlanic 0:380207fcb5c1 17 #include "platform/mbed_critical.h"
borlanic 0:380207fcb5c1 18
borlanic 0:380207fcb5c1 19 #if DEVICE_SPI_ASYNCH
borlanic 0:380207fcb5c1 20 #include "platform/mbed_power_mgmt.h"
borlanic 0:380207fcb5c1 21 #endif
borlanic 0:380207fcb5c1 22
borlanic 0:380207fcb5c1 23 #if DEVICE_SPI
borlanic 0:380207fcb5c1 24
borlanic 0:380207fcb5c1 25 namespace mbed {
borlanic 0:380207fcb5c1 26
borlanic 0:380207fcb5c1 27 #if DEVICE_SPI_ASYNCH && TRANSACTION_QUEUE_SIZE_SPI
borlanic 0:380207fcb5c1 28 CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> SPI::_transaction_buffer;
borlanic 0:380207fcb5c1 29 #endif
borlanic 0:380207fcb5c1 30
borlanic 0:380207fcb5c1 31 SPI::SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel) :
borlanic 0:380207fcb5c1 32 _spi(),
borlanic 0:380207fcb5c1 33 #if DEVICE_SPI_ASYNCH
borlanic 0:380207fcb5c1 34 _irq(this),
borlanic 0:380207fcb5c1 35 _usage(DMA_USAGE_NEVER),
borlanic 0:380207fcb5c1 36 _deep_sleep_locked(false),
borlanic 0:380207fcb5c1 37 #endif
borlanic 0:380207fcb5c1 38 _bits(8),
borlanic 0:380207fcb5c1 39 _mode(0),
borlanic 0:380207fcb5c1 40 _hz(1000000),
borlanic 0:380207fcb5c1 41 _write_fill(SPI_FILL_CHAR) {
borlanic 0:380207fcb5c1 42 // No lock needed in the constructor
borlanic 0:380207fcb5c1 43
borlanic 0:380207fcb5c1 44 spi_init(&_spi, mosi, miso, sclk, ssel);
borlanic 0:380207fcb5c1 45 _acquire();
borlanic 0:380207fcb5c1 46 }
borlanic 0:380207fcb5c1 47
borlanic 0:380207fcb5c1 48 void SPI::format(int bits, int mode) {
borlanic 0:380207fcb5c1 49 lock();
borlanic 0:380207fcb5c1 50 _bits = bits;
borlanic 0:380207fcb5c1 51 _mode = mode;
borlanic 0:380207fcb5c1 52 // If changing format while you are the owner then just
borlanic 0:380207fcb5c1 53 // update format, but if owner is changed then even frequency should be
borlanic 0:380207fcb5c1 54 // updated which is done by acquire.
borlanic 0:380207fcb5c1 55 if (_owner == this) {
borlanic 0:380207fcb5c1 56 spi_format(&_spi, _bits, _mode, 0);
borlanic 0:380207fcb5c1 57 } else {
borlanic 0:380207fcb5c1 58 _acquire();
borlanic 0:380207fcb5c1 59 }
borlanic 0:380207fcb5c1 60 unlock();
borlanic 0:380207fcb5c1 61 }
borlanic 0:380207fcb5c1 62
borlanic 0:380207fcb5c1 63 void SPI::frequency(int hz) {
borlanic 0:380207fcb5c1 64 lock();
borlanic 0:380207fcb5c1 65 _hz = hz;
borlanic 0:380207fcb5c1 66 // If changing format while you are the owner then just
borlanic 0:380207fcb5c1 67 // update frequency, but if owner is changed then even frequency should be
borlanic 0:380207fcb5c1 68 // updated which is done by acquire.
borlanic 0:380207fcb5c1 69 if (_owner == this) {
borlanic 0:380207fcb5c1 70 spi_frequency(&_spi, _hz);
borlanic 0:380207fcb5c1 71 } else {
borlanic 0:380207fcb5c1 72 _acquire();
borlanic 0:380207fcb5c1 73 }
borlanic 0:380207fcb5c1 74 unlock();
borlanic 0:380207fcb5c1 75 }
borlanic 0:380207fcb5c1 76
borlanic 0:380207fcb5c1 77 SPI* SPI::_owner = NULL;
borlanic 0:380207fcb5c1 78 SingletonPtr<PlatformMutex> SPI::_mutex;
borlanic 0:380207fcb5c1 79
borlanic 0:380207fcb5c1 80 // ignore the fact there are multiple physical spis, and always update if it wasn't us last
borlanic 0:380207fcb5c1 81 void SPI::aquire() {
borlanic 0:380207fcb5c1 82 lock();
borlanic 0:380207fcb5c1 83 if (_owner != this) {
borlanic 0:380207fcb5c1 84 spi_format(&_spi, _bits, _mode, 0);
borlanic 0:380207fcb5c1 85 spi_frequency(&_spi, _hz);
borlanic 0:380207fcb5c1 86 _owner = this;
borlanic 0:380207fcb5c1 87 }
borlanic 0:380207fcb5c1 88 unlock();
borlanic 0:380207fcb5c1 89 }
borlanic 0:380207fcb5c1 90
borlanic 0:380207fcb5c1 91 // Note: Private function with no locking
borlanic 0:380207fcb5c1 92 void SPI::_acquire() {
borlanic 0:380207fcb5c1 93 if (_owner != this) {
borlanic 0:380207fcb5c1 94 spi_format(&_spi, _bits, _mode, 0);
borlanic 0:380207fcb5c1 95 spi_frequency(&_spi, _hz);
borlanic 0:380207fcb5c1 96 _owner = this;
borlanic 0:380207fcb5c1 97 }
borlanic 0:380207fcb5c1 98 }
borlanic 0:380207fcb5c1 99
borlanic 0:380207fcb5c1 100 int SPI::write(int value) {
borlanic 0:380207fcb5c1 101 lock();
borlanic 0:380207fcb5c1 102 _acquire();
borlanic 0:380207fcb5c1 103 int ret = spi_master_write(&_spi, value);
borlanic 0:380207fcb5c1 104 unlock();
borlanic 0:380207fcb5c1 105 return ret;
borlanic 0:380207fcb5c1 106 }
borlanic 0:380207fcb5c1 107
borlanic 0:380207fcb5c1 108 int SPI::write(const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length) {
borlanic 0:380207fcb5c1 109 lock();
borlanic 0:380207fcb5c1 110 _acquire();
borlanic 0:380207fcb5c1 111 int ret = spi_master_block_write(&_spi, tx_buffer, tx_length, rx_buffer, rx_length, _write_fill);
borlanic 0:380207fcb5c1 112 unlock();
borlanic 0:380207fcb5c1 113 return ret;
borlanic 0:380207fcb5c1 114 }
borlanic 0:380207fcb5c1 115
borlanic 0:380207fcb5c1 116 void SPI::lock() {
borlanic 0:380207fcb5c1 117 _mutex->lock();
borlanic 0:380207fcb5c1 118 }
borlanic 0:380207fcb5c1 119
borlanic 0:380207fcb5c1 120 void SPI::unlock() {
borlanic 0:380207fcb5c1 121 _mutex->unlock();
borlanic 0:380207fcb5c1 122 }
borlanic 0:380207fcb5c1 123
borlanic 0:380207fcb5c1 124 void SPI::set_default_write_value(char data) {
borlanic 0:380207fcb5c1 125 lock();
borlanic 0:380207fcb5c1 126 _write_fill = data;
borlanic 0:380207fcb5c1 127 unlock();
borlanic 0:380207fcb5c1 128 }
borlanic 0:380207fcb5c1 129
borlanic 0:380207fcb5c1 130 #if DEVICE_SPI_ASYNCH
borlanic 0:380207fcb5c1 131
borlanic 0:380207fcb5c1 132 int SPI::transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
borlanic 0:380207fcb5c1 133 {
borlanic 0:380207fcb5c1 134 if (spi_active(&_spi)) {
borlanic 0:380207fcb5c1 135 return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
borlanic 0:380207fcb5c1 136 }
borlanic 0:380207fcb5c1 137 start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
borlanic 0:380207fcb5c1 138 return 0;
borlanic 0:380207fcb5c1 139 }
borlanic 0:380207fcb5c1 140
borlanic 0:380207fcb5c1 141 void SPI::abort_transfer()
borlanic 0:380207fcb5c1 142 {
borlanic 0:380207fcb5c1 143 spi_abort_asynch(&_spi);
borlanic 0:380207fcb5c1 144 unlock_deep_sleep();
borlanic 0:380207fcb5c1 145 #if TRANSACTION_QUEUE_SIZE_SPI
borlanic 0:380207fcb5c1 146 dequeue_transaction();
borlanic 0:380207fcb5c1 147 #endif
borlanic 0:380207fcb5c1 148 }
borlanic 0:380207fcb5c1 149
borlanic 0:380207fcb5c1 150
borlanic 0:380207fcb5c1 151 void SPI::clear_transfer_buffer()
borlanic 0:380207fcb5c1 152 {
borlanic 0:380207fcb5c1 153 #if TRANSACTION_QUEUE_SIZE_SPI
borlanic 0:380207fcb5c1 154 _transaction_buffer.reset();
borlanic 0:380207fcb5c1 155 #endif
borlanic 0:380207fcb5c1 156 }
borlanic 0:380207fcb5c1 157
borlanic 0:380207fcb5c1 158 void SPI::abort_all_transfers()
borlanic 0:380207fcb5c1 159 {
borlanic 0:380207fcb5c1 160 clear_transfer_buffer();
borlanic 0:380207fcb5c1 161 abort_transfer();
borlanic 0:380207fcb5c1 162 }
borlanic 0:380207fcb5c1 163
borlanic 0:380207fcb5c1 164 int SPI::set_dma_usage(DMAUsage usage)
borlanic 0:380207fcb5c1 165 {
borlanic 0:380207fcb5c1 166 if (spi_active(&_spi)) {
borlanic 0:380207fcb5c1 167 return -1;
borlanic 0:380207fcb5c1 168 }
borlanic 0:380207fcb5c1 169 _usage = usage;
borlanic 0:380207fcb5c1 170 return 0;
borlanic 0:380207fcb5c1 171 }
borlanic 0:380207fcb5c1 172
borlanic 0:380207fcb5c1 173 int SPI::queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
borlanic 0:380207fcb5c1 174 {
borlanic 0:380207fcb5c1 175 #if TRANSACTION_QUEUE_SIZE_SPI
borlanic 0:380207fcb5c1 176 transaction_t t;
borlanic 0:380207fcb5c1 177
borlanic 0:380207fcb5c1 178 t.tx_buffer = const_cast<void *>(tx_buffer);
borlanic 0:380207fcb5c1 179 t.tx_length = tx_length;
borlanic 0:380207fcb5c1 180 t.rx_buffer = rx_buffer;
borlanic 0:380207fcb5c1 181 t.rx_length = rx_length;
borlanic 0:380207fcb5c1 182 t.event = event;
borlanic 0:380207fcb5c1 183 t.callback = callback;
borlanic 0:380207fcb5c1 184 t.width = bit_width;
borlanic 0:380207fcb5c1 185 Transaction<SPI> transaction(this, t);
borlanic 0:380207fcb5c1 186 if (_transaction_buffer.full()) {
borlanic 0:380207fcb5c1 187 return -1; // the buffer is full
borlanic 0:380207fcb5c1 188 } else {
borlanic 0:380207fcb5c1 189 core_util_critical_section_enter();
borlanic 0:380207fcb5c1 190 _transaction_buffer.push(transaction);
borlanic 0:380207fcb5c1 191 if (!spi_active(&_spi)) {
borlanic 0:380207fcb5c1 192 dequeue_transaction();
borlanic 0:380207fcb5c1 193 }
borlanic 0:380207fcb5c1 194 core_util_critical_section_exit();
borlanic 0:380207fcb5c1 195 return 0;
borlanic 0:380207fcb5c1 196 }
borlanic 0:380207fcb5c1 197 #else
borlanic 0:380207fcb5c1 198 return -1;
borlanic 0:380207fcb5c1 199 #endif
borlanic 0:380207fcb5c1 200 }
borlanic 0:380207fcb5c1 201
borlanic 0:380207fcb5c1 202 void SPI::start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
borlanic 0:380207fcb5c1 203 {
borlanic 0:380207fcb5c1 204 lock_deep_sleep();
borlanic 0:380207fcb5c1 205 _acquire();
borlanic 0:380207fcb5c1 206 _callback = callback;
borlanic 0:380207fcb5c1 207 _irq.callback(&SPI::irq_handler_asynch);
borlanic 0:380207fcb5c1 208 spi_master_transfer(&_spi, tx_buffer, tx_length, rx_buffer, rx_length, bit_width, _irq.entry(), event , _usage);
borlanic 0:380207fcb5c1 209 }
borlanic 0:380207fcb5c1 210
borlanic 0:380207fcb5c1 211 void SPI::lock_deep_sleep()
borlanic 0:380207fcb5c1 212 {
borlanic 0:380207fcb5c1 213 if (_deep_sleep_locked == false) {
borlanic 0:380207fcb5c1 214 sleep_manager_lock_deep_sleep();
borlanic 0:380207fcb5c1 215 _deep_sleep_locked = true;
borlanic 0:380207fcb5c1 216 }
borlanic 0:380207fcb5c1 217 }
borlanic 0:380207fcb5c1 218
borlanic 0:380207fcb5c1 219 void SPI::unlock_deep_sleep()
borlanic 0:380207fcb5c1 220 {
borlanic 0:380207fcb5c1 221 if (_deep_sleep_locked == true) {
borlanic 0:380207fcb5c1 222 sleep_manager_unlock_deep_sleep();
borlanic 0:380207fcb5c1 223 _deep_sleep_locked = false;
borlanic 0:380207fcb5c1 224 }
borlanic 0:380207fcb5c1 225 }
borlanic 0:380207fcb5c1 226
borlanic 0:380207fcb5c1 227 #if TRANSACTION_QUEUE_SIZE_SPI
borlanic 0:380207fcb5c1 228
borlanic 0:380207fcb5c1 229 void SPI::start_transaction(transaction_t *data)
borlanic 0:380207fcb5c1 230 {
borlanic 0:380207fcb5c1 231 start_transfer(data->tx_buffer, data->tx_length, data->rx_buffer, data->rx_length, data->width, data->callback, data->event);
borlanic 0:380207fcb5c1 232 }
borlanic 0:380207fcb5c1 233
borlanic 0:380207fcb5c1 234 void SPI::dequeue_transaction()
borlanic 0:380207fcb5c1 235 {
borlanic 0:380207fcb5c1 236 Transaction<SPI> t;
borlanic 0:380207fcb5c1 237 if (_transaction_buffer.pop(t)) {
borlanic 0:380207fcb5c1 238 SPI* obj = t.get_object();
borlanic 0:380207fcb5c1 239 transaction_t* data = t.get_transaction();
borlanic 0:380207fcb5c1 240 obj->start_transaction(data);
borlanic 0:380207fcb5c1 241 }
borlanic 0:380207fcb5c1 242 }
borlanic 0:380207fcb5c1 243
borlanic 0:380207fcb5c1 244 #endif
borlanic 0:380207fcb5c1 245
borlanic 0:380207fcb5c1 246 void SPI::irq_handler_asynch(void)
borlanic 0:380207fcb5c1 247 {
borlanic 0:380207fcb5c1 248 int event = spi_irq_handler_asynch(&_spi);
borlanic 0:380207fcb5c1 249 if (_callback && (event & SPI_EVENT_ALL)) {
borlanic 0:380207fcb5c1 250 unlock_deep_sleep();
borlanic 0:380207fcb5c1 251 _callback.call(event & SPI_EVENT_ALL);
borlanic 0:380207fcb5c1 252 }
borlanic 0:380207fcb5c1 253 #if TRANSACTION_QUEUE_SIZE_SPI
borlanic 0:380207fcb5c1 254 if (event & (SPI_EVENT_ALL | SPI_EVENT_INTERNAL_TRANSFER_COMPLETE)) {
borlanic 0:380207fcb5c1 255 // SPI peripheral is free (event happened), dequeue transaction
borlanic 0:380207fcb5c1 256 dequeue_transaction();
borlanic 0:380207fcb5c1 257 }
borlanic 0:380207fcb5c1 258 #endif
borlanic 0:380207fcb5c1 259 }
borlanic 0:380207fcb5c1 260
borlanic 0:380207fcb5c1 261 #endif
borlanic 0:380207fcb5c1 262
borlanic 0:380207fcb5c1 263 } // namespace mbed
borlanic 0:380207fcb5c1 264
borlanic 0:380207fcb5c1 265 #endif