BA / Mbed OS BaBoRo1

Erste version der Software für der Prototyp

EncoderCounter.cpp@4:75df35ef4fb6, 2018-03-30 (annotated)

Committer:
borlanic
Date:
Fri Mar 30 14:07:05 2018 +0000
Revision:
4:75df35ef4fb6
Parent:
0:380207fcb5c1 
commentar

Who changed what in which revision?

UserRevisionLine numberNew contents of line
borlanic 0:380207fcb5c1 1 /*
borlanic 0:380207fcb5c1 2 * EncoderCounter.cpp
borlanic 0:380207fcb5c1 3 * Copyright (c) 2018, ZHAW
borlanic 0:380207fcb5c1 4 * All rights reserved.
borlanic 0:380207fcb5c1 5 */
borlanic 0:380207fcb5c1 6
borlanic 0:380207fcb5c1 7 #include "EncoderCounter.h"
borlanic 0:380207fcb5c1 8
borlanic 0:380207fcb5c1 9 using namespace std;
borlanic 0:380207fcb5c1 10
borlanic 0:380207fcb5c1 11 /**
borlanic 0:380207fcb5c1 12 * Creates and initializes the driver to read the quadrature
borlanic 0:380207fcb5c1 13 * encoder counter of the STM32 microcontroller.
borlanic 0:380207fcb5c1 14 * @param a the input pin for the channel A.
borlanic 0:380207fcb5c1 15 * @param b the input pin for the channel B.
borlanic 0:380207fcb5c1 16 */
borlanic 0:380207fcb5c1 17 EncoderCounter::EncoderCounter(PinName a, PinName b) {
borlanic 0:380207fcb5c1 18
borlanic 0:380207fcb5c1 19 // check pins
borlanic 0:380207fcb5c1 20
borlanic 0:380207fcb5c1 21 if ((a == PA_0) && (b == PA_1)) {
borlanic 0:380207fcb5c1 22
borlanic 0:380207fcb5c1 23 // pinmap OK for TIM2 CH1 and CH2
borlanic 0:380207fcb5c1 24
borlanic 0:380207fcb5c1 25 TIM = TIM2;
borlanic 0:380207fcb5c1 26
borlanic 0:380207fcb5c1 27 // configure general purpose I/O registers
borlanic 0:380207fcb5c1 28
borlanic 0:380207fcb5c1 29 GPIOA->MODER &= ~GPIO_MODER_MODER0; // reset port A0
borlanic 0:380207fcb5c1 30 GPIOA->MODER |= GPIO_MODER_MODER0_1; // set alternate mode of port A0
borlanic 0:380207fcb5c1 31 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR0; // reset pull-up/pull-down on port A0
borlanic 0:380207fcb5c1 32 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR0_1; // set input as pull-down
borlanic 0:380207fcb5c1 33 GPIOA->AFR[0] &= ~(0xF << 4*0); // reset alternate function of port A0
borlanic 0:380207fcb5c1 34 GPIOA->AFR[0] |= 1 << 4*0; // set alternate funtion 1 of port A0
borlanic 0:380207fcb5c1 35
borlanic 0:380207fcb5c1 36 GPIOA->MODER &= ~GPIO_MODER_MODER1; // reset port A1
borlanic 0:380207fcb5c1 37 GPIOA->MODER |= GPIO_MODER_MODER1_1; // set alternate mode of port A1
borlanic 0:380207fcb5c1 38 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR1; // reset pull-up/pull-down on port A1
borlanic 0:380207fcb5c1 39 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR1_1; // set input as pull-down
borlanic 0:380207fcb5c1 40 GPIOA->AFR[0] &= ~(0xF << 4*1); // reset alternate function of port A1
borlanic 0:380207fcb5c1 41 GPIOA->AFR[0] |= 1 << 4*1; // set alternate funtion 1 of port A1
borlanic 0:380207fcb5c1 42
borlanic 0:380207fcb5c1 43 // configure reset and clock control registers
borlanic 0:380207fcb5c1 44
borlanic 0:380207fcb5c1 45 RCC->APB1RSTR |= RCC_APB1RSTR_TIM2RST; //reset TIM2 controller
borlanic 0:380207fcb5c1 46 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM2RST;
borlanic 0:380207fcb5c1 47
borlanic 0:380207fcb5c1 48 RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; // TIM2 clock enable
borlanic 0:380207fcb5c1 49
borlanic 0:380207fcb5c1 50 } else if ((a == PA_6) && (b == PC_7)) {
borlanic 0:380207fcb5c1 51
borlanic 0:380207fcb5c1 52 // pinmap OK for TIM3 CH1 and CH2
borlanic 0:380207fcb5c1 53
borlanic 0:380207fcb5c1 54 TIM = TIM3;
borlanic 0:380207fcb5c1 55
borlanic 0:380207fcb5c1 56 // configure reset and clock control registers
borlanic 0:380207fcb5c1 57
borlanic 0:380207fcb5c1 58 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // manually enable port C (port A enabled by mbed library)
borlanic 0:380207fcb5c1 59
borlanic 0:380207fcb5c1 60 // configure general purpose I/O registers
borlanic 0:380207fcb5c1 61
borlanic 0:380207fcb5c1 62 GPIOA->MODER &= ~GPIO_MODER_MODER6; // reset port A6
borlanic 0:380207fcb5c1 63 GPIOA->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port A6
borlanic 0:380207fcb5c1 64 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port A6
borlanic 0:380207fcb5c1 65 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
borlanic 0:380207fcb5c1 66 GPIOA->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port A6
borlanic 0:380207fcb5c1 67 GPIOA->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port A6
borlanic 0:380207fcb5c1 68
borlanic 0:380207fcb5c1 69 GPIOC->MODER &= ~GPIO_MODER_MODER7; // reset port C7
borlanic 0:380207fcb5c1 70 GPIOC->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port C7
borlanic 0:380207fcb5c1 71 GPIOC->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port C7
borlanic 0:380207fcb5c1 72 GPIOC->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
borlanic 0:380207fcb5c1 73 GPIOC->AFR[0] &= ~0xF0000000; // reset alternate function of port C7
borlanic 0:380207fcb5c1 74 GPIOC->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port C7
borlanic 0:380207fcb5c1 75
borlanic 0:380207fcb5c1 76 // configure reset and clock control registers
borlanic 0:380207fcb5c1 77
borlanic 0:380207fcb5c1 78 RCC->APB1RSTR |= RCC_APB1RSTR_TIM3RST; //reset TIM3 controller
borlanic 0:380207fcb5c1 79 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM3RST;
borlanic 0:380207fcb5c1 80
borlanic 0:380207fcb5c1 81 RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; // TIM3 clock enable
borlanic 0:380207fcb5c1 82
borlanic 0:380207fcb5c1 83 } else if ((a == PB_6) && (b == PB_7)) {
borlanic 0:380207fcb5c1 84
borlanic 0:380207fcb5c1 85 // pinmap OK for TIM4 CH1 and CH2
borlanic 0:380207fcb5c1 86
borlanic 0:380207fcb5c1 87 TIM = TIM4;
borlanic 0:380207fcb5c1 88
borlanic 0:380207fcb5c1 89 // configure reset and clock control registers
borlanic 0:380207fcb5c1 90
borlanic 0:380207fcb5c1 91 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; // manually enable port B (port A enabled by mbed library)
borlanic 0:380207fcb5c1 92
borlanic 0:380207fcb5c1 93 // configure general purpose I/O registers
borlanic 0:380207fcb5c1 94
borlanic 0:380207fcb5c1 95 GPIOB->MODER &= ~GPIO_MODER_MODER6; // reset port B6
borlanic 0:380207fcb5c1 96 GPIOB->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port B6
borlanic 0:380207fcb5c1 97 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port B6
borlanic 0:380207fcb5c1 98 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
borlanic 0:380207fcb5c1 99 GPIOB->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port B6
borlanic 0:380207fcb5c1 100 GPIOB->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port B6
borlanic 0:380207fcb5c1 101
borlanic 0:380207fcb5c1 102 GPIOB->MODER &= ~GPIO_MODER_MODER7; // reset port B7
borlanic 0:380207fcb5c1 103 GPIOB->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port B7
borlanic 0:380207fcb5c1 104 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port B7
borlanic 0:380207fcb5c1 105 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
borlanic 0:380207fcb5c1 106 GPIOB->AFR[0] &= ~0xF0000000; // reset alternate function of port B7
borlanic 0:380207fcb5c1 107 GPIOB->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port B7
borlanic 0:380207fcb5c1 108
borlanic 0:380207fcb5c1 109 // configure reset and clock control registers
borlanic 0:380207fcb5c1 110
borlanic 0:380207fcb5c1 111 RCC->APB1RSTR |= RCC_APB1RSTR_TIM4RST; //reset TIM4 controller
borlanic 0:380207fcb5c1 112 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM4RST;
borlanic 0:380207fcb5c1 113
borlanic 0:380207fcb5c1 114 RCC->APB1ENR |= RCC_APB1ENR_TIM4EN; // TIM4 clock enable
borlanic 0:380207fcb5c1 115
borlanic 0:380207fcb5c1 116 } else {
borlanic 0:380207fcb5c1 117
borlanic 0:380207fcb5c1 118 printf("pinmap not found for peripheral\n");
borlanic 0:380207fcb5c1 119 }
borlanic 0:380207fcb5c1 120
borlanic 0:380207fcb5c1 121 // configure general purpose timer 3 or 4
borlanic 0:380207fcb5c1 122
borlanic 0:380207fcb5c1 123 TIM->CR1 = 0x0000; // counter disable
borlanic 0:380207fcb5c1 124 TIM->CR2 = 0x0000; // reset master mode selection
borlanic 0:380207fcb5c1 125 TIM->SMCR = TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0; // counting on both TI1 & TI2 edges
borlanic 0:380207fcb5c1 126 TIM->CCMR1 = TIM_CCMR1_CC2S_0 | TIM_CCMR1_CC1S_0;
borlanic 0:380207fcb5c1 127 TIM->CCMR2 = 0x0000; // reset capture mode register 2
borlanic 0:380207fcb5c1 128 TIM->CCER = TIM_CCER_CC2E | TIM_CCER_CC1E;
borlanic 0:380207fcb5c1 129 TIM->CNT = 0x0000; // reset counter value
borlanic 0:380207fcb5c1 130 TIM->ARR = 0xFFFF; // auto reload register
borlanic 0:380207fcb5c1 131 TIM->CR1 = TIM_CR1_CEN; // counter enable
borlanic 0:380207fcb5c1 132 }
borlanic 0:380207fcb5c1 133
borlanic 0:380207fcb5c1 134 EncoderCounter::~EncoderCounter() {}
borlanic 0:380207fcb5c1 135
borlanic 0:380207fcb5c1 136 /**
borlanic 0:380207fcb5c1 137 * Resets the counter value to zero.
borlanic 0:380207fcb5c1 138 */
borlanic 0:380207fcb5c1 139 void EncoderCounter::reset() {
borlanic 0:380207fcb5c1 140
borlanic 0:380207fcb5c1 141 TIM->CNT = 0x0000;
borlanic 0:380207fcb5c1 142 }
borlanic 0:380207fcb5c1 143
borlanic 0:380207fcb5c1 144 /**
borlanic 0:380207fcb5c1 145 * Resets the counter value to a given offset value.
borlanic 0:380207fcb5c1 146 * @param offset the offset value to reset the counter to.
borlanic 0:380207fcb5c1 147 */
borlanic 0:380207fcb5c1 148 void EncoderCounter::reset(int16_t offset) {
borlanic 0:380207fcb5c1 149
borlanic 0:380207fcb5c1 150 TIM->CNT = -offset;
borlanic 0:380207fcb5c1 151 }
borlanic 0:380207fcb5c1 152
borlanic 0:380207fcb5c1 153 /**
borlanic 0:380207fcb5c1 154 * Reads the quadrature encoder counter value.
borlanic 0:380207fcb5c1 155 * @return the quadrature encoder counter as a signed 16-bit integer value.
borlanic 0:380207fcb5c1 156 */
borlanic 0:380207fcb5c1 157 int16_t EncoderCounter::read() {
borlanic 0:380207fcb5c1 158
borlanic 0:380207fcb5c1 159 return static_cast<int16_t>(-TIM->CNT);
borlanic 0:380207fcb5c1 160 }
borlanic 0:380207fcb5c1 161
borlanic 0:380207fcb5c1 162 /**
borlanic 0:380207fcb5c1 163 * The empty operator is a shorthand notation of the <code>read()</code> method.
borlanic 0:380207fcb5c1 164 */
borlanic 0:380207fcb5c1 165 EncoderCounter::operator int16_t() {
borlanic 0:380207fcb5c1 166
borlanic 0:380207fcb5c1 167 return read();
borlanic 0:380207fcb5c1 168 }
borlanic 0:380207fcb5c1 169