Arrow / Mbed OS DAPLink Reset
Embed: (wiki syntax)

« Back to documentation index

Twi Struct Reference

Twi Struct Reference
[Two-wire Interface]

Twi hardware registers. More...

#include <twi.h>

Data Fields

WoReg TWI_CR
 (Twi Offset: 0x00) Control Register
RwReg TWI_MMR
 (Twi Offset: 0x04) Master Mode Register
RwReg TWI_SMR
 (Twi Offset: 0x08) Slave Mode Register
RwReg TWI_IADR
 (Twi Offset: 0x0C) Internal Address Register
RwReg TWI_CWGR
 (Twi Offset: 0x10) Clock Waveform Generator Register
RoReg TWI_SR
 (Twi Offset: 0x20) Status Register
WoReg TWI_IER
 (Twi Offset: 0x24) Interrupt Enable Register
WoReg TWI_IDR
 (Twi Offset: 0x28) Interrupt Disable Register
RoReg TWI_IMR
 (Twi Offset: 0x2C) Interrupt Mask Register
RoReg TWI_RHR
 (Twi Offset: 0x30) Receive Holding Register
WoReg TWI_THR
 (Twi Offset: 0x34) Transmit Holding Register
RwReg TWI_RPR
 (Twi Offset: 0x100) Receive Pointer Register
RwReg TWI_RCR
 (Twi Offset: 0x104) Receive Counter Register
RwReg TWI_TPR
 (Twi Offset: 0x108) Transmit Pointer Register
RwReg TWI_TCR
 (Twi Offset: 0x10C) Transmit Counter Register
RwReg TWI_RNPR
 (Twi Offset: 0x110) Receive Next Pointer Register
RwReg TWI_RNCR
 (Twi Offset: 0x114) Receive Next Counter Register
RwReg TWI_TNPR
 (Twi Offset: 0x118) Transmit Next Pointer Register
RwReg TWI_TNCR
 (Twi Offset: 0x11C) Transmit Next Counter Register
WoReg TWI_PTCR
 (Twi Offset: 0x120) Transfer Control Register
RoReg TWI_PTSR
 (Twi Offset: 0x124) Transfer Status Register

Detailed Description

Twi hardware registers.

Definition at line 41 of file twi.h.


Field Documentation

(Twi Offset: 0x00) Control Register

Definition at line 42 of file twi.h.

(Twi Offset: 0x10) Clock Waveform Generator Register

Definition at line 46 of file twi.h.

(Twi Offset: 0x0C) Internal Address Register

Definition at line 45 of file twi.h.

(Twi Offset: 0x28) Interrupt Disable Register

Definition at line 50 of file twi.h.

(Twi Offset: 0x24) Interrupt Enable Register

Definition at line 49 of file twi.h.

(Twi Offset: 0x2C) Interrupt Mask Register

Definition at line 51 of file twi.h.

(Twi Offset: 0x04) Master Mode Register

Definition at line 43 of file twi.h.

(Twi Offset: 0x120) Transfer Control Register

Definition at line 63 of file twi.h.

(Twi Offset: 0x124) Transfer Status Register

Definition at line 64 of file twi.h.

(Twi Offset: 0x104) Receive Counter Register

Definition at line 56 of file twi.h.

(Twi Offset: 0x30) Receive Holding Register

Definition at line 52 of file twi.h.

(Twi Offset: 0x114) Receive Next Counter Register

Definition at line 60 of file twi.h.

(Twi Offset: 0x110) Receive Next Pointer Register

Definition at line 59 of file twi.h.

(Twi Offset: 0x100) Receive Pointer Register

Definition at line 55 of file twi.h.

(Twi Offset: 0x08) Slave Mode Register

Definition at line 44 of file twi.h.

(Twi Offset: 0x20) Status Register

Definition at line 48 of file twi.h.

(Twi Offset: 0x10C) Transmit Counter Register

Definition at line 58 of file twi.h.

(Twi Offset: 0x34) Transmit Holding Register

Definition at line 53 of file twi.h.

(Twi Offset: 0x11C) Transmit Next Counter Register

Definition at line 62 of file twi.h.

(Twi Offset: 0x118) Transmit Next Pointer Register

Definition at line 61 of file twi.h.

(Twi Offset: 0x108) Transmit Pointer Register

Definition at line 57 of file twi.h.