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Spi Struct Reference

Spi Struct Reference
[Serial Peripheral Interface]

Spi hardware registers. More...

#include <spi.h>

Data Fields

WoReg SPI_CR
 (Spi Offset: 0x00) Control Register
RwReg SPI_MR
 (Spi Offset: 0x04) Mode Register
RoReg SPI_RDR
 (Spi Offset: 0x08) Receive Data Register
WoReg SPI_TDR
 (Spi Offset: 0x0C) Transmit Data Register
RoReg SPI_SR
 (Spi Offset: 0x10) Status Register
WoReg SPI_IER
 (Spi Offset: 0x14) Interrupt Enable Register
WoReg SPI_IDR
 (Spi Offset: 0x18) Interrupt Disable Register
RoReg SPI_IMR
 (Spi Offset: 0x1C) Interrupt Mask Register
RwReg SPI_CSR [4]
 (Spi Offset: 0x30) Chip Select Register
RwReg SPI_WPMR
 (Spi Offset: 0xE4) Write Protection Control Register
RoReg SPI_WPSR
 (Spi Offset: 0xE8) Write Protection Status Register

Detailed Description

Spi hardware registers.

Definition at line 41 of file component/spi.h.


Field Documentation

(Spi Offset: 0x00) Control Register

Definition at line 42 of file component/spi.h.

(Spi Offset: 0x30) Chip Select Register

Definition at line 51 of file component/spi.h.

(Spi Offset: 0x18) Interrupt Disable Register

Definition at line 48 of file component/spi.h.

(Spi Offset: 0x14) Interrupt Enable Register

Definition at line 47 of file component/spi.h.

(Spi Offset: 0x1C) Interrupt Mask Register

Definition at line 49 of file component/spi.h.

(Spi Offset: 0x04) Mode Register

Definition at line 43 of file component/spi.h.

(Spi Offset: 0x08) Receive Data Register

Definition at line 44 of file component/spi.h.

(Spi Offset: 0x10) Status Register

Definition at line 46 of file component/spi.h.

(Spi Offset: 0x0C) Transmit Data Register

Definition at line 45 of file component/spi.h.

(Spi Offset: 0xE4) Write Protection Control Register

Definition at line 53 of file component/spi.h.

(Spi Offset: 0xE8) Write Protection Status Register

Definition at line 54 of file component/spi.h.