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PwmCh_num Struct Reference

PwmCh_num Struct Reference
[Pulse Width Modulation Controller]

PwmCh_num hardware registers. More...

#include <pwm.h>

Data Fields

RwReg PWM_CMR
 (PwmCh_num Offset: 0x0) PWM Channel Mode Register
RwReg PWM_CDTY
 (PwmCh_num Offset: 0x4) PWM Channel Duty Cycle Register
RwReg PWM_CDTYUPD
 (PwmCh_num Offset: 0x8) PWM Channel Duty Cycle Update Register
RwReg PWM_CPRD
 (PwmCh_num Offset: 0xC) PWM Channel Period Register
RwReg PWM_CPRDUPD
 (PwmCh_num Offset: 0x10) PWM Channel Period Update Register
RwReg PWM_CCNT
 (PwmCh_num Offset: 0x14) PWM Channel Counter Register
RwReg PWM_DT
 (PwmCh_num Offset: 0x18) PWM Channel Dead Time Register
RwReg PWM_DTUPD
 (PwmCh_num Offset: 0x1C) PWM Channel Dead Time Update Register

Detailed Description

PwmCh_num hardware registers.

Definition at line 41 of file component/pwm.h.


Field Documentation

(PwmCh_num Offset: 0x14) PWM Channel Counter Register

Definition at line 47 of file component/pwm.h.

(PwmCh_num Offset: 0x4) PWM Channel Duty Cycle Register

Definition at line 43 of file component/pwm.h.

(PwmCh_num Offset: 0x8) PWM Channel Duty Cycle Update Register

Definition at line 44 of file component/pwm.h.

(PwmCh_num Offset: 0x0) PWM Channel Mode Register

Definition at line 42 of file component/pwm.h.

(PwmCh_num Offset: 0xC) PWM Channel Period Register

Definition at line 45 of file component/pwm.h.

(PwmCh_num Offset: 0x10) PWM Channel Period Update Register

Definition at line 46 of file component/pwm.h.

(PwmCh_num Offset: 0x18) PWM Channel Dead Time Register

Definition at line 48 of file component/pwm.h.

(PwmCh_num Offset: 0x1C) PWM Channel Dead Time Update Register

Definition at line 49 of file component/pwm.h.