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CAN_Type Struct Reference
CAN - Register Layout Typedef.
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#include <MK26F18.h >
Data Fields
__IO uint32_t MCR
Module Configuration Register, offset: 0x0.
__IO uint32_t CTRL1
Control 1 register, offset: 0x4.
__IO uint32_t TIMER
Free Running Timer, offset: 0x8.
__IO uint32_t RXMGMASK
Rx Mailboxes Global Mask Register, offset: 0x10.
__IO uint32_t RX14MASK
Rx 14 Mask register, offset: 0x14.
__IO uint32_t RX15MASK
Rx 15 Mask register, offset: 0x18.
__IO uint32_t ECR
Error Counter, offset: 0x1C.
__IO uint32_t ESR1
Error and Status 1 register, offset: 0x20.
__IO uint32_t IMASK1
Interrupt Masks 1 register, offset: 0x28.
__IO uint32_t IFLAG1
Interrupt Flags 1 register, offset: 0x30.
__IO uint32_t CTRL2
Control 2 register, offset: 0x34.
__I uint32_t ESR2
Error and Status 2 register, offset: 0x38.
__I uint32_t CRCR
CRC Register, offset: 0x44.
__IO uint32_t RXFGMASK
Rx FIFO Global Mask register, offset: 0x48.
__I uint32_t RXFIR
Rx FIFO Information Register, offset: 0x4C.
__IO uint32_t RXIMR [16]
Rx Individual Mask Registers, array offset: 0x880, array step: 0x4.
__IO uint32_t CS
Message Buffer 0 CS Register..Message Buffer 15 CS Register, array offset: 0x80, array step: 0x10.
__IO uint32_t ID
Message Buffer 0 ID Register..Message Buffer 15 ID Register, array offset: 0x84, array step: 0x10.
__IO uint32_t WORD0
Message Buffer 0 WORD0 Register..Message Buffer 15 WORD0 Register, array offset: 0x88, array step: 0x10.
__IO uint32_t WORD1
Message Buffer 0 WORD1 Register..Message Buffer 15 WORD1 Register, array offset: 0x8C, array step: 0x10.
Detailed Description
CAN - Register Layout Typedef.
Definition at line 4138 of file MK26F18.h .
Field Documentation
CRC Register, offset: 0x44.
Definition at line 4155 of file MK26F18.h .
Message Buffer 0 CS Register..Message Buffer 15 CS Register, array offset: 0x80, array step: 0x10.
Definition at line 4160 of file MK26F18.h .
Control 1 register, offset: 0x4.
Definition at line 4140 of file MK26F18.h .
Control 2 register, offset: 0x34.
Definition at line 4152 of file MK26F18.h .
Error Counter, offset: 0x1C.
Definition at line 4146 of file MK26F18.h .
Error and Status 1 register, offset: 0x20.
Definition at line 4147 of file MK26F18.h .
Error and Status 2 register, offset: 0x38.
Definition at line 4153 of file MK26F18.h .
Message Buffer 0 ID Register..Message Buffer 15 ID Register, array offset: 0x84, array step: 0x10.
Definition at line 4161 of file MK26F18.h .
Interrupt Flags 1 register, offset: 0x30.
Definition at line 4151 of file MK26F18.h .
Interrupt Masks 1 register, offset: 0x28.
Definition at line 4149 of file MK26F18.h .
Module Configuration Register, offset: 0x0.
Definition at line 4139 of file MK26F18.h .
Rx 14 Mask register, offset: 0x14.
Definition at line 4144 of file MK26F18.h .
Rx 15 Mask register, offset: 0x18.
Definition at line 4145 of file MK26F18.h .
Rx FIFO Global Mask register, offset: 0x48.
Definition at line 4156 of file MK26F18.h .
Rx FIFO Information Register, offset: 0x4C.
Definition at line 4157 of file MK26F18.h .
Rx Individual Mask Registers, array offset: 0x880, array step: 0x4.
Definition at line 4166 of file MK26F18.h .
Rx Mailboxes Global Mask Register, offset: 0x10.
Definition at line 4143 of file MK26F18.h .
Free Running Timer, offset: 0x8.
Definition at line 4141 of file MK26F18.h .
Message Buffer 0 WORD0 Register..Message Buffer 15 WORD0 Register, array offset: 0x88, array step: 0x10.
Definition at line 4162 of file MK26F18.h .
Message Buffer 0 WORD1 Register..Message Buffer 15 WORD1 Register, array offset: 0x8C, array step: 0x10.
Definition at line 4163 of file MK26F18.h .