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stm32f1xx_hal_rcc.c File Reference

stm32f1xx_hal_rcc.c File Reference

RCC HAL module driver. This file provides firmware functions to manage the following functionalities of the Reset and Clock Control (RCC) peripheral: + Initialization and de-initialization functions + Peripheral Control functions. More...

Go to the source code of this file.

Functions

void HAL_RCC_DeInit (void)
 Resets the RCC clock configuration to the default reset state.
HAL_StatusTypeDef HAL_RCC_OscConfig (RCC_OscInitTypeDef *RCC_OscInitStruct)
 Initializes the RCC Oscillators according to the specified parameters in the RCC_OscInitTypeDef.
HAL_StatusTypeDef HAL_RCC_ClockConfig (RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
 Initializes the CPU, AHB and APB buses clocks according to the specified parameters in the RCC_ClkInitStruct.
void HAL_RCC_MCOConfig (uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
 Selects the clock source to output on MCO pin.
void HAL_RCC_EnableCSS (void)
 Enables the Clock Security System.
void HAL_RCC_DisableCSS (void)
 Disables the Clock Security System.
uint32_t HAL_RCC_GetSysClockFreq (void)
 Returns the SYSCLK frequency.
uint32_t HAL_RCC_GetHCLKFreq (void)
 Returns the HCLK frequency.
uint32_t HAL_RCC_GetPCLK1Freq (void)
 Returns the PCLK1 frequency.
uint32_t HAL_RCC_GetPCLK2Freq (void)
 Returns the PCLK2 frequency.
void HAL_RCC_GetOscConfig (RCC_OscInitTypeDef *RCC_OscInitStruct)
 Configures the RCC_OscInitStruct according to the internal RCC configuration registers.
void HAL_RCC_GetClockConfig (RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency)
 Get the RCC_ClkInitStruct according to the internal RCC configuration registers.
void HAL_RCC_NMI_IRQHandler (void)
 This function handles the RCC CSS interrupt request.
__weak void HAL_RCC_CSSCallback (void)
 RCC Clock Security System interrupt callback.

Detailed Description

RCC HAL module driver. This file provides firmware functions to manage the following functionalities of the Reset and Clock Control (RCC) peripheral: + Initialization and de-initialization functions + Peripheral Control functions.

Author:
MCD Application Team
Version:
V1.0.4
Date:
29-April-2016
  ==============================================================================
                      ##### RCC specific features #####
  ==============================================================================
    [..]  
      After reset the device is running from Internal High Speed oscillator
      (HSI 8MHz) with Flash 0 wait state, Flash prefetch buffer is enabled, 
      and all peripherals are off except internal SRAM, Flash and JTAG.
      (+) There is no prescaler on High speed (AHB) and Low speed (APB) buses;
          all peripherals mapped on these buses are running at HSI speed.
      (+) The clock for all peripherals is switched off, except the SRAM and FLASH.
      (+) All GPIOs are in input floating state, except the JTAG pins which
          are assigned to be used for debug purpose.
    [..] Once the device started from reset, the user application has to:
      (+) Configure the clock source to be used to drive the System clock
          (if the application needs higher frequency/performance)
      (+) Configure the System clock frequency and Flash settings  
      (+) Configure the AHB and APB buses prescalers
      (+) Enable the clock for the peripheral(s) to be used
      (+) Configure the clock source(s) for peripherals whose clocks are not
          derived from the System clock (I2S, RTC, ADC, USB OTG FS) 

                      ##### RCC Limitations #####
  ==============================================================================
    [..]  
      A delay between an RCC peripheral clock enable and the effective peripheral 
      enabling should be taken into account in order to manage the peripheral read/write 
      from/to registers.
      (+) This delay depends on the peripheral mapping.
        (++) AHB & APB peripherals, 1 dummy read is necessary

    [..]  
      Workarounds:
      (#) For AHB & APB peripherals, a dummy read to the peripheral register has been
          inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro.

  
Attention:

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Definition in file stm32f1xx_hal_rcc.c.