LPC43xx
[)]

Enumerator:

Reset_IRQn	1 Reset Vector, invoked on Power up and warm reset
NonMaskableInt_IRQn	2 Non maskable Interrupt, cannot be stopped or preempted
HardFault_IRQn	3 Hard Fault, all classes of Fault
SVCall_IRQn	11 System Service Call via SVC instruction
DebugMonitor_IRQn	12 Debug Monitor
PendSV_IRQn	14 Pendable request for system service
SysTick_IRQn	15 System Tick Timer
FLEX_INT0_IRQn	All I/O pins can be routed to below 8 interrupts.
GINT0_IRQn	Grouped Interrupt 0
GINT1_IRQn	Grouped Interrupt 1
Reserved0_IRQn	Reserved Interrupt
SSP1_IRQn	SSP1 Interrupt
I2C_IRQn	I2C Interrupt
TIMER_16_0_IRQn	16-bit Timer0 Interrupt
TIMER_16_1_IRQn	16-bit Timer1 Interrupt
TIMER_32_0_IRQn	32-bit Timer0 Interrupt
TIMER_32_1_IRQn	32-bit Timer1 Interrupt
SSP0_IRQn	SSP0 Interrupt
UART_IRQn	UART Interrupt
USB_IRQn	USB IRQ Interrupt
USB_FIQn	USB FIQ Interrupt
ADC_IRQn	A/D Converter Interrupt
WDT_IRQn	Watchdog timer Interrupt
BOD_IRQn	Brown Out Detect(BOD) Interrupt
FMC_IRQn	Flash Memory Controller Interrupt
Reserved4_IRQn	Reserved Interrupt
Reserved5_IRQn	Reserved Interrupt
USBWakeup_IRQn	USB wakeup Interrupt
Reserved6_IRQn	Reserved Interrupt
Reset_IRQn	1 Reset Vector, invoked on Power up and warm reset
NonMaskableInt_IRQn	2 Non maskable Interrupt, cannot be stopped or preempted
HardFault_IRQn	3 Hard Fault, all classes of Fault
MemoryManagement_IRQn	4 Memory Management, MPU mismatch, including Access Violation and No Match
BusFault_IRQn	5 Bus Fault, Pre-Fetch-, Memory Access Fault, other address/memory related Fault
UsageFault_IRQn	6 Usage Fault, i.e. Undef Instruction, Illegal State Transition
SVCall_IRQn	11 System Service Call via SVC instruction
DebugMonitor_IRQn	12 Debug Monitor
PendSV_IRQn	14 Pendable request for system service
SysTick_IRQn	15 System Tick Timer
DAC_IRQn	0 DAC
M0CORE_IRQn	1 M0a
DMA_IRQn	2 DMA
RESERVED1_IRQn	3 EZH/EDM
ETHERNET_IRQn	5 ETHERNET
SDIO_IRQn	6 SDIO
LCD_IRQn	7 LCD
USB0_IRQn	8 USB0
USB1_IRQn	9 USB1
SCT_IRQn	10 SCT
RITIMER_IRQn	11 RITIMER
TIMER0_IRQn	12 TIMER0
TIMER1_IRQn	13 TIMER1
TIMER2_IRQn	14 TIMER2
TIMER3_IRQn	15 TIMER3
MCPWM_IRQn	16 MCPWM
ADC0_IRQn	17 ADC0
I2C0_IRQn	18 I2C0
I2C1_IRQn	19 I2C1
SPI_INT_IRQn	20 SPI_INT
ADC1_IRQn	21 ADC1
SSP0_IRQn	22 SSP0
SSP1_IRQn	23 SSP1
USART0_IRQn	24 USART0
UART1_IRQn	25 UART1
USART2_IRQn	26 USART2
USART3_IRQn	27 USART3
I2S0_IRQn	28 I2S0
I2S1_IRQn	29 I2S1
SGPIO_IINT_IRQn	31 SGPIO_IINT
PIN_INT0_IRQn	32 PIN_INT0
PIN_INT1_IRQn	33 PIN_INT1
PIN_INT2_IRQn	34 PIN_INT2
PIN_INT3_IRQn	35 PIN_INT3
PIN_INT4_IRQn	36 PIN_INT4
PIN_INT5_IRQn	37 PIN_INT5
PIN_INT6_IRQn	38 PIN_INT6
PIN_INT7_IRQn	39 PIN_INT7
GINT0_IRQn	40 GINT0
GINT1_IRQn	41 GINT1
EVENTROUTER_IRQn	42 EVENTROUTER
C_CAN1_IRQn	43 C_CAN1
VADC_IRQn	45 VADC
ATIMER_IRQn	46 ATIMER
RTC_IRQn	47 RTC
WWDT_IRQn	49 WWDT
C_CAN0_IRQn	51 C_CAN0
QEI_IRQn	52 QEI
M0_Reset_IRQn	1 Reset Vector, invoked on Power up and warm reset
M0_NonMaskableInt_IRQn	2 Non maskable Interrupt, cannot be stopped or preempted
M0_HardFault_IRQn	3 Hard Fault, all classes of Fault
M0_SVCall_IRQn	11 System Service Call via SVC instruction
M0_DebugMonitor_IRQn	12 Debug Monitor
M0_PendSV_IRQn	14 Pendable request for system service
M0_SysTick_IRQn	15 System Tick Timer
M0_RTC_IRQn	0 RTC
M0_M4CORE_IRQn	1 M4
M0_DMA_IRQn	2 DMA
M0_ETHERNET_IRQn	5 ETHERNET
M0_SDIO_IRQn	6 SDIO
M0_LCD_IRQn	7 LCD
M0_USB0_IRQn	8 USB0
M0_USB1_IRQn	9 USB1
M0_SCT_IRQn	10 SCT
M0_RITIMER_OR_WWDT_IRQn	11 RITIMER_OR_WWDT
M0_TIMER0_IRQn	12 TIMER0
M0_GINT1_IRQn	13 GINT1
M0_TIMER3_IRQn	15 TIMER3
M0_MCPWM_IRQn	16 MCPWM
M0_ADC0_IRQn	17 ADC0
M0_I2C0_OR_I2C1_IRQn	18 I2C0_OR_I2C1
M0_SGPIO_IRQn	19 SGPIO
M0_SPI_OR_DAC_IRQn	20 SPI_OR_DAC
M0_ADC1_IRQn	21 ADC1
M0_SSP0_OR_SSP1_IRQn	22 SSP0_OR_SSP1
M0_EVENTROUTER_IRQn	23 EVENTROUTER
M0_USART0_IRQn	24 USART0
M0_UART1_IRQn	25 UART1
M0_USART2_OR_C_CAN1_IRQn	26 USART2_OR_C_CAN1
M0_USART3_IRQn	27 USART3
M0_I2S0_OR_I2S1_OR_QEI_IRQn	28 I2S0_OR_I2S1_OR_QEI
M0_C_CAN0_IRQn	29 C_CAN0
NonMaskableInt_IRQn	2 Non Maskable Interrupt
HardFault_IRQn	3 Cortex-M3 Hard Fault Interrupt
MemoryManagement_IRQn	4 Cortex-M3 Memory Management Interrupt
BusFault_IRQn	5 Cortex-M3 Bus Fault Interrupt
UsageFault_IRQn	6 Cortex-M3 Usage Fault Interrupt
SVCall_IRQn	11 Cortex-M3 SV Call Interrupt
DebugMonitor_IRQn	12 Cortex-M3 Debug Monitor Interrupt
PendSV_IRQn	14 Cortex-M3 Pend SV Interrupt
SysTick_IRQn	15 Cortex-M3 System Tick Interrupt
WWDG_IRQn	Window WatchDog Interrupt
PVD_IRQn	PVD through EXTI Line detection Interrupt
TAMPER_IRQn	Tamper Interrupt
RTC_IRQn	RTC global Interrupt
FLASH_IRQn	FLASH global Interrupt
RCC_IRQn	RCC global Interrupt
EXTI0_IRQn	EXTI Line0 Interrupt
EXTI1_IRQn	EXTI Line1 Interrupt
EXTI2_IRQn	EXTI Line2 Interrupt
EXTI3_IRQn	EXTI Line3 Interrupt
EXTI4_IRQn	EXTI Line4 Interrupt
DMA1_Channel1_IRQn	DMA1 Channel 1 global Interrupt
DMA1_Channel2_IRQn	DMA1 Channel 2 global Interrupt
DMA1_Channel3_IRQn	DMA1 Channel 3 global Interrupt
DMA1_Channel4_IRQn	DMA1 Channel 4 global Interrupt
DMA1_Channel5_IRQn	DMA1 Channel 5 global Interrupt
DMA1_Channel6_IRQn	DMA1 Channel 6 global Interrupt
DMA1_Channel7_IRQn	DMA1 Channel 7 global Interrupt
ADC1_2_IRQn	ADC1 and ADC2 global Interrupt
USB_HP_CAN1_TX_IRQn	USB Device High Priority or CAN1 TX Interrupts
USB_LP_CAN1_RX0_IRQn	USB Device Low Priority or CAN1 RX0 Interrupts
CAN1_RX1_IRQn	CAN1 RX1 Interrupt
CAN1_SCE_IRQn	CAN1 SCE Interrupt
EXTI9_5_IRQn	External Line[9:5] Interrupts
TIM1_BRK_IRQn	TIM1 Break Interrupt
TIM1_UP_IRQn	TIM1 Update Interrupt
TIM1_TRG_COM_IRQn	TIM1 Trigger and Commutation Interrupt
TIM1_CC_IRQn	TIM1 Capture Compare Interrupt
TIM2_IRQn	TIM2 global Interrupt
TIM3_IRQn	TIM3 global Interrupt
TIM4_IRQn	TIM4 global Interrupt
I2C1_EV_IRQn	I2C1 Event Interrupt
I2C1_ER_IRQn	I2C1 Error Interrupt
I2C2_EV_IRQn	I2C2 Event Interrupt
I2C2_ER_IRQn	I2C2 Error Interrupt
SPI1_IRQn	SPI1 global Interrupt
SPI2_IRQn	SPI2 global Interrupt
USART1_IRQn	USART1 global Interrupt
USART2_IRQn	USART2 global Interrupt
USART3_IRQn	USART3 global Interrupt
EXTI15_10_IRQn	External Line[15:10] Interrupts
RTC_Alarm_IRQn	RTC Alarm through EXTI Line Interrupt
USBWakeUp_IRQn	USB Device WakeUp from suspend through EXTI Line Interrupt

Definition at line 61 of file LPC43xx.h.