fsl_uart_cmsis.c

00001 /*
00002  * Copyright (c) 2013-2016 ARM Limited. All rights reserved.
00003  * Copyright (c) 2016, Freescale Semiconductor, Inc. Not a Contribution.
00004  * Copyright 2016-2017 NXP. Not a Contribution.
00005  *
00006  * SPDX-License-Identifier: Apache-2.0
00007  *
00008  * Licensed under the Apache License, Version 2.0 (the License); you may
00009  * not use this file except in compliance with the License.
00010  * You may obtain a copy of the License at
00011  *
00012  * http://www.apache.org/licenses/LICENSE-2.0
00013  *
00014  * Unless required by applicable law or agreed to in writing, software
00015  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
00016  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00017  * See the License for the specific language governing permissions and
00018  * limitations under the License.
00019  */
00020 
00021 #include "fsl_uart_cmsis.h"
00022 
00023 /* Component ID definition, used by tools. */
00024 #ifndef FSL_COMPONENT_ID
00025 #define FSL_COMPONENT_ID "platform.drivers.uart_cmsis"
00026 #endif
00027 
00028 #if ((RTE_USART0 && defined(UART0)) || (RTE_USART1 && defined(UART1)) || (RTE_USART2 && defined(UART2)) || \
00029      (RTE_USART3 && defined(UART3)) || (RTE_USART4 && defined(UART4)) || (RTE_USART5 && defined(UART5)))
00030 
00031 #define ARM_UART_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2, 0)
00032 
00033 /*
00034  * ARMCC does not support split the data section automatically, so the driver
00035  * needs to split the data to separate sections explicitly, to reduce codesize.
00036  */
00037 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
00038 #define ARMCC_SECTION(section_name) __attribute__((section(section_name)))
00039 #endif
00040 
00041 typedef const struct _cmsis_uart_resource
00042 {
00043     UART_Type *base;           /*!< uart peripheral base address.      */
00044     uint32_t (*GetFreq)(void); /*!< Function to get the clock frequency. */
00045 } cmsis_uart_resource_t;
00046 
00047 typedef struct _cmsis_uart_interrupt_driver_state
00048 {
00049     cmsis_uart_resource_t *resource;  /*!< Basic uart resource. */
00050     uart_handle_t *handle;            /*!< Interupt transfer handle. */
00051     ARM_USART_SignalEvent_t cb_event; /*!< Callback function.     */
00052     uint8_t flags;                    /*!< Control and state flags. */
00053 } cmsis_uart_interrupt_driver_state_t;
00054 
00055 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
00056 typedef const struct _cmsis_uart_dma_resource
00057 {
00058     DMA_Type *txDmaBase;       /*!< DMA peripheral base address for TX.    */
00059     uint32_t txDmaChannel;     /*!< DMA channel for uart TX.             */
00060     DMAMUX_Type *txDmamuxBase; /*!< DMAMUX peripheral base address for TX. */
00061     uint8_t txDmaRequest;      /*!< TX DMA request source.                 */
00062 
00063     DMA_Type *rxDmaBase;       /*!< DMA peripheral base address for RX.    */
00064     uint32_t rxDmaChannel;     /*!< DMA channel for uart RX.             */
00065     DMAMUX_Type *rxDmamuxBase; /*!< DMAMUX peripheral base address for RX. */
00066     uint8_t rxDmaRequest;      /*!< RX DMA request source.                 */
00067 } cmsis_uart_dma_resource_t;
00068 
00069 typedef struct _cmsis_uart_dma_driver_state
00070 {
00071     cmsis_uart_resource_t *resource;        /*!< uart basic resource.      */
00072     cmsis_uart_dma_resource_t *dmaResource; /*!< uart DMA resource.        */
00073     uart_dma_handle_t *handle;              /*!< uart DMA transfer handle. */
00074     dma_handle_t *rxHandle;                 /*!< DMA RX handle.              */
00075     dma_handle_t *txHandle;                 /*!< DMA TX handle.              */
00076     ARM_USART_SignalEvent_t cb_event;       /*!< Callback function.     */
00077     uint8_t flags;                          /*!< Control and state flags. */
00078 } cmsis_uart_dma_driver_state_t;
00079 #endif
00080 
00081 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
00082 typedef const struct _cmsis_uart_edma_resource
00083 {
00084     DMA_Type *txEdmaBase;      /*!< EDMA peripheral base address for TX.    */
00085     uint32_t txEdmaChannel;    /*!< EDMA channel for uart TX.             */
00086     DMAMUX_Type *txDmamuxBase; /*!< DMAMUX peripheral base address for TX. */
00087     uint8_t txDmaRequest;      /*!< TX EDMA request source.                 */
00088 
00089     DMA_Type *rxEdmaBase;      /*!< EDMA peripheral base address for RX.    */
00090     uint32_t rxEdmaChannel;    /*!< EDMA channel for uart RX.             */
00091     DMAMUX_Type *rxDmamuxBase; /*!< DMAMUX peripheral base address for RX. */
00092     uint8_t rxDmaRequest;      /*!< RX EDMA request source.                 */
00093 } cmsis_uart_edma_resource_t;
00094 
00095 typedef struct _cmsis_uart_edma_driver_state
00096 {
00097     cmsis_uart_resource_t *resource;         /*!< uart basic resource.      */
00098     cmsis_uart_edma_resource_t *dmaResource; /*!< uart EDMA resource.        */
00099     uart_edma_handle_t *handle;              /*!< uart EDMA transfer handle. */
00100     edma_handle_t *rxHandle;                 /*!< EDMA RX handle.              */
00101     edma_handle_t *txHandle;                 /*!< EDMA TX handle.              */
00102     ARM_USART_SignalEvent_t cb_event;        /*!< Callback function.     */
00103     uint8_t flags;                           /*!< Control and state flags. */
00104 } cmsis_uart_edma_driver_state_t;
00105 #endif
00106 
00107 enum _uart_transfer_states
00108 {
00109     kuart_TxIdle, /*!< TX idle. */
00110     kuart_TxBusy, /*!< TX busy. */
00111     kuart_RxIdle, /*!< RX idle. */
00112     kuart_RxBusy  /*!< RX busy. */
00113 };
00114 
00115 /* Driver Version */
00116 static const ARM_DRIVER_VERSION s_uartDriverVersion = {ARM_USART_API_VERSION, ARM_UART_DRV_VERSION};
00117 
00118 static const ARM_USART_CAPABILITIES s_uartDriverCapabilities = {
00119     1, /* supports uart (Asynchronous) mode */
00120     0, /* supports Synchronous Master mode */
00121     0, /* supports Synchronous Slave mode */
00122     0, /* supports uart Single-wire mode */
00123     0, /* supports uart IrDA mode */
00124     0, /* supports uart Smart Card mode */
00125     0, /* Smart Card Clock generator */
00126     0, /* RTS Flow Control available */
00127     0, /* CTS Flow Control available */
00128     0, /* Transmit completed event: \ref ARM_USART_EVENT_TX_COMPLETE */
00129     0, /* Signal receive character timeout event: \ref ARM_USART_EVENT_RX_TIMEOUT */
00130     0, /* RTS Line: 0=not available, 1=available */
00131     0, /* CTS Line: 0=not available, 1=available */
00132     0, /* DTR Line: 0=not available, 1=available */
00133     0, /* DSR Line: 0=not available, 1=available */
00134     0, /* DCD Line: 0=not available, 1=available */
00135     0, /* RI Line: 0=not available, 1=available */
00136     0, /* Signal CTS change event: \ref ARM_USART_EVENT_CTS */
00137     0, /* Signal DSR change event: \ref ARM_USART_EVENT_DSR */
00138     0, /* Signal DCD change event: \ref ARM_USART_EVENT_DCD */
00139     0, /* Signal RI change event: \ref ARM_USART_EVENT_RI */
00140 };
00141 
00142 /*
00143  * Common control function used by uart_NonBlockingControl/uart_DmaControl/uart_EdmaControl
00144  */
00145 static int32_t UART_CommonControl(uint32_t control,
00146                                   uint32_t arg,
00147                                   cmsis_uart_resource_t *resource,
00148                                   uint8_t *isConfigured)
00149 {
00150     uart_config_t config;
00151 
00152     UART_GetDefaultConfig(&config);
00153 
00154     switch (control & ARM_USART_CONTROL_Msk)
00155     {
00156         case ARM_USART_MODE_ASYNCHRONOUS:
00157             /* USART Baudrate */
00158             config.baudRate_Bps  = arg;
00159             break;
00160 
00161         /* TX/RX IO is controlled in application layer. */
00162         case ARM_USART_CONTROL_TX:
00163             if (arg)
00164             {
00165                 UART_EnableTx(resource->base, true);
00166             }
00167             else
00168             {
00169                 UART_EnableTx(resource->base, false);
00170             }
00171             return ARM_DRIVER_OK;
00172 
00173         case ARM_USART_CONTROL_RX:
00174             if (arg)
00175             {
00176                 UART_EnableRx(resource->base, true);
00177             }
00178             else
00179             {
00180                 UART_EnableRx(resource->base, false);
00181             }
00182 
00183             return ARM_DRIVER_OK;
00184 
00185         default:
00186             return ARM_DRIVER_ERROR_UNSUPPORTED;
00187     }
00188 
00189     switch (control & ARM_USART_PARITY_Msk)
00190     {
00191         case ARM_USART_PARITY_NONE:
00192             config.parityMode  = kUART_ParityDisabled ;
00193             break;
00194         case ARM_USART_PARITY_EVEN:
00195             config.parityMode  = kUART_ParityEven ;
00196             break;
00197         case ARM_USART_PARITY_ODD:
00198             config.parityMode  = kUART_ParityOdd ;
00199             break;
00200         default:
00201             return ARM_USART_ERROR_PARITY;
00202     }
00203 
00204     switch (control & ARM_USART_STOP_BITS_Msk)
00205     {
00206         case ARM_USART_STOP_BITS_1:
00207             /* The GetDefaultConfig has already set for this case. */
00208             break;
00209 #if defined(FSL_FEATURE_UART_HAS_STOP_BIT_CONFIG_SUPPORT) && FSL_FEATURE_UART_HAS_STOP_BIT_CONFIG_SUPPORT
00210         case ARM_USART_STOP_BITS_2:
00211             config.stopBitCount  = kUART_TwoStopBit ;
00212             break;
00213 #endif
00214         default:
00215             return ARM_USART_ERROR_STOP_BITS;
00216     }
00217 
00218     /* If uart is already configured, deinit it first. */
00219     if ((*isConfigured) & USART_FLAG_CONFIGURED)
00220     {
00221         UART_Deinit(resource->base);
00222         *isConfigured &= ~USART_FLAG_CONFIGURED;
00223     }
00224 
00225     config.enableTx  = true;
00226     config.enableRx  = true;
00227 
00228     if (kStatus_UART_BaudrateNotSupport  == UART_Init(resource->base, &config, resource->GetFreq()))
00229     {
00230         return ARM_USART_ERROR_BAUDRATE;
00231     }
00232 
00233     *isConfigured |= USART_FLAG_CONFIGURED;
00234 
00235     return ARM_DRIVER_OK;
00236 }
00237 
00238 static ARM_DRIVER_VERSION UARTx_GetVersion(void)
00239 {
00240     return s_uartDriverVersion;
00241 }
00242 
00243 static ARM_USART_CAPABILITIES UARTx_GetCapabilities(void)
00244 {
00245     return s_uartDriverCapabilities;
00246 }
00247 
00248 static int32_t UARTx_SetModemControl(ARM_USART_MODEM_CONTROL control)
00249 {
00250     return ARM_DRIVER_ERROR_UNSUPPORTED;
00251 }
00252 
00253 static ARM_USART_MODEM_STATUS UARTx_GetModemStatus(void)
00254 {
00255     ARM_USART_MODEM_STATUS modem_status;
00256 
00257     modem_status.cts = 0U;
00258     modem_status.dsr = 0U;
00259     modem_status.ri = 0U;
00260     modem_status.dcd = 0U;
00261     modem_status.reserved = 0U;
00262 
00263     return modem_status;
00264 }
00265 
00266 #endif
00267 
00268 #if ((RTE_USART0_DMA_EN && defined(UART0)) || (RTE_USART1_DMA_EN && defined(UART1)) || \
00269      (RTE_USART2_DMA_EN && defined(UART2)) || (RTE_USART3_DMA_EN && defined(UART3)) || \
00270      (RTE_USART4_DMA_EN && defined(UART4)) || (RTE_USART5_DMA_EN && defined(UART5)))
00271 
00272 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
00273 void KSDK_UART_DmaCallback(UART_Type *base, uart_dma_handle_t *handle, status_t status, void *userData)
00274 {
00275     uint32_t event = 0U;
00276 
00277     if (kStatus_UART_TxIdle  == status)
00278     {
00279         event = ARM_USART_EVENT_SEND_COMPLETE;
00280     }
00281     else if (kStatus_UART_RxIdle  == status)
00282     {
00283         event = ARM_USART_EVENT_RECEIVE_COMPLETE;
00284     }
00285 
00286     /* User data is actually CMSIS driver callback. */
00287     if ((0U != event) && (userData))
00288     {
00289         ((ARM_USART_SignalEvent_t)userData)(event);
00290     }
00291 }
00292 
00293 static int32_t UART_DmaInitialize(ARM_USART_SignalEvent_t cb_event, cmsis_uart_dma_driver_state_t *uart)
00294 {
00295     if (!(uart->flags & USART_FLAG_INIT))
00296     {
00297         uart->cb_event = cb_event;
00298         uart->flags = USART_FLAG_INIT;
00299     }
00300 
00301     return ARM_DRIVER_OK;
00302 }
00303 
00304 static int32_t UART_DmaUninitialize(cmsis_uart_dma_driver_state_t *uart)
00305 {
00306     uart->flags = USART_FLAG_UNINIT;
00307     return ARM_DRIVER_OK;
00308 }
00309 
00310 static int32_t UART_DmaPowerControl(ARM_POWER_STATE state, cmsis_uart_dma_driver_state_t *uart)
00311 {
00312     uart_config_t config;
00313     cmsis_uart_dma_resource_t *dmaResource;
00314 
00315     switch (state)
00316     {
00317         case ARM_POWER_OFF:
00318             if (uart->flags & USART_FLAG_POWER)
00319             {
00320                 UART_Deinit(uart->resource->base);
00321                 DMAMUX_DisableChannel(uart->dmaResource->rxDmamuxBase, uart->dmaResource->rxDmaChannel);
00322                 DMAMUX_DisableChannel(uart->dmaResource->txDmamuxBase, uart->dmaResource->txDmaChannel);
00323                 uart->flags = USART_FLAG_INIT;
00324             }
00325             break;
00326         case ARM_POWER_LOW:
00327             return ARM_DRIVER_ERROR_UNSUPPORTED;
00328         case ARM_POWER_FULL:
00329             /* Must be initialized first. */
00330             if (uart->flags == USART_FLAG_UNINIT)
00331             {
00332                 return ARM_DRIVER_ERROR;
00333             }
00334 
00335             if (uart->flags & USART_FLAG_POWER)
00336             {
00337                 /* Driver already powered */
00338                 break;
00339             }
00340 
00341             UART_GetDefaultConfig(&config);
00342             config.enableTx  = true;
00343             config.enableRx  = true;
00344 
00345             dmaResource = uart->dmaResource;
00346 
00347             /* Set up DMA setting. */
00348             DMA_CreateHandle(uart->rxHandle, dmaResource->rxDmaBase, dmaResource->rxDmaChannel);
00349             DMAMUX_SetSource(dmaResource->rxDmamuxBase, dmaResource->rxDmaChannel, dmaResource->rxDmaRequest);
00350             DMAMUX_EnableChannel(dmaResource->rxDmamuxBase, dmaResource->rxDmaChannel);
00351 
00352             DMA_CreateHandle(uart->txHandle, dmaResource->txDmaBase, dmaResource->txDmaChannel);
00353             DMAMUX_SetSource(dmaResource->txDmamuxBase, dmaResource->txDmaChannel, dmaResource->txDmaRequest);
00354             DMAMUX_EnableChannel(dmaResource->txDmamuxBase, dmaResource->txDmaChannel);
00355 
00356             /* Setup the uart. */
00357             UART_Init(uart->resource->base, &config, uart->resource->GetFreq());
00358             UART_TransferCreateHandleDMA(uart->resource->base, uart->handle, KSDK_UART_DmaCallback,
00359                                          (void *)uart->cb_event, uart->txHandle, uart->rxHandle);
00360 
00361             uart->flags |= (USART_FLAG_POWER | USART_FLAG_CONFIGURED);
00362             break;
00363         default:
00364             return ARM_DRIVER_ERROR_UNSUPPORTED;
00365     }
00366 
00367     return ARM_DRIVER_OK;
00368 }
00369 
00370 static int32_t UART_DmaSend(const void *data, uint32_t num, cmsis_uart_dma_driver_state_t *uart)
00371 {
00372     int32_t ret;
00373     status_t status;
00374     uart_transfer_t xfer;
00375 
00376     xfer.data  = (uint8_t *)data;
00377     xfer.dataSize  = num;
00378 
00379     status = UART_TransferSendDMA(uart->resource->base, uart->handle, &xfer);
00380 
00381     switch (status)
00382     {
00383         case kStatus_Success:
00384             ret = ARM_DRIVER_OK;
00385             break;
00386         case kStatus_InvalidArgument:
00387             ret = ARM_DRIVER_ERROR_PARAMETER;
00388             break;
00389         case kStatus_UART_RxBusy :
00390             ret = ARM_DRIVER_ERROR_BUSY;
00391             break;
00392         default:
00393             ret = ARM_DRIVER_ERROR;
00394             break;
00395     }
00396 
00397     return ret;
00398 }
00399 
00400 static int32_t UART_DmaReceive(void *data, uint32_t num, cmsis_uart_dma_driver_state_t *uart)
00401 {
00402     int32_t ret;
00403     status_t status;
00404     uart_transfer_t xfer;
00405 
00406     xfer.data  = data;
00407     xfer.dataSize  = num;
00408 
00409     status = UART_TransferReceiveDMA(uart->resource->base, uart->handle, &xfer);
00410 
00411     switch (status)
00412     {
00413         case kStatus_Success:
00414             ret = ARM_DRIVER_OK;
00415             break;
00416         case kStatus_InvalidArgument:
00417             ret = ARM_DRIVER_ERROR_PARAMETER;
00418             break;
00419         case kStatus_UART_TxBusy :
00420             ret = ARM_DRIVER_ERROR_BUSY;
00421             break;
00422         default:
00423             ret = ARM_DRIVER_ERROR;
00424             break;
00425     }
00426 
00427     return ret;
00428 }
00429 
00430 static int32_t UART_DmaTransfer(const void *data_out, void *data_in, uint32_t num, cmsis_uart_dma_driver_state_t *uart)
00431 {
00432     /* Only in synchronous mode */
00433     return ARM_DRIVER_ERROR;
00434 }
00435 
00436 static uint32_t UART_DmaGetTxCount(cmsis_uart_dma_driver_state_t *uart)
00437 {
00438     uint32_t cnt;
00439 
00440     /* If TX not in progress, then the TX count is txDataSizeAll saved in handle. */
00441     if (kStatus_NoTransferInProgress == UART_TransferGetSendCountDMA(uart->resource->base, uart->handle, &cnt))
00442     {
00443         cnt = uart->handle->txDataSizeAll;
00444     }
00445 
00446     return cnt;
00447 }
00448 
00449 static uint32_t UART_DmaGetRxCount(cmsis_uart_dma_driver_state_t *uart)
00450 {
00451     uint32_t cnt;
00452 
00453     if (kStatus_NoTransferInProgress == UART_TransferGetReceiveCountDMA(uart->resource->base, uart->handle, &cnt))
00454     {
00455         cnt = uart->handle->rxDataSizeAll;
00456     }
00457 
00458     return cnt;
00459 }
00460 
00461 static int32_t UART_DmaControl(uint32_t control, uint32_t arg, cmsis_uart_dma_driver_state_t *uart)
00462 {
00463     /* Must be power on. */
00464     if (uart->flags & USART_FLAG_POWER)
00465     {
00466         return ARM_DRIVER_ERROR;
00467     }
00468 
00469     /* Does not support these features. */
00470     if (control & (ARM_USART_FLOW_CONTROL_Msk | ARM_USART_CPOL_Msk | ARM_USART_CPHA_Msk))
00471     {
00472         return ARM_DRIVER_ERROR_UNSUPPORTED;
00473     }
00474 
00475     switch (control & ARM_USART_CONTROL_Msk)
00476     {
00477         /* Abort Send */
00478         case ARM_USART_ABORT_SEND:
00479             UART_TransferAbortSendDMA(uart->resource->base, uart->handle);
00480             return ARM_DRIVER_OK;
00481 
00482         /* Abort receive */
00483         case ARM_USART_ABORT_RECEIVE:
00484             UART_TransferAbortReceiveDMA(uart->resource->base, uart->handle);
00485             return ARM_DRIVER_OK;
00486 
00487         default:
00488             break;
00489     }
00490 
00491     return UART_CommonControl(control, arg, uart->resource, &uart->flags);
00492 }
00493 
00494 static ARM_USART_STATUS UART_DmaGetStatus(cmsis_uart_dma_driver_state_t *uart)
00495 {
00496     ARM_USART_STATUS stat;
00497     uint32_t ksdk_uart_status = UART_GetStatusFlags(uart->resource->base);
00498 
00499     stat.tx_busy = ((kuart_TxBusy == uart->handle->txState) ? (1U) : (0U));
00500     stat.rx_busy = ((kuart_RxBusy == uart->handle->rxState) ? (1U) : (0U));
00501 
00502     stat.tx_underflow = 0U;
00503     stat.rx_overflow = (!(!(ksdk_uart_status & kUART_RxOverrunFlag )));
00504 #if defined(FSL_FEATURE_uart_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_uart_HAS_LIN_BREAK_DETECT
00505     stat.rx_break = (!(!(ksdk_uart_status & kuart_LinBreakFlag)));
00506 #else
00507     stat.rx_break = 0U;
00508 #endif
00509     stat.rx_framing_error = (!(!(ksdk_uart_status & kUART_FramingErrorFlag )));
00510     stat.rx_parity_error = (!(!(ksdk_uart_status & kUART_ParityErrorFlag )));
00511     stat.reserved = 0U;
00512 
00513     return stat;
00514 }
00515 #endif
00516 
00517 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
00518 void KSDK_UART_EdmaCallback(UART_Type *base, uart_edma_handle_t *handle, status_t status, void *userData)
00519 {
00520     uint32_t event = 0U;
00521 
00522     if (kStatus_UART_TxIdle  == status)
00523     {
00524         event = ARM_USART_EVENT_SEND_COMPLETE;
00525     }
00526     if (kStatus_UART_RxIdle  == status)
00527     {
00528         event = ARM_USART_EVENT_RECEIVE_COMPLETE;
00529     }
00530 
00531     /* User data is actually CMSIS driver callback. */
00532     if ((0U != event) && (userData))
00533     {
00534         ((ARM_USART_SignalEvent_t)userData)(event);
00535     }
00536 }
00537 
00538 static int32_t UART_EdmaInitialize(ARM_USART_SignalEvent_t cb_event, cmsis_uart_edma_driver_state_t *uart)
00539 {
00540     if (!(uart->flags & USART_FLAG_INIT))
00541     {
00542         uart->cb_event = cb_event;
00543         uart->flags = USART_FLAG_INIT;
00544     }
00545 
00546     return ARM_DRIVER_OK;
00547 }
00548 
00549 static int32_t UART_EdmaUninitialize(cmsis_uart_edma_driver_state_t *uart)
00550 {
00551     uart->flags = USART_FLAG_UNINIT;
00552     return ARM_DRIVER_OK;
00553 }
00554 
00555 static int32_t UART_EdmaPowerControl(ARM_POWER_STATE state, cmsis_uart_edma_driver_state_t *uart)
00556 {
00557     uart_config_t config;
00558     cmsis_uart_edma_resource_t *dmaResource;
00559 
00560     switch (state)
00561     {
00562         case ARM_POWER_OFF:
00563             if (uart->flags & USART_FLAG_POWER)
00564             {
00565                 UART_Deinit(uart->resource->base);
00566                 DMAMUX_DisableChannel(uart->dmaResource->rxDmamuxBase, uart->dmaResource->rxEdmaChannel);
00567                 DMAMUX_DisableChannel(uart->dmaResource->txDmamuxBase, uart->dmaResource->txEdmaChannel);
00568                 uart->flags = USART_FLAG_INIT;
00569             }
00570             break;
00571         case ARM_POWER_LOW:
00572             return ARM_DRIVER_ERROR_UNSUPPORTED;
00573         case ARM_POWER_FULL:
00574             if (uart->flags == USART_FLAG_UNINIT)
00575             {
00576                 return ARM_DRIVER_ERROR;
00577             }
00578 
00579             if (uart->flags & USART_FLAG_POWER)
00580             {
00581                 /* Driver already powered */
00582                 break;
00583             }
00584 
00585             UART_GetDefaultConfig(&config);
00586             config.enableTx  = true;
00587             config.enableRx  = true;
00588 
00589             dmaResource = uart->dmaResource;
00590 
00591             /* Set up EDMA setting. */
00592             EDMA_CreateHandle(uart->rxHandle, dmaResource->rxEdmaBase, dmaResource->rxEdmaChannel);
00593             DMAMUX_SetSource(dmaResource->rxDmamuxBase, dmaResource->rxEdmaChannel, dmaResource->rxDmaRequest);
00594             DMAMUX_EnableChannel(dmaResource->rxDmamuxBase, dmaResource->rxEdmaChannel);
00595 
00596             EDMA_CreateHandle(uart->txHandle, dmaResource->txEdmaBase, dmaResource->txEdmaChannel);
00597             DMAMUX_SetSource(dmaResource->txDmamuxBase, dmaResource->txEdmaChannel, dmaResource->txDmaRequest);
00598             DMAMUX_EnableChannel(dmaResource->txDmamuxBase, dmaResource->txEdmaChannel);
00599 
00600             /* Setup the uart. */
00601             UART_Init(uart->resource->base, &config, uart->resource->GetFreq());
00602             UART_TransferCreateHandleEDMA(uart->resource->base, uart->handle, KSDK_UART_EdmaCallback,
00603                                           (void *)uart->cb_event, uart->txHandle, uart->rxHandle);
00604 
00605             uart->flags |= (USART_FLAG_CONFIGURED | USART_FLAG_POWER);
00606             break;
00607         default:
00608             return ARM_DRIVER_ERROR_UNSUPPORTED;
00609     }
00610 
00611     return ARM_DRIVER_OK;
00612 }
00613 
00614 static int32_t UART_EdmaSend(const void *data, uint32_t num, cmsis_uart_edma_driver_state_t *uart)
00615 {
00616     int32_t ret;
00617     status_t status;
00618     uart_transfer_t xfer;
00619 
00620     xfer.data  = (uint8_t *)data;
00621     xfer.dataSize  = num;
00622 
00623     status = UART_SendEDMA(uart->resource->base, uart->handle, &xfer);
00624 
00625     switch (status)
00626     {
00627         case kStatus_Success:
00628             ret = ARM_DRIVER_OK;
00629             break;
00630         case kStatus_InvalidArgument:
00631             ret = ARM_DRIVER_ERROR_PARAMETER;
00632             break;
00633         case kStatus_UART_RxBusy :
00634             ret = ARM_DRIVER_ERROR_BUSY;
00635             break;
00636         default:
00637             ret = ARM_DRIVER_ERROR;
00638             break;
00639     }
00640 
00641     return ret;
00642 }
00643 
00644 static int32_t UART_EdmaReceive(void *data, uint32_t num, cmsis_uart_edma_driver_state_t *uart)
00645 {
00646     int32_t ret;
00647     status_t status;
00648     uart_transfer_t xfer;
00649 
00650     xfer.data  = data;
00651     xfer.dataSize  = num;
00652 
00653     status = UART_ReceiveEDMA(uart->resource->base, uart->handle, &xfer);
00654 
00655     switch (status)
00656     {
00657         case kStatus_Success:
00658             ret = ARM_DRIVER_OK;
00659             break;
00660         case kStatus_InvalidArgument:
00661             ret = ARM_DRIVER_ERROR_PARAMETER;
00662             break;
00663         case kStatus_UART_RxBusy :
00664             ret = ARM_DRIVER_ERROR_BUSY;
00665             break;
00666         default:
00667             ret = ARM_DRIVER_ERROR;
00668             break;
00669     }
00670 
00671     return ret;
00672 }
00673 
00674 static int32_t UART_EdmaTransfer(const void *data_out,
00675                                  void *data_in,
00676                                  uint32_t num,
00677                                  cmsis_uart_edma_driver_state_t *uart)
00678 {
00679     /* Only in synchronous mode */
00680     return ARM_DRIVER_ERROR;
00681 }
00682 
00683 static uint32_t UART_EdmaGetTxCount(cmsis_uart_edma_driver_state_t *uart)
00684 {
00685     uint32_t cnt;
00686 
00687     if (kStatus_NoTransferInProgress == UART_TransferGetSendCountEDMA(uart->resource->base, uart->handle, &cnt))
00688     {
00689         cnt = uart->handle->txDataSizeAll;
00690     }
00691 
00692     return cnt;
00693 }
00694 
00695 static uint32_t UART_EdmaGetRxCount(cmsis_uart_edma_driver_state_t *uart)
00696 {
00697     uint32_t cnt;
00698 
00699     if (kStatus_NoTransferInProgress == UART_TransferGetReceiveCountEDMA(uart->resource->base, uart->handle, &cnt))
00700     {
00701         cnt = uart->handle->rxDataSizeAll;
00702     }
00703 
00704     return cnt;
00705 }
00706 
00707 static int32_t UART_EdmaControl(uint32_t control, uint32_t arg, cmsis_uart_edma_driver_state_t *uart)
00708 {
00709     /* Must be power on. */
00710     if (!(uart->flags & USART_FLAG_POWER))
00711     {
00712         return ARM_DRIVER_ERROR;
00713     }
00714 
00715     /* Does not support these features. */
00716     if (control & (ARM_USART_FLOW_CONTROL_Msk | ARM_USART_CPOL_Msk | ARM_USART_CPHA_Msk))
00717     {
00718         return ARM_DRIVER_ERROR_UNSUPPORTED;
00719     }
00720 
00721     switch (control & ARM_USART_CONTROL_Msk)
00722     {
00723         /* Abort Send */
00724         case ARM_USART_ABORT_SEND:
00725             UART_TransferAbortSendEDMA(uart->resource->base, uart->handle);
00726             return ARM_DRIVER_OK;
00727 
00728         /* Abort receive */
00729         case ARM_USART_ABORT_RECEIVE:
00730             UART_TransferAbortReceiveEDMA(uart->resource->base, uart->handle);
00731             return ARM_DRIVER_OK;
00732 
00733         default:
00734             break;
00735     }
00736 
00737     return UART_CommonControl(control, arg, uart->resource, &uart->flags);
00738 }
00739 
00740 static ARM_USART_STATUS UART_EdmaGetStatus(cmsis_uart_edma_driver_state_t *uart)
00741 {
00742     ARM_USART_STATUS stat;
00743     uint32_t ksdk_uart_status = UART_GetStatusFlags(uart->resource->base);
00744 
00745     stat.tx_busy = ((kuart_TxBusy == uart->handle->txState) ? (1U) : (0U));
00746     stat.rx_busy = ((kuart_RxBusy == uart->handle->rxState) ? (1U) : (0U));
00747 
00748     stat.tx_underflow = 0U;
00749     stat.rx_overflow = (!(!(ksdk_uart_status & kUART_RxOverrunFlag )));
00750 #if defined(FSL_FEATURE_uart_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_uart_HAS_LIN_BREAK_DETECT
00751     stat.rx_break = (!(!(ksdk_uart_status & kUART_LinBreakFlag )));
00752 #else
00753     stat.rx_break = 0U;
00754 #endif
00755     stat.rx_framing_error = (!(!(ksdk_uart_status & kUART_FramingErrorFlag )));
00756     stat.rx_parity_error = (!(!(ksdk_uart_status & kUART_ParityErrorFlag )));
00757     stat.reserved = 0U;
00758 
00759     return stat;
00760 }
00761 #endif
00762 
00763 #endif
00764 
00765 #if (((RTE_USART0 && !RTE_USART0_DMA_EN) && defined(UART0)) || \
00766      ((RTE_USART1 && !RTE_USART1_DMA_EN) && defined(UART1)) || \
00767      ((RTE_USART2 && !RTE_USART2_DMA_EN) && defined(UART2)) || \
00768      ((RTE_USART3 && !RTE_USART3_DMA_EN) && defined(UART3)) || \
00769      ((RTE_USART4 && !RTE_USART4_DMA_EN) && defined(UART4)) || ((RTE_USART5 && !RTE_USART5_DMA_EN) && defined(UART5)))
00770 
00771 void KSDK_UART_NonBlockingCallback(UART_Type *base, uart_handle_t *handle, status_t status, void *userData)
00772 {
00773     uint32_t event = 0U;
00774 
00775     switch (status)
00776     {
00777         case kStatus_UART_TxIdle :
00778             event = ARM_USART_EVENT_SEND_COMPLETE;
00779             break;
00780 
00781         case kStatus_UART_RxIdle :
00782             event = ARM_USART_EVENT_RECEIVE_COMPLETE;
00783             break;
00784 
00785         case kStatus_UART_RxHardwareOverrun :
00786             event = ARM_USART_EVENT_RX_OVERFLOW;
00787             break;
00788 
00789         case kStatus_UART_FramingError :
00790             event = ARM_USART_EVENT_RX_FRAMING_ERROR;
00791             break;
00792 
00793         case kStatus_UART_ParityError :
00794             event = ARM_USART_EVENT_RX_PARITY_ERROR;
00795             break;
00796 
00797         default:
00798             event = 0U;
00799             break;
00800     }
00801 
00802     /* User data is actually CMSIS driver callback. */
00803     if ((0U != event) && (userData))
00804     {
00805         ((ARM_USART_SignalEvent_t)userData)(event);
00806     }
00807 }
00808 
00809 static int32_t UART_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event, cmsis_uart_interrupt_driver_state_t *uart)
00810 {
00811     if (!(uart->flags & USART_FLAG_INIT))
00812     {
00813         uart->cb_event = cb_event;
00814         uart->flags = USART_FLAG_INIT;
00815     }
00816 
00817     return ARM_DRIVER_OK;
00818 }
00819 
00820 static int32_t UART_NonBlockingUninitialize(cmsis_uart_interrupt_driver_state_t *uart)
00821 {
00822     uart->flags = USART_FLAG_UNINIT;
00823     return ARM_DRIVER_OK;
00824 }
00825 
00826 static int32_t UART_NonBlockingPowerControl(ARM_POWER_STATE state, cmsis_uart_interrupt_driver_state_t *uart)
00827 {
00828     uart_config_t config;
00829 
00830     switch (state)
00831     {
00832         case ARM_POWER_OFF:
00833             if (uart->flags & USART_FLAG_POWER)
00834             {
00835                 UART_Deinit(uart->resource->base);
00836                 uart->flags = USART_FLAG_INIT;
00837             }
00838             break;
00839         case ARM_POWER_LOW:
00840             return ARM_DRIVER_ERROR_UNSUPPORTED;
00841         case ARM_POWER_FULL:
00842             /* Must be initialized first. */
00843             if (uart->flags == USART_FLAG_UNINIT)
00844             {
00845                 return ARM_DRIVER_ERROR;
00846             }
00847 
00848             if (uart->flags & USART_FLAG_POWER)
00849             {
00850                 /* Driver already powered */
00851                 break;
00852             }
00853 
00854             UART_GetDefaultConfig(&config);
00855             config.enableTx  = true;
00856             config.enableRx  = true;
00857 
00858             UART_Init(uart->resource->base, &config, uart->resource->GetFreq());
00859             UART_TransferCreateHandle(uart->resource->base, uart->handle, KSDK_UART_NonBlockingCallback,
00860                                       (void *)uart->cb_event);
00861             uart->flags |= (USART_FLAG_POWER | USART_FLAG_CONFIGURED);
00862 
00863             break;
00864         default:
00865             return ARM_DRIVER_ERROR_UNSUPPORTED;
00866     }
00867 
00868     return ARM_DRIVER_OK;
00869 }
00870 
00871 static int32_t UART_NonBlockingSend(const void *data, uint32_t num, cmsis_uart_interrupt_driver_state_t *uart)
00872 {
00873     int32_t ret;
00874     status_t status;
00875     uart_transfer_t xfer;
00876 
00877     xfer.data  = (uint8_t *)data;
00878     xfer.dataSize  = num;
00879 
00880     status = UART_TransferSendNonBlocking(uart->resource->base, uart->handle, &xfer);
00881 
00882     switch (status)
00883     {
00884         case kStatus_Success:
00885             ret = ARM_DRIVER_OK;
00886             break;
00887         case kStatus_InvalidArgument:
00888             ret = ARM_DRIVER_ERROR_PARAMETER;
00889             break;
00890         case kStatus_UART_TxBusy :
00891             ret = ARM_DRIVER_ERROR_BUSY;
00892             break;
00893         default:
00894             ret = ARM_DRIVER_ERROR;
00895             break;
00896     }
00897 
00898     return ret;
00899 }
00900 
00901 static int32_t UART_NonBlockingReceive(void *data, uint32_t num, cmsis_uart_interrupt_driver_state_t *uart)
00902 {
00903     int32_t ret;
00904     status_t status;
00905     uart_transfer_t xfer;
00906 
00907     xfer.data  = data;
00908     xfer.dataSize  = num;
00909 
00910     status = UART_TransferReceiveNonBlocking(uart->resource->base, uart->handle, &xfer, NULL);
00911 
00912     switch (status)
00913     {
00914         case kStatus_Success:
00915             ret = ARM_DRIVER_OK;
00916             break;
00917         case kStatus_InvalidArgument:
00918             ret = ARM_DRIVER_ERROR_PARAMETER;
00919             break;
00920         case kStatus_UART_RxBusy :
00921             ret = ARM_DRIVER_ERROR_BUSY;
00922             break;
00923         default:
00924             ret = ARM_DRIVER_ERROR;
00925             break;
00926     }
00927 
00928     return ret;
00929 }
00930 
00931 static int32_t UART_NonBlockingTransfer(const void *data_out,
00932                                         void *data_in,
00933                                         uint32_t num,
00934                                         cmsis_uart_interrupt_driver_state_t *uart)
00935 {
00936     /* Only in synchronous mode */
00937     return ARM_DRIVER_ERROR;
00938 }
00939 
00940 static uint32_t UART_NonBlockingGetTxCount(cmsis_uart_interrupt_driver_state_t *uart)
00941 {
00942     uint32_t cnt;
00943 
00944     /* If TX not in progress, then the TX count is txDataSizeAll saved in handle. */
00945     if (kStatus_NoTransferInProgress == UART_TransferGetSendCount(uart->resource->base, uart->handle, &cnt))
00946     {
00947         cnt = uart->handle->txDataSizeAll;
00948     }
00949 
00950     return cnt;
00951 }
00952 
00953 static uint32_t UART_NonBlockingGetRxCount(cmsis_uart_interrupt_driver_state_t *uart)
00954 {
00955     uint32_t cnt;
00956 
00957     if (kStatus_NoTransferInProgress == UART_TransferGetReceiveCount(uart->resource->base, uart->handle, &cnt))
00958     {
00959         cnt = uart->handle->rxDataSizeAll;
00960     }
00961 
00962     return cnt;
00963 }
00964 
00965 static int32_t UART_NonBlockingControl(uint32_t control, uint32_t arg, cmsis_uart_interrupt_driver_state_t *uart)
00966 {
00967     /* Must be power on. */
00968     if (!(uart->flags & USART_FLAG_POWER))
00969     {
00970         return ARM_DRIVER_ERROR;
00971     }
00972 
00973     /* Does not support these features. */
00974     if (control & (ARM_USART_FLOW_CONTROL_Msk | ARM_USART_CPOL_Msk | ARM_USART_CPHA_Msk))
00975     {
00976         return ARM_DRIVER_ERROR_UNSUPPORTED;
00977     }
00978 
00979     switch (control & ARM_USART_CONTROL_Msk)
00980     {
00981         /* Abort Send */
00982         case ARM_USART_ABORT_SEND:
00983             UART_TransferAbortSend(uart->resource->base, uart->handle);
00984             return ARM_DRIVER_OK;
00985 
00986         /* Abort receive */
00987         case ARM_USART_ABORT_RECEIVE:
00988             UART_TransferAbortReceive(uart->resource->base, uart->handle);
00989             return ARM_DRIVER_OK;
00990 
00991         default:
00992             break;
00993     }
00994 
00995     return UART_CommonControl(control, arg, uart->resource, &uart->flags);
00996 }
00997 
00998 static ARM_USART_STATUS UART_NonBlockingGetStatus(cmsis_uart_interrupt_driver_state_t *uart)
00999 {
01000     ARM_USART_STATUS stat;
01001     uint32_t ksdk_uart_status = UART_GetStatusFlags(uart->resource->base);
01002 
01003     stat.tx_busy = ((kuart_TxBusy == uart->handle->txState) ? (1U) : (0U));
01004     stat.rx_busy = ((kuart_RxBusy == uart->handle->rxState) ? (1U) : (0U));
01005 
01006     stat.tx_underflow = 0U;
01007     stat.rx_overflow = (!(!(ksdk_uart_status & kUART_RxOverrunFlag )));
01008 #if defined(FSL_FEATURE_uart_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_uart_HAS_LIN_BREAK_DETECT
01009     stat.rx_break = (!(!(ksdk_uart_status & kuart_LinBreakFlag)));
01010 #else
01011     stat.rx_break = 0U;
01012 #endif
01013     stat.rx_framing_error = (!(!(ksdk_uart_status & kUART_FramingErrorFlag )));
01014     stat.rx_parity_error = (!(!(ksdk_uart_status & kUART_ParityErrorFlag )));
01015     stat.reserved = 0U;
01016 
01017     return stat;
01018 }
01019 
01020 #endif
01021 
01022 #if (FSL_FEATURE_SOC_LPSCI_COUNT == 0) && (FSL_FEATURE_SOC_LPUART_COUNT != 2)
01023 
01024 #if defined(UART0) && RTE_USART0
01025 
01026 /* User needs to provide the implementation for UART0_GetFreq/InitPins/DeinitPins
01027 in the application for enabling according instance. */
01028 extern uint32_t UART0_GetFreq(void);
01029 extern void UART0_InitPins(void);
01030 extern void UART0_DeinitPins(void);
01031 
01032 cmsis_uart_resource_t uart0_Resource = {UART0, UART0_GetFreq};
01033 
01034 #if RTE_USART0_DMA_EN
01035 
01036 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
01037 
01038 cmsis_uart_dma_resource_t uart0_DmaResource = {
01039     RTE_USART0_DMA_TX_DMA_BASE, RTE_USART0_DMA_TX_CH, RTE_USART0_DMA_TX_DMAMUX_BASE, RTE_USART0_DMA_TX_PERI_SEL,
01040 
01041     RTE_USART0_DMA_RX_DMA_BASE, RTE_USART0_DMA_RX_CH, RTE_USART0_DMA_RX_DMAMUX_BASE, RTE_USART0_DMA_RX_PERI_SEL,
01042 };
01043 
01044 uart_dma_handle_t UART0_DmaHandle;
01045 dma_handle_t UART0_DmaRxHandle;
01046 dma_handle_t UART0_DmaTxHandle;
01047 
01048 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
01049 ARMCC_SECTION("uart0_dma_driver_state")
01050 cmsis_uart_dma_driver_state_t uart0_DmaDriverState = {
01051 #else
01052 cmsis_uart_dma_driver_state_t uart0_DmaDriverState = {
01053 #endif
01054     &uart0_Resource, &uart0_DmaResource, &UART0_DmaHandle, &UART0_DmaRxHandle, &UART0_DmaTxHandle,
01055 };
01056 
01057 static int32_t UART0_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
01058 {
01059     UART0_InitPins();
01060     return UART_DmaInitialize(cb_event, &uart0_DmaDriverState);
01061 }
01062 
01063 static int32_t UART0_DmaUninitialize(void)
01064 {
01065     UART0_DeinitPins();
01066     return UART_DmaUninitialize(&uart0_DmaDriverState);
01067 }
01068 
01069 static int32_t UART0_DmaPowerControl(ARM_POWER_STATE state)
01070 {
01071     return UART_DmaPowerControl(state, &uart0_DmaDriverState);
01072 }
01073 
01074 static int32_t UART0_DmaSend(const void *data, uint32_t num)
01075 {
01076     return UART_DmaSend(data, num, &uart0_DmaDriverState);
01077 }
01078 
01079 static int32_t UART0_DmaReceive(void *data, uint32_t num)
01080 {
01081     return UART_DmaReceive(data, num, &uart0_DmaDriverState);
01082 }
01083 
01084 static int32_t UART0_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
01085 {
01086     return UART_DmaTransfer(data_out, data_in, num, &uart0_DmaDriverState);
01087 }
01088 
01089 static uint32_t UART0_DmaGetTxCount(void)
01090 {
01091     return UART_DmaGetTxCount(&uart0_DmaDriverState);
01092 }
01093 
01094 static uint32_t UART0_DmaGetRxCount(void)
01095 {
01096     return UART_DmaGetRxCount(&uart0_DmaDriverState);
01097 }
01098 
01099 static int32_t UART0_DmaControl(uint32_t control, uint32_t arg)
01100 {
01101     return UART_DmaControl(control, arg, &uart0_DmaDriverState);
01102 }
01103 
01104 static ARM_USART_STATUS UART0_DmaGetStatus(void)
01105 {
01106     return UART_DmaGetStatus(&uart0_DmaDriverState);
01107 }
01108 
01109 #endif
01110 
01111 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
01112 
01113 cmsis_uart_edma_resource_t uart0_EdmaResource = {
01114     RTE_USART0_DMA_TX_DMA_BASE, RTE_USART0_DMA_TX_CH, RTE_USART0_DMA_TX_DMAMUX_BASE, RTE_USART0_DMA_TX_PERI_SEL,
01115 
01116     RTE_USART0_DMA_RX_DMA_BASE, RTE_USART0_DMA_RX_CH, RTE_USART0_DMA_RX_DMAMUX_BASE, RTE_USART0_DMA_RX_PERI_SEL,
01117 };
01118 
01119 uart_edma_handle_t UART0_EdmaHandle;
01120 edma_handle_t UART0_EdmaRxHandle;
01121 edma_handle_t UART0_EdmaTxHandle;
01122 
01123 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
01124 ARMCC_SECTION("uart0_edma_driver_state")
01125 cmsis_uart_edma_driver_state_t uart0_EdmaDriverState = {
01126 #else
01127 cmsis_uart_edma_driver_state_t uart0_EdmaDriverState = {
01128 #endif
01129     &uart0_Resource, &uart0_EdmaResource, &UART0_EdmaHandle, &UART0_EdmaRxHandle, &UART0_EdmaTxHandle,
01130 };
01131 
01132 static int32_t UART0_EdmaInitialize(ARM_USART_SignalEvent_t cb_event)
01133 {
01134     UART0_InitPins();
01135     return UART_EdmaInitialize(cb_event, &uart0_EdmaDriverState);
01136 }
01137 
01138 static int32_t UART0_EdmaUninitialize(void)
01139 {
01140     UART0_DeinitPins();
01141     return UART_EdmaUninitialize(&uart0_EdmaDriverState);
01142 }
01143 
01144 static int32_t UART0_EdmaPowerControl(ARM_POWER_STATE state)
01145 {
01146     return UART_EdmaPowerControl(state, &uart0_EdmaDriverState);
01147 }
01148 
01149 static int32_t UART0_EdmaSend(const void *data, uint32_t num)
01150 {
01151     return UART_EdmaSend(data, num, &uart0_EdmaDriverState);
01152 }
01153 
01154 static int32_t UART0_EdmaReceive(void *data, uint32_t num)
01155 {
01156     return UART_EdmaReceive(data, num, &uart0_EdmaDriverState);
01157 }
01158 
01159 static int32_t UART0_EdmaTransfer(const void *data_out, void *data_in, uint32_t num)
01160 {
01161     return UART_EdmaTransfer(data_out, data_in, num, &uart0_EdmaDriverState);
01162 }
01163 
01164 static uint32_t UART0_EdmaGetTxCount(void)
01165 {
01166     return UART_EdmaGetTxCount(&uart0_EdmaDriverState);
01167 }
01168 
01169 static uint32_t UART0_EdmaGetRxCount(void)
01170 {
01171     return UART_EdmaGetRxCount(&uart0_EdmaDriverState);
01172 }
01173 
01174 static int32_t UART0_EdmaControl(uint32_t control, uint32_t arg)
01175 {
01176     return UART_EdmaControl(control, arg, &uart0_EdmaDriverState);
01177 }
01178 
01179 static ARM_USART_STATUS UART0_EdmaGetStatus(void)
01180 {
01181     return UART_EdmaGetStatus(&uart0_EdmaDriverState);
01182 }
01183 
01184 #endif
01185 
01186 #else
01187 
01188 uart_handle_t UART0_Handle;
01189 
01190 #if defined(USART0_RX_BUFFER_ENABLE) && (USART0_RX_BUFFER_ENABLE == 1)
01191 static uint8_t uart0_rxRingBuffer[USART_RX_BUFFER_LEN];
01192 #endif
01193 
01194 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
01195 ARMCC_SECTION("uart0_non_blocking_driver_state")
01196 cmsis_uart_interrupt_driver_state_t uart0_NonBlockingDriverState = {
01197 #else
01198 cmsis_uart_interrupt_driver_state_t uart0_NonBlockingDriverState = {
01199 #endif
01200     &uart0_Resource, &UART0_Handle,
01201 };
01202 
01203 static int32_t UART0_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
01204 {
01205     UART0_InitPins();
01206     return UART_NonBlockingInitialize(cb_event, &uart0_NonBlockingDriverState);
01207 }
01208 
01209 static int32_t UART0_NonBlockingUninitialize(void)
01210 {
01211     UART0_DeinitPins();
01212     return UART_NonBlockingUninitialize(&uart0_NonBlockingDriverState);
01213 }
01214 
01215 static int32_t UART0_NonBlockingPowerControl(ARM_POWER_STATE state)
01216 {
01217     uint32_t result;
01218 
01219     result = UART_NonBlockingPowerControl(state, &uart0_NonBlockingDriverState);
01220 
01221 #if defined(USART0_RX_BUFFER_ENABLE) && (USART0_RX_BUFFER_ENABLE == 1)
01222     if ((state == ARM_POWER_FULL) && (uart0_NonBlockingDriverState.handle->rxRingBuffer == NULL))
01223     {
01224         UART_TransferStartRingBuffer(uart0_NonBlockingDriverState.resource->base, uart0_NonBlockingDriverState.handle,
01225                                      uart0_rxRingBuffer, USART_RX_BUFFER_LEN);
01226     }
01227 #endif
01228 
01229     return result;
01230 }
01231 
01232 static int32_t UART0_NonBlockingSend(const void *data, uint32_t num)
01233 {
01234     return UART_NonBlockingSend(data, num, &uart0_NonBlockingDriverState);
01235 }
01236 
01237 static int32_t UART0_NonBlockingReceive(void *data, uint32_t num)
01238 {
01239     return UART_NonBlockingReceive(data, num, &uart0_NonBlockingDriverState);
01240 }
01241 
01242 static int32_t UART0_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
01243 {
01244     return UART_NonBlockingTransfer(data_out, data_in, num, &uart0_NonBlockingDriverState);
01245 }
01246 
01247 static uint32_t UART0_NonBlockingGetTxCount(void)
01248 {
01249     return UART_NonBlockingGetTxCount(&uart0_NonBlockingDriverState);
01250 }
01251 
01252 static uint32_t UART0_NonBlockingGetRxCount(void)
01253 {
01254     return UART_NonBlockingGetRxCount(&uart0_NonBlockingDriverState);
01255 }
01256 
01257 static int32_t UART0_NonBlockingControl(uint32_t control, uint32_t arg)
01258 {
01259     int32_t result;
01260 
01261     result = UART_NonBlockingControl(control, arg, &uart0_NonBlockingDriverState);
01262     if (ARM_DRIVER_OK != result)
01263     {
01264         return result;
01265     }
01266     if (uart0_NonBlockingDriverState.handle->rxRingBuffer != NULL)
01267     {
01268         /* Enable the interrupt to accept the data when user need the ring buffer. */
01269         UART_EnableInterrupts(uart0_NonBlockingDriverState.resource->base, kUART_RxDataRegFullInterruptEnable  |
01270                                                                                kUART_RxOverrunInterruptEnable  |
01271                                                                                kUART_FramingErrorInterruptEnable );
01272         /* Enable parity error interrupt when parity mode is enable*/
01273         if (UART_C1_PE_MASK & uart0_NonBlockingDriverState.resource->base->C1)
01274         {
01275             UART_EnableInterrupts(uart0_NonBlockingDriverState.resource->base, kUART_ParityErrorInterruptEnable );
01276         }
01277     }
01278     return ARM_DRIVER_OK;
01279 }
01280 
01281 static ARM_USART_STATUS UART0_NonBlockingGetStatus(void)
01282 {
01283     return UART_NonBlockingGetStatus(&uart0_NonBlockingDriverState);
01284 }
01285 
01286 #endif
01287 
01288 ARM_DRIVER_USART Driver_USART0 = {
01289     UARTx_GetVersion,      UARTx_GetCapabilities,
01290 #if RTE_USART0_DMA_EN
01291 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
01292     UART0_EdmaInitialize,  UART0_EdmaUninitialize, UART0_EdmaPowerControl, UART0_EdmaSend,    UART0_EdmaReceive,
01293     UART0_EdmaTransfer,    UART0_EdmaGetTxCount,   UART0_EdmaGetRxCount,   UART0_EdmaControl, UART0_EdmaGetStatus,
01294 #else
01295     UART0_DmaInitialize,   UART0_DmaUninitialize, UART0_DmaPowerControl, UART0_DmaSend,    UART0_DmaReceive,
01296     UART0_DmaTransfer,     UART0_DmaGetTxCount,   UART0_DmaGetRxCount,   UART0_DmaControl, UART0_DmaGetStatus,
01297 #endif
01298 #else
01299     UART0_NonBlockingInitialize,
01300     UART0_NonBlockingUninitialize,
01301     UART0_NonBlockingPowerControl,
01302     UART0_NonBlockingSend,
01303     UART0_NonBlockingReceive,
01304     UART0_NonBlockingTransfer,
01305     UART0_NonBlockingGetTxCount,
01306     UART0_NonBlockingGetRxCount,
01307     UART0_NonBlockingControl,
01308     UART0_NonBlockingGetStatus,
01309 #endif
01310     UARTx_SetModemControl, UARTx_GetModemStatus};
01311 
01312 #endif /* uart0 */
01313 
01314 #endif
01315 
01316 #if (FSL_FEATURE_SOC_LPUART_COUNT != 2)
01317 
01318 #if defined(UART1) && RTE_USART1
01319 
01320 /* User needs to provide the implementation for UART1_GetFreq/InitPins/DeinitPins
01321 in the application for enabling according instance. */
01322 extern uint32_t UART1_GetFreq(void);
01323 extern void UART1_InitPins(void);
01324 extern void UART1_DeinitPins(void);
01325 
01326 cmsis_uart_resource_t uart1_Resource = {UART1, UART1_GetFreq};
01327 
01328 #if RTE_USART1_DMA_EN
01329 
01330 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
01331 
01332 cmsis_uart_dma_resource_t uart1_DmaResource = {
01333     RTE_USART1_DMA_TX_DMA_BASE, RTE_USART1_DMA_TX_CH, RTE_USART1_DMA_TX_DMAMUX_BASE, RTE_USART1_DMA_TX_PERI_SEL,
01334 
01335     RTE_USART1_DMA_RX_DMA_BASE, RTE_USART1_DMA_RX_CH, RTE_USART1_DMA_RX_DMAMUX_BASE, RTE_USART1_DMA_RX_PERI_SEL,
01336 };
01337 
01338 uart_dma_handle_t UART1_DmaHandle;
01339 dma_handle_t UART1_DmaRxHandle;
01340 dma_handle_t UART1_DmaTxHandle;
01341 
01342 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
01343 ARMCC_SECTION("uart1_dma_driver_state")
01344 cmsis_uart_dma_driver_state_t uart1_DmaDriverState = {
01345 #else
01346 cmsis_uart_dma_driver_state_t uart1_DmaDriverState = {
01347 #endif
01348     &uart1_Resource, &uart1_DmaResource, &UART1_DmaHandle, &UART1_DmaRxHandle, &UART1_DmaTxHandle,
01349 };
01350 
01351 static int32_t UART1_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
01352 {
01353     UART1_InitPins();
01354     return UART_DmaInitialize(cb_event, &uart1_DmaDriverState);
01355 }
01356 
01357 static int32_t UART1_DmaUninitialize(void)
01358 {
01359     UART1_DeinitPins();
01360     return UART_DmaUninitialize(&uart1_DmaDriverState);
01361 }
01362 
01363 static int32_t UART1_DmaPowerControl(ARM_POWER_STATE state)
01364 {
01365     return UART_DmaPowerControl(state, &uart1_DmaDriverState);
01366 }
01367 
01368 static int32_t UART1_DmaSend(const void *data, uint32_t num)
01369 {
01370     return UART_DmaSend(data, num, &uart1_DmaDriverState);
01371 }
01372 
01373 static int32_t UART1_DmaReceive(void *data, uint32_t num)
01374 {
01375     return UART_DmaReceive(data, num, &uart1_DmaDriverState);
01376 }
01377 
01378 static int32_t UART1_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
01379 {
01380     return UART_DmaTransfer(data_out, data_in, num, &uart1_DmaDriverState);
01381 }
01382 
01383 static uint32_t UART1_DmaGetTxCount(void)
01384 {
01385     return UART_DmaGetTxCount(&uart1_DmaDriverState);
01386 }
01387 
01388 static uint32_t UART1_DmaGetRxCount(void)
01389 {
01390     return UART_DmaGetRxCount(&uart1_DmaDriverState);
01391 }
01392 
01393 static int32_t UART1_DmaControl(uint32_t control, uint32_t arg)
01394 {
01395     return UART_DmaControl(control, arg, &uart1_DmaDriverState);
01396 }
01397 
01398 static ARM_USART_STATUS UART1_DmaGetStatus(void)
01399 {
01400     return UART_DmaGetStatus(&uart1_DmaDriverState);
01401 }
01402 
01403 #endif
01404 
01405 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
01406 
01407 cmsis_uart_edma_resource_t uart1_EdmaResource = {
01408     RTE_USART1_DMA_TX_DMA_BASE, RTE_USART1_DMA_TX_CH, RTE_USART1_DMA_TX_DMAMUX_BASE, RTE_USART1_DMA_TX_PERI_SEL,
01409 
01410     RTE_USART1_DMA_RX_DMA_BASE, RTE_USART1_DMA_RX_CH, RTE_USART1_DMA_RX_DMAMUX_BASE, RTE_USART1_DMA_RX_PERI_SEL,
01411 };
01412 
01413 uart_edma_handle_t UART1_EdmaHandle;
01414 edma_handle_t UART1_EdmaRxHandle;
01415 edma_handle_t UART1_EdmaTxHandle;
01416 
01417 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
01418 ARMCC_SECTION("uart1_edma_driver_state")
01419 cmsis_uart_edma_driver_state_t uart1_EdmaDriverState = {
01420 #else
01421 cmsis_uart_edma_driver_state_t uart1_EdmaDriverState = {
01422 #endif
01423     &uart1_Resource, &uart1_EdmaResource, &UART1_EdmaHandle, &UART1_EdmaRxHandle, &UART1_EdmaTxHandle,
01424 };
01425 
01426 static int32_t UART1_EdmaInitialize(ARM_USART_SignalEvent_t cb_event)
01427 {
01428     UART1_InitPins();
01429     return UART_EdmaInitialize(cb_event, &uart1_EdmaDriverState);
01430 }
01431 
01432 static int32_t UART1_EdmaUninitialize(void)
01433 {
01434     UART1_DeinitPins();
01435     return UART_EdmaUninitialize(&uart1_EdmaDriverState);
01436 }
01437 
01438 static int32_t UART1_EdmaPowerControl(ARM_POWER_STATE state)
01439 {
01440     return UART_EdmaPowerControl(state, &uart1_EdmaDriverState);
01441 }
01442 
01443 static int32_t UART1_EdmaSend(const void *data, uint32_t num)
01444 {
01445     return UART_EdmaSend(data, num, &uart1_EdmaDriverState);
01446 }
01447 
01448 static int32_t UART1_EdmaReceive(void *data, uint32_t num)
01449 {
01450     return UART_EdmaReceive(data, num, &uart1_EdmaDriverState);
01451 }
01452 
01453 static int32_t UART1_EdmaTransfer(const void *data_out, void *data_in, uint32_t num)
01454 {
01455     return UART_EdmaTransfer(data_out, data_in, num, &uart1_EdmaDriverState);
01456 }
01457 
01458 static uint32_t UART1_EdmaGetTxCount(void)
01459 {
01460     return UART_EdmaGetTxCount(&uart1_EdmaDriverState);
01461 }
01462 
01463 static uint32_t UART1_EdmaGetRxCount(void)
01464 {
01465     return UART_EdmaGetRxCount(&uart1_EdmaDriverState);
01466 }
01467 
01468 static int32_t UART1_EdmaControl(uint32_t control, uint32_t arg)
01469 {
01470     return UART_EdmaControl(control, arg, &uart1_EdmaDriverState);
01471 }
01472 
01473 static ARM_USART_STATUS UART1_EdmaGetStatus(void)
01474 {
01475     return UART_EdmaGetStatus(&uart1_EdmaDriverState);
01476 }
01477 
01478 #endif
01479 
01480 #else
01481 
01482 uart_handle_t UART1_Handle;
01483 
01484 #if defined(USART1_RX_BUFFER_ENABLE) && (USART1_RX_BUFFER_ENABLE == 1)
01485 static uint8_t uart1_rxRingBuffer[USART_RX_BUFFER_LEN];
01486 #endif
01487 
01488 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
01489 ARMCC_SECTION("uart1_non_blocking_driver_state")
01490 cmsis_uart_interrupt_driver_state_t uart1_NonBlockingDriverState = {
01491 #else
01492 cmsis_uart_interrupt_driver_state_t uart1_NonBlockingDriverState = {
01493 #endif
01494     &uart1_Resource, &UART1_Handle,
01495 };
01496 
01497 static int32_t UART1_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
01498 {
01499     UART1_InitPins();
01500     return UART_NonBlockingInitialize(cb_event, &uart1_NonBlockingDriverState);
01501 }
01502 
01503 static int32_t UART1_NonBlockingUninitialize(void)
01504 {
01505     UART1_DeinitPins();
01506     return UART_NonBlockingUninitialize(&uart1_NonBlockingDriverState);
01507 }
01508 
01509 static int32_t UART1_NonBlockingPowerControl(ARM_POWER_STATE state)
01510 {
01511     uint32_t result;
01512 
01513     result = UART_NonBlockingPowerControl(state, &uart1_NonBlockingDriverState);
01514 
01515 #if defined(USART1_RX_BUFFER_ENABLE) && (USART1_RX_BUFFER_ENABLE == 1)
01516     if ((state == ARM_POWER_FULL) && (uart1_NonBlockingDriverState.handle->rxRingBuffer == NULL))
01517     {
01518         UART_TransferStartRingBuffer(uart1_NonBlockingDriverState.resource->base, uart1_NonBlockingDriverState.handle,
01519                                      uart1_rxRingBuffer, USART_RX_BUFFER_LEN);
01520     }
01521 #endif
01522 
01523     return result;
01524 }
01525 
01526 static int32_t UART1_NonBlockingSend(const void *data, uint32_t num)
01527 {
01528     return UART_NonBlockingSend(data, num, &uart1_NonBlockingDriverState);
01529 }
01530 
01531 static int32_t UART1_NonBlockingReceive(void *data, uint32_t num)
01532 {
01533     return UART_NonBlockingReceive(data, num, &uart1_NonBlockingDriverState);
01534 }
01535 
01536 static int32_t UART1_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
01537 {
01538     return UART_NonBlockingTransfer(data_out, data_in, num, &uart1_NonBlockingDriverState);
01539 }
01540 
01541 static uint32_t UART1_NonBlockingGetTxCount(void)
01542 {
01543     return UART_NonBlockingGetTxCount(&uart1_NonBlockingDriverState);
01544 }
01545 
01546 static uint32_t UART1_NonBlockingGetRxCount(void)
01547 {
01548     return UART_NonBlockingGetRxCount(&uart1_NonBlockingDriverState);
01549 }
01550 
01551 static int32_t UART1_NonBlockingControl(uint32_t control, uint32_t arg)
01552 {
01553     int32_t result;
01554 
01555     result = UART_NonBlockingControl(control, arg, &uart1_NonBlockingDriverState);
01556     if (ARM_DRIVER_OK != result)
01557     {
01558         return result;
01559     }
01560     if (uart1_NonBlockingDriverState.handle->rxRingBuffer != NULL)
01561     {
01562         /* Enable the interrupt to accept the data when user need the ring buffer. */
01563         UART_EnableInterrupts(uart1_NonBlockingDriverState.resource->base, kUART_RxDataRegFullInterruptEnable  |
01564                                                                                kUART_RxOverrunInterruptEnable  |
01565                                                                                kUART_FramingErrorInterruptEnable );
01566         /* Enable parity error interrupt when parity mode is enable*/
01567         if (UART_C1_PE_MASK & uart1_NonBlockingDriverState.resource->base->C1)
01568         {
01569             UART_EnableInterrupts(uart1_NonBlockingDriverState.resource->base, kUART_ParityErrorInterruptEnable );
01570         }
01571     }
01572     return ARM_DRIVER_OK;
01573 }
01574 
01575 static ARM_USART_STATUS UART1_NonBlockingGetStatus(void)
01576 {
01577     return UART_NonBlockingGetStatus(&uart1_NonBlockingDriverState);
01578 }
01579 
01580 #endif
01581 
01582 ARM_DRIVER_USART Driver_USART1 = {
01583     UARTx_GetVersion,      UARTx_GetCapabilities,
01584 #if RTE_USART1_DMA_EN
01585 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
01586     UART1_EdmaInitialize,  UART1_EdmaUninitialize, UART1_EdmaPowerControl, UART1_EdmaSend,    UART1_EdmaReceive,
01587     UART1_EdmaTransfer,    UART1_EdmaGetTxCount,   UART1_EdmaGetRxCount,   UART1_EdmaControl, UART1_EdmaGetStatus,
01588 #else
01589     UART1_DmaInitialize,   UART1_DmaUninitialize, UART1_DmaPowerControl, UART1_DmaSend,    UART1_DmaReceive,
01590     UART1_DmaTransfer,     UART1_DmaGetTxCount,   UART1_DmaGetRxCount,   UART1_DmaControl, UART1_DmaGetStatus,
01591 #endif
01592 #else
01593     UART1_NonBlockingInitialize,
01594     UART1_NonBlockingUninitialize,
01595     UART1_NonBlockingPowerControl,
01596     UART1_NonBlockingSend,
01597     UART1_NonBlockingReceive,
01598     UART1_NonBlockingTransfer,
01599     UART1_NonBlockingGetTxCount,
01600     UART1_NonBlockingGetRxCount,
01601     UART1_NonBlockingControl,
01602     UART1_NonBlockingGetStatus,
01603 #endif
01604     UARTx_SetModemControl, UARTx_GetModemStatus};
01605 
01606 #endif /* uart1 */
01607 
01608 #endif
01609 
01610 #if defined(UART2) && RTE_USART2
01611 
01612 /* User needs to provide the implementation for UART2_GetFreq/InitPins/DeinitPins
01613 in the application for enabling according instance. */
01614 extern uint32_t UART2_GetFreq(void);
01615 extern void UART2_InitPins(void);
01616 extern void UART2_DeinitPins(void);
01617 
01618 cmsis_uart_resource_t uart2_Resource = {UART2, UART2_GetFreq};
01619 
01620 #if RTE_USART2_DMA_EN
01621 
01622 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
01623 
01624 cmsis_uart_dma_resource_t uart2_DmaResource = {
01625     RTE_USART2_DMA_TX_DMA_BASE, RTE_USART2_DMA_TX_CH, RTE_USART2_DMA_TX_DMAMUX_BASE, RTE_USART2_DMA_TX_PERI_SEL,
01626 
01627     RTE_USART2_DMA_RX_DMA_BASE, RTE_USART2_DMA_RX_CH, RTE_USART2_DMA_RX_DMAMUX_BASE, RTE_USART2_DMA_RX_PERI_SEL,
01628 };
01629 
01630 uart_dma_handle_t UART2_DmaHandle;
01631 dma_handle_t UART2_DmaRxHandle;
01632 dma_handle_t UART2_DmaTxHandle;
01633 
01634 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
01635 ARMCC_SECTION("uart2_dma_driver_state")
01636 cmsis_uart_dma_driver_state_t uart2_DmaDriverState = {
01637 #else
01638 cmsis_uart_dma_driver_state_t uart2_DmaDriverState = {
01639 #endif
01640     &uart2_Resource, &uart2_DmaResource, &UART2_DmaHandle, &UART2_DmaRxHandle, &UART2_DmaTxHandle,
01641 };
01642 
01643 static int32_t UART2_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
01644 {
01645     UART2_InitPins();
01646     return UART_DmaInitialize(cb_event, &uart2_DmaDriverState);
01647 }
01648 
01649 static int32_t UART2_DmaUninitialize(void)
01650 {
01651     UART2_DeinitPins();
01652     return UART_DmaUninitialize(&uart2_DmaDriverState);
01653 }
01654 
01655 static int32_t UART2_DmaPowerControl(ARM_POWER_STATE state)
01656 {
01657     return UART_DmaPowerControl(state, &uart2_DmaDriverState);
01658 }
01659 
01660 static int32_t UART2_DmaSend(const void *data, uint32_t num)
01661 {
01662     return UART_DmaSend(data, num, &uart2_DmaDriverState);
01663 }
01664 
01665 static int32_t UART2_DmaReceive(void *data, uint32_t num)
01666 {
01667     return UART_DmaReceive(data, num, &uart2_DmaDriverState);
01668 }
01669 
01670 static int32_t UART2_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
01671 {
01672     return UART_DmaTransfer(data_out, data_in, num, &uart2_DmaDriverState);
01673 }
01674 
01675 static uint32_t UART2_DmaGetTxCount(void)
01676 {
01677     return UART_DmaGetTxCount(&uart2_DmaDriverState);
01678 }
01679 
01680 static uint32_t UART2_DmaGetRxCount(void)
01681 {
01682     return UART_DmaGetRxCount(&uart2_DmaDriverState);
01683 }
01684 
01685 static int32_t UART2_DmaControl(uint32_t control, uint32_t arg)
01686 {
01687     return UART_DmaControl(control, arg, &uart2_DmaDriverState);
01688 }
01689 
01690 static ARM_USART_STATUS UART2_DmaGetStatus(void)
01691 {
01692     return UART_DmaGetStatus(&uart2_DmaDriverState);
01693 }
01694 
01695 #endif
01696 
01697 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
01698 
01699 cmsis_uart_edma_resource_t uart2_EdmaResource = {
01700     RTE_USART2_DMA_TX_DMA_BASE, RTE_USART2_DMA_TX_CH, RTE_USART2_DMA_TX_DMAMUX_BASE, RTE_USART2_DMA_TX_PERI_SEL,
01701 
01702     RTE_USART2_DMA_RX_DMA_BASE, RTE_USART2_DMA_RX_CH, RTE_USART2_DMA_RX_DMAMUX_BASE, RTE_USART2_DMA_RX_PERI_SEL,
01703 };
01704 
01705 uart_edma_handle_t UART2_EdmaHandle;
01706 edma_handle_t UART2_EdmaRxHandle;
01707 edma_handle_t UART2_EdmaTxHandle;
01708 
01709 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
01710 ARMCC_SECTION("uart2_edma_driver_state")
01711 cmsis_uart_edma_driver_state_t uart2_EdmaDriverState = {
01712 #else
01713 cmsis_uart_edma_driver_state_t uart2_EdmaDriverState = {
01714 #endif
01715     &uart2_Resource, &uart2_EdmaResource, &UART2_EdmaHandle, &UART2_EdmaRxHandle, &UART2_EdmaTxHandle,
01716 };
01717 
01718 static int32_t UART2_EdmaInitialize(ARM_USART_SignalEvent_t cb_event)
01719 {
01720     UART2_InitPins();
01721     return UART_EdmaInitialize(cb_event, &uart2_EdmaDriverState);
01722 }
01723 
01724 static int32_t UART2_EdmaUninitialize(void)
01725 {
01726     UART2_DeinitPins();
01727     return UART_EdmaUninitialize(&uart2_EdmaDriverState);
01728 }
01729 
01730 static int32_t UART2_EdmaPowerControl(ARM_POWER_STATE state)
01731 {
01732     return UART_EdmaPowerControl(state, &uart2_EdmaDriverState);
01733 }
01734 
01735 static int32_t UART2_EdmaSend(const void *data, uint32_t num)
01736 {
01737     return UART_EdmaSend(data, num, &uart2_EdmaDriverState);
01738 }
01739 
01740 static int32_t UART2_EdmaReceive(void *data, uint32_t num)
01741 {
01742     return UART_EdmaReceive(data, num, &uart2_EdmaDriverState);
01743 }
01744 
01745 static int32_t UART2_EdmaTransfer(const void *data_out, void *data_in, uint32_t num)
01746 {
01747     return UART_EdmaTransfer(data_out, data_in, num, &uart2_EdmaDriverState);
01748 }
01749 
01750 static uint32_t UART2_EdmaGetTxCount(void)
01751 {
01752     return UART_EdmaGetTxCount(&uart2_EdmaDriverState);
01753 }
01754 
01755 static uint32_t UART2_EdmaGetRxCount(void)
01756 {
01757     return UART_EdmaGetRxCount(&uart2_EdmaDriverState);
01758 }
01759 
01760 static int32_t UART2_EdmaControl(uint32_t control, uint32_t arg)
01761 {
01762     return UART_EdmaControl(control, arg, &uart2_EdmaDriverState);
01763 }
01764 
01765 static ARM_USART_STATUS UART2_EdmaGetStatus(void)
01766 {
01767     return UART_EdmaGetStatus(&uart2_EdmaDriverState);
01768 }
01769 
01770 #endif
01771 
01772 #else
01773 
01774 uart_handle_t UART2_Handle;
01775 
01776 #if defined(USART2_RX_BUFFER_ENABLE) && (USART2_RX_BUFFER_ENABLE == 1)
01777 static uint8_t uart2_rxRingBuffer[USART_RX_BUFFER_LEN];
01778 #endif
01779 
01780 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
01781 ARMCC_SECTION("uart2_non_blocking_driver_state")
01782 cmsis_uart_interrupt_driver_state_t uart2_NonBlockingDriverState = {
01783 #else
01784 cmsis_uart_interrupt_driver_state_t uart2_NonBlockingDriverState = {
01785 #endif
01786     &uart2_Resource, &UART2_Handle,
01787 };
01788 
01789 static int32_t UART2_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
01790 {
01791     UART2_InitPins();
01792     return UART_NonBlockingInitialize(cb_event, &uart2_NonBlockingDriverState);
01793 }
01794 
01795 static int32_t UART2_NonBlockingUninitialize(void)
01796 {
01797     UART2_DeinitPins();
01798     return UART_NonBlockingUninitialize(&uart2_NonBlockingDriverState);
01799 }
01800 
01801 static int32_t UART2_NonBlockingPowerControl(ARM_POWER_STATE state)
01802 {
01803     uint32_t result;
01804 
01805     result = UART_NonBlockingPowerControl(state, &uart2_NonBlockingDriverState);
01806 #if defined(USART2_RX_BUFFER_ENABLE) && (USART2_RX_BUFFER_ENABLE == 1)
01807     if ((state == ARM_POWER_FULL) && (uart2_NonBlockingDriverState.handle->rxRingBuffer == NULL))
01808     {
01809         UART_TransferStartRingBuffer(uart2_NonBlockingDriverState.resource->base, uart2_NonBlockingDriverState.handle,
01810                                      uart2_rxRingBuffer, USART_RX_BUFFER_LEN);
01811     }
01812 #endif
01813 
01814     return result;
01815 }
01816 
01817 static int32_t UART2_NonBlockingSend(const void *data, uint32_t num)
01818 {
01819     return UART_NonBlockingSend(data, num, &uart2_NonBlockingDriverState);
01820 }
01821 
01822 static int32_t UART2_NonBlockingReceive(void *data, uint32_t num)
01823 {
01824     return UART_NonBlockingReceive(data, num, &uart2_NonBlockingDriverState);
01825 }
01826 
01827 static int32_t UART2_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
01828 {
01829     return UART_NonBlockingTransfer(data_out, data_in, num, &uart2_NonBlockingDriverState);
01830 }
01831 
01832 static uint32_t UART2_NonBlockingGetTxCount(void)
01833 {
01834     return UART_NonBlockingGetTxCount(&uart2_NonBlockingDriverState);
01835 }
01836 
01837 static uint32_t UART2_NonBlockingGetRxCount(void)
01838 {
01839     return UART_NonBlockingGetRxCount(&uart2_NonBlockingDriverState);
01840 }
01841 
01842 static int32_t UART2_NonBlockingControl(uint32_t control, uint32_t arg)
01843 {
01844     int32_t result;
01845 
01846     result = UART_NonBlockingControl(control, arg, &uart2_NonBlockingDriverState);
01847     if (ARM_DRIVER_OK != result)
01848     {
01849         return result;
01850     }
01851     if (uart2_NonBlockingDriverState.handle->rxRingBuffer != NULL)
01852     {
01853         /* Enable the interrupt to accept the data when user need the ring buffer. */
01854         UART_EnableInterrupts(uart2_NonBlockingDriverState.resource->base, kUART_RxDataRegFullInterruptEnable  |
01855                                                                                kUART_RxOverrunInterruptEnable  |
01856                                                                                kUART_FramingErrorInterruptEnable );
01857         /* Enable parity error interrupt when parity mode is enable*/
01858         if (UART_C1_PE_MASK & uart2_NonBlockingDriverState.resource->base->C1)
01859         {
01860             UART_EnableInterrupts(uart2_NonBlockingDriverState.resource->base, kUART_ParityErrorInterruptEnable );
01861         }
01862     }
01863     return ARM_DRIVER_OK;
01864 }
01865 
01866 static ARM_USART_STATUS UART2_NonBlockingGetStatus(void)
01867 {
01868     return UART_NonBlockingGetStatus(&uart2_NonBlockingDriverState);
01869 }
01870 
01871 #endif
01872 
01873 ARM_DRIVER_USART Driver_USART2 = {
01874     UARTx_GetVersion,      UARTx_GetCapabilities,
01875 #if RTE_USART2_DMA_EN
01876 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
01877     UART2_EdmaInitialize,  UART2_EdmaUninitialize, UART2_EdmaPowerControl, UART2_EdmaSend,    UART2_EdmaReceive,
01878     UART2_EdmaTransfer,    UART2_EdmaGetTxCount,   UART2_EdmaGetRxCount,   UART2_EdmaControl, UART2_EdmaGetStatus,
01879 #else
01880     UART2_DmaInitialize,   UART2_DmaUninitialize, UART2_DmaPowerControl, UART2_DmaSend,    UART2_DmaReceive,
01881     UART2_DmaTransfer,     UART2_DmaGetTxCount,   UART2_DmaGetRxCount,   UART2_DmaControl, UART2_DmaGetStatus,
01882 #endif
01883 #else
01884     UART2_NonBlockingInitialize,
01885     UART2_NonBlockingUninitialize,
01886     UART2_NonBlockingPowerControl,
01887     UART2_NonBlockingSend,
01888     UART2_NonBlockingReceive,
01889     UART2_NonBlockingTransfer,
01890     UART2_NonBlockingGetTxCount,
01891     UART2_NonBlockingGetRxCount,
01892     UART2_NonBlockingControl,
01893     UART2_NonBlockingGetStatus,
01894 #endif
01895     UARTx_SetModemControl, UARTx_GetModemStatus};
01896 
01897 #endif /* uart2 */
01898 
01899 #if defined(UART3) && RTE_USART3
01900 
01901 /* User needs to provide the implementation for UART3_GetFreq/InitPins/DeinitPins
01902 in the application for enabling according instance. */
01903 extern uint32_t UART3_GetFreq(void);
01904 extern void UART3_InitPins(void);
01905 extern void UART3_DeinitPins(void);
01906 
01907 cmsis_uart_resource_t uart3_Resource = {UART3, UART3_GetFreq};
01908 
01909 #if RTE_USART3_DMA_EN
01910 
01911 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
01912 
01913 cmsis_uart_dma_resource_t uart3_DmaResource = {
01914     RTE_USART3_DMA_TX_DMA_BASE, RTE_USART3_DMA_TX_CH, RTE_USART3_DMA_TX_DMAMUX_BASE, RTE_USART3_DMA_TX_PERI_SEL,
01915 
01916     RTE_USART3_DMA_RX_DMA_BASE, RTE_USART3_DMA_RX_CH, RTE_USART3_DMA_RX_DMAMUX_BASE, RTE_USART3_DMA_RX_PERI_SEL,
01917 };
01918 
01919 uart_dma_handle_t UART3_DmaHandle;
01920 dma_handle_t UART3_DmaRxHandle;
01921 dma_handle_t UART3_DmaTxHandle;
01922 
01923 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
01924 ARMCC_SECTION("uart3_dma_driver_state")
01925 cmsis_uart_dma_driver_state_t uart3_DmaDriverState = {
01926 #else
01927 cmsis_uart_dma_driver_state_t uart3_DmaDriverState = {
01928 #endif
01929     &uart3_Resource, &uart3_DmaResource, &UART3_DmaHandle, &UART3_DmaRxHandle, &UART3_DmaTxHandle};
01930 
01931 static int32_t UART3_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
01932 {
01933     UART3_InitPins();
01934     return UART_DmaInitialize(cb_event, &uart3_DmaDriverState);
01935 }
01936 
01937 static int32_t UART3_DmaUninitialize(void)
01938 {
01939     UART3_DeinitPins();
01940     return UART_DmaUninitialize(&uart3_DmaDriverState);
01941 }
01942 
01943 static int32_t UART3_DmaPowerControl(ARM_POWER_STATE state)
01944 {
01945     return UART_DmaPowerControl(state, &uart3_DmaDriverState);
01946 
01947     static int32_t UART3_DmaSend(const void *data, uint32_t num)
01948     {
01949         return UART_DmaSend(data, num, &uart3_DmaDriverState);
01950     }
01951 
01952     static int32_t UART3_DmaReceive(void *data, uint32_t num)
01953     {
01954         return UART_DmaReceive(data, num, &uart3_DmaDriverState);
01955     }
01956 
01957     static int32_t UART3_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
01958     {
01959         return UART_DmaTransfer(data_out, data_in, num, &uart3_DmaDriverState);
01960     }
01961 
01962     static uint32_t UART3_DmaGetTxCount(void)
01963     {
01964         return UART_DmaGetTxCount(&uart3_DmaDriverState);
01965     }
01966 
01967     static uint32_t UART3_DmaGetRxCount(void)
01968     {
01969         return UART_DmaGetRxCount(&uart3_DmaDriverState);
01970     }
01971 
01972     static int32_t UART3_DmaControl(uint32_t control, uint32_t arg)
01973     {
01974         return UART_DmaControl(control, arg, &uart3_DmaDriverState);
01975     }
01976 
01977     static ARM_USART_STATUS UART3_DmaGetStatus(void)
01978     {
01979         return UART_DmaGetStatus(&uart3_DmaDriverState);
01980     }
01981 
01982 #endif
01983 
01984 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
01985 
01986     cmsis_uart_edma_resource_t uart3_EdmaResource = {
01987         RTE_USART3_DMA_TX_DMA_BASE, RTE_USART3_DMA_TX_CH, RTE_USART3_DMA_TX_DMAMUX_BASE, RTE_USART3_DMA_TX_PERI_SEL,
01988 
01989         RTE_USART3_DMA_RX_DMA_BASE, RTE_USART3_DMA_RX_CH, RTE_USART3_DMA_RX_DMAMUX_BASE, RTE_USART3_DMA_RX_PERI_SEL,
01990     };
01991 
01992     uart_edma_handle_t UART3_EdmaHandle;
01993     edma_handle_t UART3_EdmaRxHandle;
01994     edma_handle_t UART3_EdmaTxHandle;
01995 
01996 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
01997     ARMCC_SECTION("uart3_edma_driver_state")
01998     cmsis_uart_edma_driver_state_t uart3_EdmaDriverState =
01999     {
02000 #else
02001     cmsis_uart_edma_driver_state_t uart3_EdmaDriverState = {
02002 #endif
02003         &uart3_Resource,
02004         &uart3_EdmaResource,
02005         &UART3_EdmaHandle,
02006         &UART3_EdmaRxHandle,
02007         &UART3_EdmaTxHandle,
02008     };
02009 
02010     static int32_t UART3_EdmaInitialize(ARM_USART_SignalEvent_t cb_event)
02011     {
02012         UART3_InitPins();
02013         return UART_EdmaInitialize(cb_event, &uart3_EdmaDriverState);
02014     }
02015 
02016     static int32_t UART3_EdmaUninitialize(void)
02017     {
02018         UART3_DeinitPins();
02019         return UART_EdmaUninitialize(&uart3_EdmaDriverState);
02020     }
02021 
02022     static int32_t UART3_EdmaPowerControl(ARM_POWER_STATE state)
02023     {
02024         return UART_EdmaPowerControl(state, &uart3_EdmaDriverState);
02025     }
02026 
02027     static int32_t UART3_EdmaSend(const void *data, uint32_t num)
02028     {
02029         return UART_EdmaSend(data, num, &uart3_EdmaDriverState);
02030     }
02031 
02032     static int32_t UART3_EdmaReceive(void *data, uint32_t num)
02033     {
02034         return UART_EdmaReceive(data, num, &uart3_EdmaDriverState);
02035     }
02036 
02037     static int32_t UART3_EdmaTransfer(const void *data_out, void *data_in, uint32_t num)
02038     {
02039         return UART_EdmaTransfer(data_out, data_in, num, &uart3_EdmaDriverState);
02040     }
02041 
02042     static uint32_t UART3_EdmaGetTxCount(void)
02043     {
02044         return UART_EdmaGetTxCount(&uart3_EdmaDriverState);
02045     }
02046 
02047     static uint32_t UART3_EdmaGetRxCount(void)
02048     {
02049         return UART_EdmaGetRxCount(&uart3_EdmaDriverState);
02050     }
02051 
02052     static int32_t UART3_EdmaControl(uint32_t control, uint32_t arg)
02053     {
02054         return UART_EdmaControl(control, arg, &uart3_EdmaDriverState);
02055     }
02056 
02057     static ARM_USART_STATUS UART3_EdmaGetStatus(void)
02058     {
02059         return UART_EdmaGetStatus(&uart3_EdmaDriverState);
02060     }
02061 
02062 #endif
02063 
02064 #else
02065 
02066 uart_handle_t UART3_Handle;
02067 
02068 #if defined(USART3_RX_BUFFER_ENABLE) && (USART3_RX_BUFFER_ENABLE == 1)
02069 static uint8_t uart3_rxRingBuffer[USART_RX_BUFFER_LEN];
02070 #endif
02071 
02072 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
02073 ARMCC_SECTION("uart3_non_blocking_driver_state")
02074 cmsis_uart_interrupt_driver_state_t uart3_NonBlockingDriverState =
02075 {
02076 #else
02077 cmsis_uart_interrupt_driver_state_t uart3_NonBlockingDriverState = {
02078 #endif
02079     &uart3_Resource,
02080     &UART3_Handle,
02081 };
02082 
02083 static int32_t UART3_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
02084 {
02085     UART3_InitPins();
02086     return UART_NonBlockingInitialize(cb_event, &uart3_NonBlockingDriverState);
02087 }
02088 
02089 static int32_t UART3_NonBlockingUninitialize(void)
02090 {
02091     UART3_DeinitPins();
02092     return UART_NonBlockingUninitialize(&uart3_NonBlockingDriverState);
02093 }
02094 
02095 static int32_t UART3_NonBlockingPowerControl(ARM_POWER_STATE state)
02096 {
02097     uint32_t result;
02098 
02099     result = UART_NonBlockingPowerControl(state, &uart3_NonBlockingDriverState);
02100 #if defined(USART3_RX_BUFFER_ENABLE) && (USART3_RX_BUFFER_ENABLE == 1)
02101     if ((state == ARM_POWER_FULL) && (uart3_NonBlockingDriverState.handle->rxRingBuffer == NULL))
02102     {
02103         UART_TransferStartRingBuffer(uart3_NonBlockingDriverState.resource->base, uart3_NonBlockingDriverState.handle,
02104                                      uart3_rxRingBuffer, USART_RX_BUFFER_LEN);
02105     }
02106 #endif
02107 
02108     return result;
02109 }
02110 
02111 static int32_t UART3_NonBlockingSend(const void *data, uint32_t num)
02112 {
02113     return UART_NonBlockingSend(data, num, &uart3_NonBlockingDriverState);
02114 }
02115 
02116 static int32_t UART3_NonBlockingReceive(void *data, uint32_t num)
02117 {
02118     return UART_NonBlockingReceive(data, num, &uart3_NonBlockingDriverState);
02119 }
02120 
02121 static int32_t UART3_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
02122 {
02123     return UART_NonBlockingTransfer(data_out, data_in, num, &uart3_NonBlockingDriverState);
02124 }
02125 
02126 static uint32_t UART3_NonBlockingGetTxCount(void)
02127 {
02128     return UART_NonBlockingGetTxCount(&uart3_NonBlockingDriverState);
02129 }
02130 
02131 static uint32_t UART3_NonBlockingGetRxCount(void)
02132 {
02133     return UART_NonBlockingGetRxCount(&uart3_NonBlockingDriverState);
02134 }
02135 
02136 static int32_t UART3_NonBlockingControl(uint32_t control, uint32_t arg)
02137 {
02138     int32_t result;
02139 
02140     result = UART_NonBlockingControl(control, arg, &uart3_NonBlockingDriverState);
02141     if (ARM_DRIVER_OK != result)
02142     {
02143         return result;
02144     }
02145     if (uart3_NonBlockingDriverState.handle->rxRingBuffer != NULL)
02146     {
02147         /* Enable the interrupt to accept the data when user need the ring buffer. */
02148         UART_EnableInterrupts(uart3_NonBlockingDriverState.resource->base, kUART_RxDataRegFullInterruptEnable  |
02149                                                                                kUART_RxOverrunInterruptEnable  |
02150                                                                                kUART_FramingErrorInterruptEnable );
02151         /* Enable parity error interrupt when parity mode is enable*/
02152         if (UART_C1_PE_MASK & uart3_NonBlockingDriverState.resource->base->C1)
02153         {
02154             UART_EnableInterrupts(uart3_NonBlockingDriverState.resource->base, kUART_ParityErrorInterruptEnable );
02155         }
02156     }
02157     return ARM_DRIVER_OK;
02158 }
02159 
02160 static ARM_USART_STATUS UART3_NonBlockingGetStatus(void)
02161 {
02162     return UART_NonBlockingGetStatus(&uart3_NonBlockingDriverState);
02163 }
02164 
02165 #endif
02166 
02167     ARM_DRIVER_USART Driver_USART3 =
02168     {
02169         UARTx_GetVersion,
02170         UARTx_GetCapabilities,
02171 #if RTE_USART3_DMA_EN
02172 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
02173         UART3_EdmaInitialize,
02174         UART3_EdmaUninitialize,
02175         UART3_EdmaPowerControl,
02176         UART3_EdmaSend,
02177         UART3_EdmaReceive,
02178         UART3_EdmaTransfer,
02179         UART3_EdmaGetTxCount,
02180         UART3_EdmaGetRxCount,
02181         UART3_EdmaControl,
02182         UART3_EdmaGetStatus,
02183 #else
02184     UART3_DmaInitialize,
02185     UART3_DmaUninitialize,
02186     UART3_DmaPowerControl,
02187     UART3_DmaSend,
02188     UART3_DmaReceive,
02189     UART3_DmaTransfer,
02190     UART3_DmaGetTxCount,
02191     UART3_DmaGetRxCount,
02192     UART3_DmaControl,
02193     UART3_DmaGetStatus,
02194 #endif
02195 #else
02196     UART3_NonBlockingInitialize,
02197     UART3_NonBlockingUninitialize,
02198     UART3_NonBlockingPowerControl,
02199     UART3_NonBlockingSend,
02200     UART3_NonBlockingReceive,
02201     UART3_NonBlockingTransfer,
02202     UART3_NonBlockingGetTxCount,
02203     UART3_NonBlockingGetRxCount,
02204     UART3_NonBlockingControl,
02205     UART3_NonBlockingGetStatus,
02206 #endif
02207         UARTx_SetModemControl,
02208         UARTx_GetModemStatus
02209     };
02210 
02211 #endif /* uart3 */
02212 
02213 #if defined(UART4) && RTE_USART4
02214 
02215     extern uint32_t UART4_GetFreq(void);
02216     extern void UART4_InitPins(void);
02217     extern void UART4_DeinitPins(void);
02218 
02219     cmsis_uart_resource_t uart4_Resource = {UART4, UART4_GetFreq};
02220 
02221 #if RTE_USART4_DMA_EN
02222 
02223 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
02224 
02225     cmsis_uart_dma_resource_t uart4_DmaResource = {
02226         RTE_USART4_DMA_TX_DMA_BASE, RTE_USART4_DMA_TX_CH, RTE_USART4_DMA_TX_DMAMUX_BASE, RTE_USART4_DMA_TX_PERI_SEL,
02227 
02228         RTE_USART4_DMA_RX_DMA_BASE, RTE_USART4_DMA_RX_CH, RTE_USART4_DMA_RX_DMAMUX_BASE, RTE_USART4_DMA_RX_PERI_SEL,
02229     };
02230 
02231     uart_dma_handle_t UART4_DmaHandle;
02232     dma_handle_t UART4_DmaRxHandle;
02233     dma_handle_t UART4_DmaTxHandle;
02234 
02235 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
02236     ARMCC_SECTION("uart4_dma_driver_state")
02237     cmsis_uart_dma_driver_state_t uart4_DmaDriverState =
02238     {
02239 #else
02240     cmsis_uart_dma_driver_state_t uart4_DmaDriverState = {
02241 #endif
02242         &uart4_Resource,
02243         &uart4_DmaResource,
02244         &UART4_DmaHandle,
02245         &UART4_DmaRxHandle,
02246         &UART4_DmaTxHandle,
02247     };
02248 
02249     static int32_t UART4_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
02250     {
02251         UART4_InitPins();
02252         return UART_DmaInitialize(cb_event, &uart4_DmaDriverState);
02253     }
02254 
02255     static int32_t UART4_DmaUninitialize(void)
02256     {
02257         UART4_DeinitPins();
02258         return UART_DmaUninitialize(&uart4_DmaDriverState);
02259     }
02260 
02261     static int32_t UART4_DmaPowerControl(ARM_POWER_STATE state)
02262     {
02263         return UART_DmaPowerControl(state, &uart4_DmaDriverState);
02264     }
02265 
02266     static int32_t UART4_DmaSend(const void *data, uint32_t num)
02267     {
02268         return UART_DmaSend(data, num, &uart4_DmaDriverState);
02269     }
02270 
02271     static int32_t UART4_DmaReceive(void *data, uint32_t num)
02272     {
02273         return UART_DmaReceive(data, num, &uart4_DmaDriverState);
02274     }
02275 
02276     static int32_t UART4_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
02277     {
02278         return UART_DmaTransfer(data_out, data_in, num, &uart4_DmaDriverState);
02279     }
02280 
02281     static uint32_t UART4_DmaGetTxCount(void)
02282     {
02283         return UART_DmaGetTxCount(&uart4_DmaDriverState);
02284     }
02285 
02286     static uint32_t UART4_DmaGetRxCount(void)
02287     {
02288         return UART_DmaGetRxCount(&uart4_DmaDriverState);
02289     }
02290 
02291     static int32_t UART4_DmaControl(uint32_t control, uint32_t arg)
02292     {
02293         return UART_DmaControl(control, arg, &uart4_DmaDriverState);
02294     }
02295 
02296     static ARM_USART_STATUS UART4_DmaGetStatus(void)
02297     {
02298         return UART_DmaGetStatus(&uart4_DmaDriverState);
02299     }
02300 
02301 #endif
02302 
02303 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
02304 
02305     cmsis_uart_edma_resource_t uart4_EdmaResource = {
02306         RTE_USART4_DMA_TX_DMA_BASE, RTE_USART4_DMA_TX_CH, RTE_USART4_DMA_TX_DMAMUX_BASE, RTE_USART4_DMA_TX_PERI_SEL,
02307 
02308         RTE_USART4_DMA_RX_DMA_BASE, RTE_USART4_DMA_RX_CH, RTE_USART4_DMA_RX_DMAMUX_BASE, RTE_USART4_DMA_RX_PERI_SEL,
02309     };
02310 
02311     uart_edma_handle_t UART4_EdmaHandle;
02312     edma_handle_t UART4_EdmaRxHandle;
02313     edma_handle_t UART4_EdmaTxHandle;
02314 
02315 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
02316     ARMCC_SECTION("uart4_edma_driver_state")
02317     cmsis_uart_edma_driver_state_t uart4_EdmaDriverState =
02318     {
02319 #else
02320     cmsis_uart_edma_driver_state_t uart4_EdmaDriverState = {
02321 #endif
02322         &uart4_Resource,
02323         &uart4_EdmaResource,
02324         &UART4_EdmaHandle,
02325         &UART4_EdmaRxHandle,
02326         &UART4_EdmaTxHandle,
02327     };
02328 
02329     static int32_t UART4_EdmaInitialize(ARM_USART_SignalEvent_t cb_event)
02330     {
02331         UART4_InitPins();
02332         return UART_EdmaInitialize(cb_event, &uart4_EdmaDriverState);
02333     }
02334 
02335     static int32_t UART4_EdmaUninitialize(void)
02336     {
02337         UART4_DeinitPins();
02338         return UART_EdmaUninitialize(&uart4_EdmaDriverState);
02339     }
02340 
02341     static int32_t UART4_EdmaPowerControl(ARM_POWER_STATE state)
02342     {
02343         return UART_EdmaPowerControl(state, &uart4_EdmaDriverState);
02344     }
02345 
02346     static int32_t UART4_EdmaSend(const void *data, uint32_t num)
02347     {
02348         return UART_EdmaSend(data, num, &uart4_EdmaDriverState);
02349     }
02350 
02351     static int32_t UART4_EdmaReceive(void *data, uint32_t num)
02352     {
02353         return UART_EdmaReceive(data, num, &uart4_EdmaDriverState);
02354     }
02355 
02356     static int32_t UART4_EdmaTransfer(const void *data_out, void *data_in, uint32_t num)
02357     {
02358         return UART_EdmaTransfer(data_out, data_in, num, &uart4_EdmaDriverState);
02359     }
02360 
02361     static uint32_t UART4_EdmaGetTxCount(void)
02362     {
02363         return UART_EdmaGetTxCount(&uart4_EdmaDriverState);
02364     }
02365 
02366     static uint32_t UART4_EdmaGetRxCount(void)
02367     {
02368         return UART_EdmaGetRxCount(&uart4_EdmaDriverState);
02369     }
02370 
02371     static int32_t UART4_EdmaControl(uint32_t control, uint32_t arg)
02372     {
02373         return UART_EdmaControl(control, arg, &uart4_EdmaDriverState);
02374     }
02375 
02376     static ARM_USART_STATUS UART4_EdmaGetStatus(void)
02377     {
02378         return UART_EdmaGetStatus(&uart4_EdmaDriverState);
02379     }
02380 
02381 #endif
02382 
02383 #else
02384 
02385 uart_handle_t UART4_Handle;
02386 
02387 #if defined(USART4_RX_BUFFER_ENABLE) && (USART4_RX_BUFFER_ENABLE == 1)
02388 static uint8_t uart4_rxRingBuffer[USART_RX_BUFFER_LEN];
02389 #endif
02390 
02391 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
02392 ARMCC_SECTION("uart4_non_blocking_driver_state")
02393 cmsis_uart_interrupt_driver_state_t uart4_NonBlockingDriverState =
02394 {
02395 #else
02396 cmsis_uart_interrupt_driver_state_t uart4_NonBlockingDriverState = {
02397 #endif
02398     &uart4_Resource,
02399     &UART4_Handle,
02400 };
02401 
02402 static int32_t UART4_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
02403 {
02404     UART4_InitPins();
02405     return UART_NonBlockingInitialize(cb_event, &uart4_NonBlockingDriverState);
02406 }
02407 
02408 static int32_t UART4_NonBlockingUninitialize(void)
02409 {
02410     UART4_DeinitPins();
02411     return UART_NonBlockingUninitialize(&uart4_NonBlockingDriverState);
02412 }
02413 
02414 static int32_t UART4_NonBlockingPowerControl(ARM_POWER_STATE state)
02415 {
02416     uint32_t result;
02417 
02418     result = UART_NonBlockingPowerControl(state, &uart4_NonBlockingDriverState);
02419 #if defined(USART4_RX_BUFFER_ENABLE) && (USART4_RX_BUFFER_ENABLE == 1)
02420     if ((state == ARM_POWER_FULL) && (uart4_NonBlockingDriverState.handle->rxRingBuffer == NULL))
02421     {
02422         UART_TransferStartRingBuffer(uart4_NonBlockingDriverState.resource->base, uart4_NonBlockingDriverState.handle,
02423                                      uart4_rxRingBuffer, USART_RX_BUFFER_LEN);
02424     }
02425 #endif
02426 
02427     return result;
02428 }
02429 
02430 static int32_t UART4_NonBlockingSend(const void *data, uint32_t num)
02431 {
02432     return UART_NonBlockingSend(data, num, &uart4_NonBlockingDriverState);
02433 }
02434 
02435 static int32_t UART4_NonBlockingReceive(void *data, uint32_t num)
02436 {
02437     return UART_NonBlockingReceive(data, num, &uart4_NonBlockingDriverState);
02438 }
02439 
02440 static int32_t UART4_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
02441 {
02442     return UART_NonBlockingTransfer(data_out, data_in, num, &uart4_NonBlockingDriverState);
02443 }
02444 
02445 static uint32_t UART4_NonBlockingGetTxCount(void)
02446 {
02447     return UART_NonBlockingGetTxCount(&uart4_NonBlockingDriverState);
02448 }
02449 
02450 static uint32_t UART4_NonBlockingGetRxCount(void)
02451 {
02452     return UART_NonBlockingGetRxCount(&uart4_NonBlockingDriverState);
02453 }
02454 
02455 static int32_t UART4_NonBlockingControl(uint32_t control, uint32_t arg)
02456 {
02457     int32_t result;
02458 
02459     result = UART_NonBlockingControl(control, arg, &uart4_NonBlockingDriverState);
02460     if (ARM_DRIVER_OK != result)
02461     {
02462         return result;
02463     }
02464     if (uart4_NonBlockingDriverState.handle->rxRingBuffer != NULL)
02465     {
02466         /* Enable the interrupt to accept the data when user need the ring buffer. */
02467         UART_EnableInterrupts(uart4_NonBlockingDriverState.resource->base, kUART_RxDataRegFullInterruptEnable  |
02468                                                                                kUART_RxOverrunInterruptEnable  |
02469                                                                                kUART_FramingErrorInterruptEnable );
02470         /* Enable parity error interrupt when parity mode is enable*/
02471         if (UART_C1_PE_MASK & uart4_NonBlockingDriverState.resource->base->C1)
02472         {
02473             UART_EnableInterrupts(uart4_NonBlockingDriverState.resource->base, kUART_ParityErrorInterruptEnable );
02474         }
02475     }
02476     return ARM_DRIVER_OK;
02477 }
02478 
02479 static ARM_USART_STATUS UART4_NonBlockingGetStatus(void)
02480 {
02481     return UART_NonBlockingGetStatus(&uart4_NonBlockingDriverState);
02482 }
02483 
02484 #endif
02485 
02486     ARM_DRIVER_USART Driver_USART4 =
02487     {
02488         UARTx_GetVersion,
02489         UARTx_GetCapabilities,
02490 #if RTE_USART4_DMA_EN
02491 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
02492         UART4_EdmaInitialize,
02493         UART4_EdmaUninitialize,
02494         UART4_EdmaPowerControl,
02495         UART4_EdmaSend,
02496         UART4_EdmaReceive,
02497         UART4_EdmaTransfer,
02498         UART4_EdmaGetTxCount,
02499         UART4_EdmaGetRxCount,
02500         UART4_EdmaControl,
02501         UART4_EdmaGetStatus,
02502 #else
02503     UART4_DmaInitialize,
02504     UART4_DmaUninitialize,
02505     UART4_DmaPowerControl,
02506     UART4_DmaSend,
02507     UART4_DmaReceive,
02508     UART4_DmaTransfer,
02509     UART4_DmaGetTxCount,
02510     UART4_DmaGetRxCount,
02511     UART4_DmaControl,
02512     UART4_DmaGetStatus,
02513 #endif
02514 #else
02515     UART4_NonBlockingInitialize,
02516     UART4_NonBlockingUninitialize,
02517     UART4_NonBlockingPowerControl,
02518     UART4_NonBlockingSend,
02519     UART4_NonBlockingReceive,
02520     UART4_NonBlockingTransfer,
02521     UART4_NonBlockingGetTxCount,
02522     UART4_NonBlockingGetRxCount,
02523     UART4_NonBlockingControl,
02524     UART4_NonBlockingGetStatus,
02525 #endif
02526         UARTx_SetModemControl,
02527         UARTx_GetModemStatus
02528     };
02529 
02530 #endif /* uart4 */
02531 
02532 #if defined(UART5) && RTE_USART5
02533 
02534     extern uint32_t UART5_GetFreq(void);
02535     extern void UART5_InitPins(void);
02536     extern void UART5_DeinitPins(void);
02537 
02538     cmsis_uart_resource_t uart5_Resource = {UART5, UART5_GetFreq};
02539 
02540 #if RTE_USART5_DMA_EN
02541 
02542 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
02543 
02544     cmsis_uart_dma_resource_t uart5_DmaResource = {
02545         RTE_USART5_DMA_TX_DMA_BASE, RTE_USART5_DMA_TX_CH, RTE_USART5_DMA_TX_DMAMUX_BASE, RTE_USART5_DMA_TX_PERI_SEL,
02546 
02547         RTE_USART5_DMA_RX_DMA_BASE, RTE_USART5_DMA_RX_CH, RTE_USART5_DMA_RX_DMAMUX_BASE, RTE_USART5_DMA_RX_PERI_SEL,
02548     };
02549 
02550     uart_dma_handle_t UART5_DmaHandle;
02551     dma_handle_t UART5_DmaRxHandle;
02552     dma_handle_t UART5_DmaTxHandle;
02553 
02554 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
02555     ARMCC_SECTION("uart5_dma_driver_state")
02556     cmsis_uart_dma_driver_state_t uart5_DmaDriverState =
02557     {
02558 #else
02559     cmsis_uart_dma_driver_state_t uart5_DmaDriverState = {
02560 #endif
02561         &uart5_Resource,
02562         &uart5_DmaResource,
02563         &UART5_DmaHandle,
02564         &UART5_DmaRxHandle,
02565         UART5_DmaTxHandle,
02566     };
02567 
02568     static int32_t UART5_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
02569     {
02570         UART5_InitPins();
02571         return UART_DmaInitialize(cb_event, &uart5_DmaDriverState);
02572     }
02573 
02574     static int32_t UART5_DmaUninitialize(void)
02575     {
02576         UART5_DeinitPins();
02577         return UART_DmaUninitialize(&uart5_DmaDriverState);
02578     }
02579 
02580     static int32_t UART5_DmaPowerControl(ARM_POWER_STATE state)
02581     {
02582         return UART_DmaPowerControl(state, &uart5_DmaDriverState);
02583     }
02584 
02585     static int32_t UART5_DmaSend(const void *data, uint32_t num)
02586     {
02587         return UART_DmaSend(data, num, &uart5_DmaDriverState);
02588     }
02589 
02590     static int32_t UART5_DmaReceive(void *data, uint32_t num)
02591     {
02592         return UART_DmaReceive(data, num, &uart5_DmaDriverState);
02593     }
02594 
02595     static int32_t UART5_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
02596     {
02597         return UART_DmaTransfer(data_out, data_in, num, &uart5_DmaDriverState);
02598     }
02599 
02600     static uint32_t UART5_DmaGetTxCount(void)
02601     {
02602         return UART_DmaGetTxCount(&uart5_DmaDriverState);
02603     }
02604 
02605     static uint32_t UART5_DmaGetRxCount(void)
02606     {
02607         return UART_DmaGetRxCount(&uart5_DmaDriverState);
02608     }
02609 
02610     static int32_t UART5_DmaControl(uint32_t control, uint32_t arg)
02611     {
02612         return UART_DmaControl(control, arg, &uart5_DmaDriverState);
02613     }
02614 
02615     static ARM_USART_STATUS UART5_DmaGetStatus(void)
02616     {
02617         return UART_DmaGetStatus(&uart5_DmaDriverState);
02618     }
02619 
02620 #endif
02621 
02622 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
02623 
02624     cmsis_uart_edma_resource_t uart5_EdmaResource = {
02625         RTE_USART5_DMA_TX_DMA_BASE, RTE_USART5_DMA_TX_CH, RTE_USART5_DMA_TX_DMAMUX_BASE, RTE_USART5_DMA_TX_PERI_SEL,
02626 
02627         RTE_USART5_DMA_RX_DMA_BASE, RTE_USART5_DMA_RX_CH, RTE_USART5_DMA_RX_DMAMUX_BASE, RTE_USART5_DMA_RX_PERI_SEL,
02628     };
02629 
02630     uart_edma_handle_t UART5_EdmaHandle;
02631     edma_handle_t UART5_EdmaRxHandle;
02632     edma_handle_t UART5_EdmaTxHandle;
02633 
02634 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
02635     ARMCC_SECTION("uart5_edma_driver_state")
02636     cmsis_uart_edma_driver_state_t uart5_EdmaDriverState =
02637     {
02638 #else
02639     cmsis_uart_edma_driver_state_t uart5_EdmaDriverState = {
02640 #endif
02641         &uart5_Resource,
02642         &uart5_EdmaResource,
02643         &UART5_EdmaHandle,
02644         &UART5_EdmaRxHandle,
02645         &UART5_EdmaTxHandle,
02646     };
02647 
02648     static int32_t UART5_EdmaInitialize(ARM_USART_SignalEvent_t cb_event)
02649     {
02650         UART5_InitPins();
02651         return UART_EdmaInitialize(cb_event, &uart5_EdmaDriverState);
02652     }
02653 
02654     static int32_t UART5_EdmaUninitialize(void)
02655     {
02656         UART5_DeinitPins();
02657         return UART_EdmaUninitialize(&uart5_EdmaDriverState);
02658     }
02659 
02660     static int32_t UART5_EdmaPowerControl(ARM_POWER_STATE state)
02661     {
02662         return UART_EdmaPowerControl(state, &uart5_EdmaDriverState);
02663     }
02664 
02665     static int32_t UART5_EdmaSend(const void *data, uint32_t num)
02666     {
02667         return UART_EdmaSend(data, num, &uart5_EdmaDriverState);
02668     }
02669 
02670     static int32_t UART5_EdmaReceive(void *data, uint32_t num)
02671     {
02672         return UART_EdmaReceive(data, num, &uart5_EdmaDriverState);
02673     }
02674 
02675     static int32_t UART5_EdmaTransfer(const void *data_out, void *data_in, uint32_t num)
02676     {
02677         return UART_EdmaTransfer(data_out, data_in, num, &uart5_EdmaDriverState);
02678     }
02679 
02680     static uint32_t UART5_EdmaGetTxCount(void)
02681     {
02682         return UART_EdmaGetTxCount(&uart5_EdmaDriverState);
02683     }
02684 
02685     static uint32_t UART5_EdmaGetRxCount(void)
02686     {
02687         return UART_EdmaGetRxCount(&uart5_EdmaDriverState);
02688     }
02689 
02690     static int32_t UART5_EdmaControl(uint32_t control, uint32_t arg)
02691     {
02692         return UART_EdmaControl(control, arg, &uart5_EdmaDriverState);
02693     }
02694 
02695     static ARM_USART_STATUS UART5_EdmaGetStatus(void)
02696     {
02697         return UART_EdmaGetStatus(&uart5_EdmaDriverState);
02698     }
02699 
02700 #endif
02701 
02702 #else
02703 
02704 uart_handle_t UART5_Handle;
02705 
02706 #if defined(USART5_RX_BUFFER_ENABLE) && (USART5_RX_BUFFER_ENABLE == 1)
02707 static uint8_t uart5_rxRingBuffer[USART_RX_BUFFER_LEN];
02708 #endif
02709 
02710 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
02711 ARMCC_SECTION("uart5_non_blocking_driver_state")
02712 cmsis_uart_interrupt_driver_state_t uart5_NonBlockingDriverState =
02713 {
02714 #else
02715 cmsis_uart_interrupt_driver_state_t uart5_NonBlockingDriverState = {
02716 #endif
02717     &uart5_Resource,
02718     &UART5_Handle,
02719 };
02720 
02721 static int32_t UART5_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
02722 {
02723     UART5_InitPins();
02724     return UART_NonBlockingInitialize(cb_event, &uart5_NonBlockingDriverState);
02725 }
02726 
02727 static int32_t UART5_NonBlockingUninitialize(void)
02728 {
02729     UART5_DeinitPins();
02730     return UART_NonBlockingUninitialize(&uart5_NonBlockingDriverState);
02731 }
02732 
02733 static int32_t UART5_NonBlockingPowerControl(ARM_POWER_STATE state)
02734 {
02735     uint32_t result;
02736 
02737     result = UART_NonBlockingPowerControl(state, &uart5_NonBlockingDriverState);
02738 #if defined(USART5_RX_BUFFER_ENABLE) && (USART5_RX_BUFFER_ENABLE == 1)
02739     if ((state == ARM_POWER_FULL) && (uart5_NonBlockingDriverState.handle->rxRingBuffer == NULL))
02740     {
02741         UART_TransferStartRingBuffer(uart5_NonBlockingDriverState.resource->base, uart5_NonBlockingDriverState.handle,
02742                                      uart5_rxRingBuffer, USART_RX_BUFFER_LEN);
02743     }
02744 #endif
02745 
02746     return result;
02747 }
02748 
02749 static int32_t UART5_NonBlockingSend(const void *data, uint32_t num)
02750 {
02751     return UART_NonBlockingSend(data, num, &uart5_NonBlockingDriverState);
02752 }
02753 
02754 static int32_t UART5_NonBlockingReceive(void *data, uint32_t num)
02755 {
02756     return UART_NonBlockingReceive(data, num, &uart5_NonBlockingDriverState);
02757 }
02758 
02759 static int32_t UART5_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
02760 {
02761     return UART_NonBlockingTransfer(data_out, data_in, num, &uart5_NonBlockingDriverState);
02762 }
02763 
02764 static uint32_t UART5_NonBlockingGetTxCount(void)
02765 {
02766     return UART_NonBlockingGetTxCount(&uart5_NonBlockingDriverState);
02767 }
02768 
02769 static uint32_t UART5_NonBlockingGetRxCount(void)
02770 {
02771     return UART_NonBlockingGetRxCount(&uart5_NonBlockingDriverState);
02772 }
02773 
02774 static int32_t UART5_NonBlockingControl(uint32_t control, uint32_t arg)
02775 {
02776     int32_t result;
02777 
02778     result = UART_NonBlockingControl(control, arg, &uart5_NonBlockingDriverState);
02779     if (ARM_DRIVER_OK != result)
02780     {
02781         return result;
02782     }
02783     if (uart5_NonBlockingDriverState.handle->rxRingBuffer != NULL)
02784     {
02785         /* Enable the interrupt to accept the data when user need the ring buffer. */
02786         UART_EnableInterrupts(uart5_NonBlockingDriverState.resource->base, kUART_RxDataRegFullInterruptEnable  |
02787                                                                                kUART_RxOverrunInterruptEnable  |
02788                                                                                kUART_FramingErrorInterruptEnable );
02789         /* Enable parity error interrupt when parity mode is enable*/
02790         if (UART_C1_PE_MASK & uart5_NonBlockingDriverState.resource->base->C1)
02791         {
02792             UART_EnableInterrupts(uart5_NonBlockingDriverState.resource->base, kUART_ParityErrorInterruptEnable );
02793         }
02794     }
02795     return ARM_DRIVER_OK;
02796 }
02797 
02798 static ARM_USART_STATUS UART5_NonBlockingGetStatus(void)
02799 {
02800     return UART_NonBlockingGetStatus(&uart5_NonBlockingDriverState);
02801 }
02802 
02803 #endif
02804 
02805     ARM_DRIVER_USART Driver_USART5 =
02806     {
02807         UARTx_GetVersion,
02808         UARTx_GetCapabilities,
02809 #if RTE_USART5_DMA_EN
02810 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
02811         UART5_EdmaInitialize,
02812         UART5_EdmaUninitialize,
02813         UART5_EdmaPowerControl,
02814         UART5_EdmaSend,
02815         UART5_EdmaReceive,
02816         UART5_EdmaTransfer,
02817         UART5_EdmaGetTxCount,
02818         UART5_EdmaGetRxCount,
02819         UART5_EdmaControl,
02820         UART5_EdmaGetStatus,
02821 #else
02822     UART5_DmaInitialize,
02823     UART5_DmaUninitialize,
02824     UART5_DmaPowerControl,
02825     UART5_DmaSend,
02826     UART5_DmaReceive,
02827     UART5_DmaTransfer,
02828     UART5_DmaGetTxCount,
02829     UART5_DmaGetRxCount,
02830     UART5_DmaControl,
02831     UART5_DmaGetStatus,
02832 #endif
02833 #else
02834     UART5_NonBlockingInitialize,
02835     UART5_NonBlockingUninitialize,
02836     UART5_NonBlockingPowerControl,
02837     UART5_NonBlockingSend,
02838     UART5_NonBlockingReceive,
02839     UART5_NonBlockingTransfer,
02840     UART5_NonBlockingGetTxCount,
02841     UART5_NonBlockingGetRxCount,
02842     UART5_NonBlockingControl,
02843     UART5_NonBlockingGetStatus,
02844 #endif
02845         UARTx_SetModemControl,
02846         UARTx_GetModemStatus
02847     };
02848 
02849 #endif /* uart5 */