gpio.c

00001 /**
00002  * @file    gpio.c
00003  * @brief
00004  *
00005  * DAPLink Interface Firmware
00006  * Copyright (c) 2009-2016, ARM Limited, All Rights Reserved
00007  * SPDX-License-Identifier: Apache-2.0
00008  *
00009  * Licensed under the Apache License, Version 2.0 (the "License"); you may
00010  * not use this file except in compliance with the License.
00011  * You may obtain a copy of the License at
00012  *
00013  * http://www.apache.org/licenses/LICENSE-2.0
00014  *
00015  * Unless required by applicable law or agreed to in writing, software
00016  * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
00017  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00018  * See the License for the specific language governing permissions and
00019  * limitations under the License.
00020  */
00021 
00022 #include "MK20D5.h"
00023 #include "DAP_config.h"
00024 #include "gpio.h"
00025 #include "daplink.h"
00026 
00027 static void busy_wait(uint32_t cycles)
00028 {
00029     volatile uint32_t i;
00030     i = cycles;
00031 
00032     while (i > 0) {
00033         i--;
00034     }
00035 }
00036 
00037 void gpio_init(void)
00038 {
00039     // Enable hardfault on unaligned access for the interface only.
00040     // If this is done in the bootloader than then it might (will) break
00041     // older application firmware or firmware from 3rd party vendors.
00042 #if  defined(DAPLINK_IF)
00043     SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
00044 #endif
00045     // enable clock to ports
00046     SIM->SCGC5 |= SIM_SCGC5_PORTD_MASK | SIM_SCGC5_PORTB_MASK;
00047     // configure pin as GPIO
00048     LED_CONNECTED_PORT->PCR[LED_CONNECTED_BIT] = PORT_PCR_MUX(1);
00049     // led off - enable output
00050     LED_CONNECTED_GPIO->PDOR = 1UL << LED_CONNECTED_BIT;
00051     LED_CONNECTED_GPIO->PDDR = 1UL << LED_CONNECTED_BIT;
00052     // led on
00053     LED_CONNECTED_GPIO->PCOR = 1UL << LED_CONNECTED_BIT;
00054     // reset button configured as gpio input
00055     PIN_nRESET_GPIO->PDDR &= ~PIN_nRESET;
00056     PIN_nRESET_PORT->PCR[PIN_nRESET_BIT] = PORT_PCR_MUX(1);
00057 
00058     // configure pin as GPIO
00059     PIN_POWER_EN_PORT->PCR[PIN_POWER_EN_BIT] = PORT_PCR_MUX(1);
00060     // set output to 0
00061     PIN_POWER_EN_GPIO->PCOR = PIN_POWER_EN;
00062     // switch gpio to output
00063     PIN_POWER_EN_GPIO->PDDR |= PIN_POWER_EN;
00064 
00065     // Let the voltage rails stabilize.  This is especailly important
00066     // during software resets, since the target's 3.3v rail can take
00067     // 20-50ms to drain.  During this time the target could be driving
00068     // the reset pin low, causing the bootloader to think the reset
00069     // button is pressed.
00070     // Note: With optimization set to -O2 the value 1000000 delays for ~85ms
00071     busy_wait(1000000);
00072 }
00073 
00074 void gpio_set_board_power(bool powerEnabled)
00075 {
00076     if (powerEnabled) {
00077         // enable power switch
00078         PIN_POWER_EN_GPIO->PSOR = PIN_POWER_EN;
00079     }
00080     else {
00081         // disable power switch
00082         PIN_POWER_EN_GPIO->PCOR = PIN_POWER_EN;
00083     }
00084 }
00085 
00086 void gpio_set_hid_led(gpio_led_state_t state)
00087 {
00088     if (state) {
00089         LED_CONNECTED_GPIO->PCOR = 1UL << LED_CONNECTED_BIT; // LED on
00090     } else {
00091         LED_CONNECTED_GPIO->PSOR = 1UL << LED_CONNECTED_BIT; // LED off
00092     }
00093 }
00094 
00095 void gpio_set_cdc_led(gpio_led_state_t state)
00096 {
00097     gpio_set_hid_led(state);
00098 }
00099 
00100 void gpio_set_msc_led(gpio_led_state_t state)
00101 {
00102     gpio_set_hid_led(state);
00103 }
00104 
00105 uint8_t gpio_get_reset_btn_no_fwrd(void)
00106 {
00107     return (PIN_nRESET_GPIO->PDIR & PIN_nRESET) ? 0 : 1;
00108 
00109 }
00110 
00111 uint8_t gpio_get_reset_btn_fwrd(void)
00112 {
00113     return 0;
00114 }