IO_Config.h

00001 /**
00002  * @file    IO_Config.h
00003  * @brief   
00004  *
00005  * DAPLink Interface Firmware
00006  * Copyright (c) 2009-2016, ARM Limited, All Rights Reserved
00007  * SPDX-License-Identifier: Apache-2.0
00008  *
00009  * Licensed under the Apache License, Version 2.0 (the "License"); you may
00010  * not use this file except in compliance with the License.
00011  * You may obtain a copy of the License at
00012  *
00013  * http://www.apache.org/licenses/LICENSE-2.0
00014  *
00015  * Unless required by applicable law or agreed to in writing, software
00016  * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
00017  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00018  * See the License for the specific language governing permissions and
00019  * limitations under the License.
00020  */
00021 
00022 #ifndef __IO_CONFIG_H__
00023 #define __IO_CONFIG_H__
00024 
00025 #include "MK20D5.h"
00026 #include "compiler.h"
00027 #include "daplink.h"
00028 
00029 // This GPIO configuration is only valid for the K20DX HIC
00030 COMPILER_ASSERT(DAPLINK_HIC_ID == DAPLINK_HIC_ID_K20DX);
00031 
00032 
00033 // Debug Port I/O Pins
00034 
00035 // SWCLK Pin                    PTC5
00036 #define PIN_SWCLK_PORT          PORTC
00037 #define PIN_SWCLK_GPIO          PTC
00038 #define PIN_SWCLK_BIT           5
00039 
00040 // SWDIO Out Pin                PTC6
00041 #define PIN_SWDIO_OUT_PORT      PORTC
00042 #define PIN_SWDIO_OUT_GPIO      PTC
00043 #define PIN_SWDIO_OUT_BIT       6
00044 
00045 // SWDIO In Pin                 PTC7
00046 #define PIN_SWDIO_IN_PORT       PORTC
00047 #define PIN_SWDIO_IN_GPIO       PTC
00048 #define PIN_SWDIO_IN_BIT        7
00049 
00050 // SWDIO Neg. Output Enable Pin PTB0
00051 #define PIN_SWDIO_NOE_PORT      PORTB
00052 #define PIN_SWDIO_NOE_GPIO      PTB
00053 #define PIN_SWDIO_NOE_BIT       0
00054 
00055 // SWD Neg. Enable Pin          PTA4
00056 #define PIN_SWD_NOE_PORT        PORTA
00057 #define PIN_SWD_NOE_GPIO        PTA
00058 #define PIN_SWD_NOE_BIT         4
00059 
00060 // nRESET Pin                   PTB1
00061 #define PIN_nRESET_PORT         PORTB
00062 #define PIN_nRESET_GPIO         PTB
00063 #define PIN_nRESET_BIT          1
00064 #define PIN_nRESET              (1 << PIN_nRESET_BIT)
00065 
00066 // Power and fault detection
00067 
00068 // PWR_REG_EN PTD2              PTD6
00069 #define PIN_POWER_EN_PORT       PORTD
00070 #define PIN_POWER_EN_GPIO       PTD
00071 #define PIN_POWER_EN_BIT        (6)
00072 #define PIN_POWER_EN            (1<<PIN_POWER_EN_BIT)
00073 
00074 // VTRG_FAULT_B PTD7
00075 #define PIN_VTRG_FAULT_B_PORT   PORTD
00076 #define PIN_VTRG_FAULT_B_GPIO   PTD
00077 #define PIN_VTRG_FAULT_B_BIT    (7)
00078 
00079 // Debug Unit LEDs
00080 
00081 // Connected LED                PTD4
00082 #define LED_CONNECTED_PORT      PORTD
00083 #define LED_CONNECTED_GPIO      PTD
00084 #define LED_CONNECTED_BIT       4
00085 
00086 // Target Running LED           Not available
00087 
00088 // Debug Unit LEDs
00089 
00090 // HID_LED PTD4
00091 #define PIN_HID_LED_PORT        PORTD
00092 #define PIN_HID_LED_GPIO        PTD
00093 #define PIN_HID_LED_BIT         (4)
00094 #define PIN_HID_LED             (1<<PIN_HID_LED_BIT)
00095 
00096 // MSC_LED PTD4
00097 #define PIN_MSC_LED_PORT        PORTD
00098 #define PIN_MSC_LED_GPIO        PTD
00099 #define PIN_MSC_LED_BIT         (4)
00100 #define PIN_MSC_LED             (1<<PIN_HID_LED_BIT)
00101 
00102 // CDC_LED PTD4
00103 #define PIN_CDC_LED_PORT        PORTD
00104 #define PIN_CDC_LED_GPIO        PTD
00105 #define PIN_CDC_LED_BIT         (4)
00106 #define PIN_CDC_LED             (1<<PIN_HID_LED_BIT)
00107 
00108 // SW RESET BUTTON PTB1
00109 #define PIN_SW_RESET_PORT       PORTB
00110 #define PIN_SW_RESET_GPIO       PTB
00111 #define PIN_SW_RESET_BIT        (1)
00112 #define PIN_SW_RESET            (1<<PIN_SW_RESET_BIT)
00113 
00114 #endif