Repostiory containing DAPLink source code with Reset Pin workaround for HANI_IOT board.

Upstream: https://github.com/ARMmbed/DAPLink

Committer:
Pawel Zarembski
Date:
Tue Apr 07 12:55:42 2020 +0200
Revision:
0:01f31e923fe2
hani: DAPLink with reset workaround

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Pawel Zarembski 0:01f31e923fe2 1 /**
Pawel Zarembski 0:01f31e923fe2 2 * @file uart.h
Pawel Zarembski 0:01f31e923fe2 3 * @brief
Pawel Zarembski 0:01f31e923fe2 4 *
Pawel Zarembski 0:01f31e923fe2 5 * DAPLink Interface Firmware
Pawel Zarembski 0:01f31e923fe2 6 * Copyright (c) 2009-2016, ARM Limited, All Rights Reserved
Pawel Zarembski 0:01f31e923fe2 7 * SPDX-License-Identifier: Apache-2.0
Pawel Zarembski 0:01f31e923fe2 8 *
Pawel Zarembski 0:01f31e923fe2 9 * Licensed under the Apache License, Version 2.0 (the "License"); you may
Pawel Zarembski 0:01f31e923fe2 10 * not use this file except in compliance with the License.
Pawel Zarembski 0:01f31e923fe2 11 * You may obtain a copy of the License at
Pawel Zarembski 0:01f31e923fe2 12 *
Pawel Zarembski 0:01f31e923fe2 13 * http://www.apache.org/licenses/LICENSE-2.0
Pawel Zarembski 0:01f31e923fe2 14 *
Pawel Zarembski 0:01f31e923fe2 15 * Unless required by applicable law or agreed to in writing, software
Pawel Zarembski 0:01f31e923fe2 16 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
Pawel Zarembski 0:01f31e923fe2 17 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
Pawel Zarembski 0:01f31e923fe2 18 * See the License for the specific language governing permissions and
Pawel Zarembski 0:01f31e923fe2 19 * limitations under the License.
Pawel Zarembski 0:01f31e923fe2 20 */
Pawel Zarembski 0:01f31e923fe2 21
Pawel Zarembski 0:01f31e923fe2 22 #ifndef UART_H
Pawel Zarembski 0:01f31e923fe2 23 #define UART_H
Pawel Zarembski 0:01f31e923fe2 24
Pawel Zarembski 0:01f31e923fe2 25 #include <stdint.h>
Pawel Zarembski 0:01f31e923fe2 26 #include <stdbool.h>
Pawel Zarembski 0:01f31e923fe2 27
Pawel Zarembski 0:01f31e923fe2 28 #ifdef __cplusplus
Pawel Zarembski 0:01f31e923fe2 29 extern "C" {
Pawel Zarembski 0:01f31e923fe2 30 #endif
Pawel Zarembski 0:01f31e923fe2 31
Pawel Zarembski 0:01f31e923fe2 32 /* Parity enumerator */
Pawel Zarembski 0:01f31e923fe2 33 typedef enum {
Pawel Zarembski 0:01f31e923fe2 34 UART_PARITY_NONE = 0,
Pawel Zarembski 0:01f31e923fe2 35 UART_PARITY_ODD = 1,
Pawel Zarembski 0:01f31e923fe2 36 UART_PARITY_EVEN = 2,
Pawel Zarembski 0:01f31e923fe2 37 UART_PARITY_MARK = 3,
Pawel Zarembski 0:01f31e923fe2 38 UART_PARITY_SPACE = 4
Pawel Zarembski 0:01f31e923fe2 39 } UART_Parity;
Pawel Zarembski 0:01f31e923fe2 40
Pawel Zarembski 0:01f31e923fe2 41 /* Stop Bits enumerator */
Pawel Zarembski 0:01f31e923fe2 42 typedef enum {
Pawel Zarembski 0:01f31e923fe2 43 UART_STOP_BITS_1 = 0,
Pawel Zarembski 0:01f31e923fe2 44 UART_STOP_BITS_1_5 = 1,
Pawel Zarembski 0:01f31e923fe2 45 UART_STOP_BITS_2 = 2
Pawel Zarembski 0:01f31e923fe2 46 } UART_StopBits;
Pawel Zarembski 0:01f31e923fe2 47
Pawel Zarembski 0:01f31e923fe2 48 /* Data Bits enumerator */
Pawel Zarembski 0:01f31e923fe2 49 typedef enum {
Pawel Zarembski 0:01f31e923fe2 50 UART_DATA_BITS_5 = 5,
Pawel Zarembski 0:01f31e923fe2 51 UART_DATA_BITS_6 = 6,
Pawel Zarembski 0:01f31e923fe2 52 UART_DATA_BITS_7 = 7,
Pawel Zarembski 0:01f31e923fe2 53 UART_DATA_BITS_8 = 8,
Pawel Zarembski 0:01f31e923fe2 54 UART_DATA_BITS_16 = 16
Pawel Zarembski 0:01f31e923fe2 55 } UART_DataBits;
Pawel Zarembski 0:01f31e923fe2 56
Pawel Zarembski 0:01f31e923fe2 57 /* Flow control enumerator */
Pawel Zarembski 0:01f31e923fe2 58 typedef enum {
Pawel Zarembski 0:01f31e923fe2 59 UART_FLOW_CONTROL_NONE = 0,
Pawel Zarembski 0:01f31e923fe2 60 UART_FLOW_CONTROL_RTS_CTS = 1,
Pawel Zarembski 0:01f31e923fe2 61 UART_FLOW_CONTROL_XON_XOFF = 2
Pawel Zarembski 0:01f31e923fe2 62 } UART_FlowControl;
Pawel Zarembski 0:01f31e923fe2 63
Pawel Zarembski 0:01f31e923fe2 64 /* UART Port Properties structure */
Pawel Zarembski 0:01f31e923fe2 65 typedef struct {
Pawel Zarembski 0:01f31e923fe2 66 uint32_t Baudrate;
Pawel Zarembski 0:01f31e923fe2 67 UART_DataBits DataBits;
Pawel Zarembski 0:01f31e923fe2 68 UART_Parity Parity;
Pawel Zarembski 0:01f31e923fe2 69 UART_StopBits StopBits;
Pawel Zarembski 0:01f31e923fe2 70 UART_FlowControl FlowControl;
Pawel Zarembski 0:01f31e923fe2 71 } UART_Configuration;
Pawel Zarembski 0:01f31e923fe2 72
Pawel Zarembski 0:01f31e923fe2 73 /*-----------------------------------------------------------------------------
Pawel Zarembski 0:01f31e923fe2 74 * FUNCTION PROTOTYPES
Pawel Zarembski 0:01f31e923fe2 75 *----------------------------------------------------------------------------*/
Pawel Zarembski 0:01f31e923fe2 76
Pawel Zarembski 0:01f31e923fe2 77 /* UART driver function prototypes */
Pawel Zarembski 0:01f31e923fe2 78 extern int32_t uart_initialize(void);
Pawel Zarembski 0:01f31e923fe2 79 extern int32_t uart_uninitialize(void);
Pawel Zarembski 0:01f31e923fe2 80 extern int32_t uart_reset(void);
Pawel Zarembski 0:01f31e923fe2 81 extern int32_t uart_set_configuration(UART_Configuration *config);
Pawel Zarembski 0:01f31e923fe2 82 extern int32_t uart_get_configuration(UART_Configuration *config);
Pawel Zarembski 0:01f31e923fe2 83 extern int32_t uart_write_free(void);
Pawel Zarembski 0:01f31e923fe2 84 extern int32_t uart_write_data(uint8_t *data, uint16_t size);
Pawel Zarembski 0:01f31e923fe2 85 extern int32_t uart_read_data(uint8_t *data, uint16_t size);
Pawel Zarembski 0:01f31e923fe2 86 extern void uart_set_control_line_state(uint16_t ctrl_bmp);
Pawel Zarembski 0:01f31e923fe2 87 extern void uart_software_flow_control(void);
Pawel Zarembski 0:01f31e923fe2 88 extern void uart_enable_flow_control(bool enabled);
Pawel Zarembski 0:01f31e923fe2 89
Pawel Zarembski 0:01f31e923fe2 90 #ifdef __cplusplus
Pawel Zarembski 0:01f31e923fe2 91 }
Pawel Zarembski 0:01f31e923fe2 92 #endif
Pawel Zarembski 0:01f31e923fe2 93
Pawel Zarembski 0:01f31e923fe2 94 #endif