Repostiory containing DAPLink source code with Reset Pin workaround for HANI_IOT board.
Upstream: https://github.com/ARMmbed/DAPLink
source/daplink/cmsis-dap/DAP.h@0:01f31e923fe2, 2020-04-07 (annotated)
- Committer:
- Pawel Zarembski
- Date:
- Tue Apr 07 12:55:42 2020 +0200
- Revision:
- 0:01f31e923fe2
hani: DAPLink with reset workaround
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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Pawel Zarembski |
0:01f31e923fe2 | 1 | /* |
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0:01f31e923fe2 | 2 | * Copyright (c) 2013-2019 ARM Limited. All rights reserved. |
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0:01f31e923fe2 | 3 | * Copyright 2019, Cypress Semiconductor Corporation |
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0:01f31e923fe2 | 4 | * or a subsidiary of Cypress Semiconductor Corporation. |
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0:01f31e923fe2 | 5 | * |
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0:01f31e923fe2 | 6 | * SPDX-License-Identifier: Apache-2.0 |
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0:01f31e923fe2 | 7 | * |
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0:01f31e923fe2 | 8 | * Licensed under the Apache License, Version 2.0 (the License); you may |
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0:01f31e923fe2 | 9 | * not use this file except in compliance with the License. |
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0:01f31e923fe2 | 10 | * You may obtain a copy of the License at |
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0:01f31e923fe2 | 11 | * |
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0:01f31e923fe2 | 12 | * www.apache.org/licenses/LICENSE-2.0 |
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0:01f31e923fe2 | 13 | * |
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0:01f31e923fe2 | 14 | * Unless required by applicable law or agreed to in writing, software |
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0:01f31e923fe2 | 15 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT |
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0:01f31e923fe2 | 16 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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0:01f31e923fe2 | 17 | * See the License for the specific language governing permissions and |
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0:01f31e923fe2 | 18 | * limitations under the License. |
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0:01f31e923fe2 | 19 | * |
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0:01f31e923fe2 | 20 | * ---------------------------------------------------------------------- |
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0:01f31e923fe2 | 21 | * |
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0:01f31e923fe2 | 22 | * $Date: 26. November 2019 |
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0:01f31e923fe2 | 23 | * $Revision: V2.0.0 |
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0:01f31e923fe2 | 24 | * |
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0:01f31e923fe2 | 25 | * Project: CMSIS-DAP Include |
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0:01f31e923fe2 | 26 | * Title: DAP.h Definitions |
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0:01f31e923fe2 | 27 | * |
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0:01f31e923fe2 | 28 | *---------------------------------------------------------------------------*/ |
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0:01f31e923fe2 | 29 | |
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0:01f31e923fe2 | 30 | #ifndef __DAP_H__ |
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0:01f31e923fe2 | 31 | #define __DAP_H__ |
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0:01f31e923fe2 | 32 | |
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0:01f31e923fe2 | 33 | |
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0:01f31e923fe2 | 34 | // DAP Firmware Version |
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0:01f31e923fe2 | 35 | #ifdef DAP_FW_V1 |
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0:01f31e923fe2 | 36 | #define DAP_FW_VER "1.2.0" |
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0:01f31e923fe2 | 37 | #else |
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0:01f31e923fe2 | 38 | #define DAP_FW_VER "2.0.0" |
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0:01f31e923fe2 | 39 | #endif |
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0:01f31e923fe2 | 40 | |
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0:01f31e923fe2 | 41 | // DAP Command IDs |
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0:01f31e923fe2 | 42 | #define ID_DAP_Info 0x00U |
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0:01f31e923fe2 | 43 | #define ID_DAP_HostStatus 0x01U |
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0:01f31e923fe2 | 44 | #define ID_DAP_Connect 0x02U |
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0:01f31e923fe2 | 45 | #define ID_DAP_Disconnect 0x03U |
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0:01f31e923fe2 | 46 | #define ID_DAP_TransferConfigure 0x04U |
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0:01f31e923fe2 | 47 | #define ID_DAP_Transfer 0x05U |
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0:01f31e923fe2 | 48 | #define ID_DAP_TransferBlock 0x06U |
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0:01f31e923fe2 | 49 | #define ID_DAP_TransferAbort 0x07U |
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0:01f31e923fe2 | 50 | #define ID_DAP_WriteABORT 0x08U |
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0:01f31e923fe2 | 51 | #define ID_DAP_Delay 0x09U |
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0:01f31e923fe2 | 52 | #define ID_DAP_ResetTarget 0x0AU |
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0:01f31e923fe2 | 53 | #define ID_DAP_SWJ_Pins 0x10U |
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0:01f31e923fe2 | 54 | #define ID_DAP_SWJ_Clock 0x11U |
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0:01f31e923fe2 | 55 | #define ID_DAP_SWJ_Sequence 0x12U |
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0:01f31e923fe2 | 56 | #define ID_DAP_SWD_Configure 0x13U |
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0:01f31e923fe2 | 57 | #define ID_DAP_SWD_Sequence 0x1DU |
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0:01f31e923fe2 | 58 | #define ID_DAP_JTAG_Sequence 0x14U |
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0:01f31e923fe2 | 59 | #define ID_DAP_JTAG_Configure 0x15U |
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0:01f31e923fe2 | 60 | #define ID_DAP_JTAG_IDCODE 0x16U |
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0:01f31e923fe2 | 61 | #define ID_DAP_SWO_Transport 0x17U |
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0:01f31e923fe2 | 62 | #define ID_DAP_SWO_Mode 0x18U |
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0:01f31e923fe2 | 63 | #define ID_DAP_SWO_Baudrate 0x19U |
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0:01f31e923fe2 | 64 | #define ID_DAP_SWO_Control 0x1AU |
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0:01f31e923fe2 | 65 | #define ID_DAP_SWO_Status 0x1BU |
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0:01f31e923fe2 | 66 | #define ID_DAP_SWO_ExtendedStatus 0x1EU |
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0:01f31e923fe2 | 67 | #define ID_DAP_SWO_Data 0x1CU |
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0:01f31e923fe2 | 68 | |
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0:01f31e923fe2 | 69 | #define ID_DAP_QueueCommands 0x7EU |
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0:01f31e923fe2 | 70 | #define ID_DAP_ExecuteCommands 0x7FU |
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0:01f31e923fe2 | 71 | |
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0:01f31e923fe2 | 72 | // DAP Vendor Command IDs |
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0:01f31e923fe2 | 73 | #define ID_DAP_Vendor0 0x80U |
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0:01f31e923fe2 | 74 | #define ID_DAP_Vendor1 0x81U |
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0:01f31e923fe2 | 75 | #define ID_DAP_Vendor2 0x82U |
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0:01f31e923fe2 | 76 | #define ID_DAP_Vendor3 0x83U |
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0:01f31e923fe2 | 77 | #define ID_DAP_Vendor4 0x84U |
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0:01f31e923fe2 | 78 | #define ID_DAP_Vendor5 0x85U |
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0:01f31e923fe2 | 79 | #define ID_DAP_Vendor6 0x86U |
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0:01f31e923fe2 | 80 | #define ID_DAP_Vendor7 0x87U |
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0:01f31e923fe2 | 81 | #define ID_DAP_Vendor8 0x88U |
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0:01f31e923fe2 | 82 | #define ID_DAP_Vendor9 0x89U |
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0:01f31e923fe2 | 83 | #define ID_DAP_Vendor10 0x8AU |
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0:01f31e923fe2 | 84 | #define ID_DAP_Vendor11 0x8BU |
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0:01f31e923fe2 | 85 | #define ID_DAP_Vendor12 0x8CU |
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0:01f31e923fe2 | 86 | #define ID_DAP_Vendor13 0x8DU |
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0:01f31e923fe2 | 87 | #define ID_DAP_Vendor14 0x8EU |
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0:01f31e923fe2 | 88 | #define ID_DAP_Vendor15 0x8FU |
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0:01f31e923fe2 | 89 | #define ID_DAP_Vendor16 0x90U |
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0:01f31e923fe2 | 90 | #define ID_DAP_Vendor17 0x91U |
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0:01f31e923fe2 | 91 | #define ID_DAP_Vendor18 0x92U |
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0:01f31e923fe2 | 92 | #define ID_DAP_Vendor19 0x93U |
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0:01f31e923fe2 | 93 | #define ID_DAP_Vendor20 0x94U |
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0:01f31e923fe2 | 94 | #define ID_DAP_Vendor21 0x95U |
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0:01f31e923fe2 | 95 | #define ID_DAP_Vendor22 0x96U |
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0:01f31e923fe2 | 96 | #define ID_DAP_Vendor23 0x97U |
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0:01f31e923fe2 | 97 | #define ID_DAP_Vendor24 0x98U |
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0:01f31e923fe2 | 98 | #define ID_DAP_Vendor25 0x99U |
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0:01f31e923fe2 | 99 | #define ID_DAP_Vendor26 0x9AU |
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0:01f31e923fe2 | 100 | #define ID_DAP_Vendor27 0x9BU |
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0:01f31e923fe2 | 101 | #define ID_DAP_Vendor28 0x9CU |
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0:01f31e923fe2 | 102 | #define ID_DAP_Vendor29 0x9DU |
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0:01f31e923fe2 | 103 | #define ID_DAP_Vendor30 0x9EU |
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0:01f31e923fe2 | 104 | #define ID_DAP_Vendor31 0x9FU |
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0:01f31e923fe2 | 105 | |
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0:01f31e923fe2 | 106 | // DAP Extended range of Vendor Command IDs |
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0:01f31e923fe2 | 107 | |
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0:01f31e923fe2 | 108 | #define ID_DAP_VendorExFirst 0xA0U |
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0:01f31e923fe2 | 109 | #define ID_DAP_VendorExLast 0xFEU |
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0:01f31e923fe2 | 110 | |
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0:01f31e923fe2 | 111 | #define ID_DAP_Invalid 0xFFU |
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0:01f31e923fe2 | 112 | |
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0:01f31e923fe2 | 113 | // DAP Status Code |
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0:01f31e923fe2 | 114 | #define DAP_OK 0U |
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0:01f31e923fe2 | 115 | #define DAP_ERROR 0xFFU |
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0:01f31e923fe2 | 116 | |
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0:01f31e923fe2 | 117 | // DAP ID |
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0:01f31e923fe2 | 118 | #define DAP_ID_VENDOR 1U |
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0:01f31e923fe2 | 119 | #define DAP_ID_PRODUCT 2U |
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0:01f31e923fe2 | 120 | #define DAP_ID_SER_NUM 3U |
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0:01f31e923fe2 | 121 | #define DAP_ID_FW_VER 4U |
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0:01f31e923fe2 | 122 | #define DAP_ID_DEVICE_VENDOR 5U |
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0:01f31e923fe2 | 123 | #define DAP_ID_DEVICE_NAME 6U |
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0:01f31e923fe2 | 124 | #define DAP_ID_CAPABILITIES 0xF0U |
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0:01f31e923fe2 | 125 | #define DAP_ID_TIMESTAMP_CLOCK 0xF1U |
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0:01f31e923fe2 | 126 | #define DAP_ID_SWO_BUFFER_SIZE 0xFDU |
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0:01f31e923fe2 | 127 | #define DAP_ID_PACKET_COUNT 0xFEU |
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0:01f31e923fe2 | 128 | #define DAP_ID_PACKET_SIZE 0xFFU |
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0:01f31e923fe2 | 129 | |
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0:01f31e923fe2 | 130 | // DAP Host Status |
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0:01f31e923fe2 | 131 | #define DAP_DEBUGGER_CONNECTED 0U |
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0:01f31e923fe2 | 132 | #define DAP_TARGET_RUNNING 1U |
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0:01f31e923fe2 | 133 | |
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0:01f31e923fe2 | 134 | // DAP Port |
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0:01f31e923fe2 | 135 | #define DAP_PORT_AUTODETECT 0U // Autodetect Port |
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0:01f31e923fe2 | 136 | #define DAP_PORT_DISABLED 0U // Port Disabled (I/O pins in High-Z) |
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0:01f31e923fe2 | 137 | #define DAP_PORT_SWD 1U // SWD Port (SWCLK, SWDIO) + nRESET |
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0:01f31e923fe2 | 138 | #define DAP_PORT_JTAG 2U // JTAG Port (TCK, TMS, TDI, TDO, nTRST) + nRESET |
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0:01f31e923fe2 | 139 | |
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0:01f31e923fe2 | 140 | // DAP SWJ Pins |
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0:01f31e923fe2 | 141 | #define DAP_SWJ_SWCLK_TCK 0 // SWCLK/TCK |
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0:01f31e923fe2 | 142 | #define DAP_SWJ_SWDIO_TMS 1 // SWDIO/TMS |
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0:01f31e923fe2 | 143 | #define DAP_SWJ_TDI 2 // TDI |
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0:01f31e923fe2 | 144 | #define DAP_SWJ_TDO 3 // TDO |
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0:01f31e923fe2 | 145 | #define DAP_SWJ_nTRST 5 // nTRST |
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0:01f31e923fe2 | 146 | #define DAP_SWJ_nRESET 7 // nRESET |
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0:01f31e923fe2 | 147 | |
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0:01f31e923fe2 | 148 | // DAP Transfer Request |
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0:01f31e923fe2 | 149 | #define DAP_TRANSFER_APnDP (1U<<0) |
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0:01f31e923fe2 | 150 | #define DAP_TRANSFER_RnW (1U<<1) |
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0:01f31e923fe2 | 151 | #define DAP_TRANSFER_A2 (1U<<2) |
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0:01f31e923fe2 | 152 | #define DAP_TRANSFER_A3 (1U<<3) |
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0:01f31e923fe2 | 153 | #define DAP_TRANSFER_MATCH_VALUE (1U<<4) |
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0:01f31e923fe2 | 154 | #define DAP_TRANSFER_MATCH_MASK (1U<<5) |
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0:01f31e923fe2 | 155 | #define DAP_TRANSFER_TIMESTAMP (1U<<7) |
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0:01f31e923fe2 | 156 | |
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0:01f31e923fe2 | 157 | // DAP Transfer Response |
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0:01f31e923fe2 | 158 | #define DAP_TRANSFER_OK (1U<<0) |
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0:01f31e923fe2 | 159 | #define DAP_TRANSFER_WAIT (1U<<1) |
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0:01f31e923fe2 | 160 | #define DAP_TRANSFER_FAULT (1U<<2) |
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0:01f31e923fe2 | 161 | #define DAP_TRANSFER_ERROR (1U<<3) |
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0:01f31e923fe2 | 162 | #define DAP_TRANSFER_MISMATCH (1U<<4) |
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0:01f31e923fe2 | 163 | |
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0:01f31e923fe2 | 164 | // DAP SWO Trace Mode |
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0:01f31e923fe2 | 165 | #define DAP_SWO_OFF 0U |
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0:01f31e923fe2 | 166 | #define DAP_SWO_UART 1U |
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0:01f31e923fe2 | 167 | #define DAP_SWO_MANCHESTER 2U |
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0:01f31e923fe2 | 168 | |
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0:01f31e923fe2 | 169 | // DAP SWO Trace Status |
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0:01f31e923fe2 | 170 | #define DAP_SWO_CAPTURE_ACTIVE (1U<<0) |
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0:01f31e923fe2 | 171 | #define DAP_SWO_CAPTURE_PAUSED (1U<<1) |
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0:01f31e923fe2 | 172 | #define DAP_SWO_STREAM_ERROR (1U<<6) |
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0:01f31e923fe2 | 173 | #define DAP_SWO_BUFFER_OVERRUN (1U<<7) |
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0:01f31e923fe2 | 174 | |
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0:01f31e923fe2 | 175 | |
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0:01f31e923fe2 | 176 | // Debug Port Register Addresses |
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0:01f31e923fe2 | 177 | #define DP_IDCODE 0x00U // IDCODE Register (SW Read only) |
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0:01f31e923fe2 | 178 | #define DP_ABORT 0x00U // Abort Register (SW Write only) |
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0:01f31e923fe2 | 179 | #define DP_CTRL_STAT 0x04U // Control & Status |
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0:01f31e923fe2 | 180 | #define DP_WCR 0x04U // Wire Control Register (SW Only) |
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0:01f31e923fe2 | 181 | #define DP_SELECT 0x08U // Select Register (JTAG R/W & SW W) |
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0:01f31e923fe2 | 182 | #define DP_RESEND 0x08U // Resend (SW Read Only) |
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0:01f31e923fe2 | 183 | #define DP_RDBUFF 0x0CU // Read Buffer (Read Only) |
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0:01f31e923fe2 | 184 | |
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0:01f31e923fe2 | 185 | // JTAG IR Codes |
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0:01f31e923fe2 | 186 | #define JTAG_ABORT 0x08U |
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0:01f31e923fe2 | 187 | #define JTAG_DPACC 0x0AU |
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0:01f31e923fe2 | 188 | #define JTAG_APACC 0x0BU |
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0:01f31e923fe2 | 189 | #define JTAG_IDCODE 0x0EU |
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0:01f31e923fe2 | 190 | #define JTAG_BYPASS 0x0FU |
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0:01f31e923fe2 | 191 | |
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0:01f31e923fe2 | 192 | // JTAG Sequence Info |
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0:01f31e923fe2 | 193 | #define JTAG_SEQUENCE_TCK 0x3FU // TCK count |
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0:01f31e923fe2 | 194 | #define JTAG_SEQUENCE_TMS 0x40U // TMS value |
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0:01f31e923fe2 | 195 | #define JTAG_SEQUENCE_TDO 0x80U // TDO capture |
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0:01f31e923fe2 | 196 | |
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0:01f31e923fe2 | 197 | // SWD Sequence Info |
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0:01f31e923fe2 | 198 | #define SWD_SEQUENCE_CLK 0x3FU // SWCLK count |
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0:01f31e923fe2 | 199 | #define SWD_SEQUENCE_DIN 0x80U // SWDIO capture |
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0:01f31e923fe2 | 200 | |
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0:01f31e923fe2 | 201 | |
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0:01f31e923fe2 | 202 | #include <stddef.h> |
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0:01f31e923fe2 | 203 | #include <stdint.h> |
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0:01f31e923fe2 | 204 | #include "cmsis_compiler.h" |
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0:01f31e923fe2 | 205 | |
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0:01f31e923fe2 | 206 | // DAP Data structure |
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0:01f31e923fe2 | 207 | typedef struct { |
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0:01f31e923fe2 | 208 | uint8_t debug_port; // Debug Port |
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0:01f31e923fe2 | 209 | uint8_t fast_clock; // Fast Clock Flag |
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0:01f31e923fe2 | 210 | uint8_t padding[2]; |
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0:01f31e923fe2 | 211 | uint32_t clock_delay; // Clock Delay |
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0:01f31e923fe2 | 212 | uint32_t timestamp; // Last captured Timestamp |
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0:01f31e923fe2 | 213 | struct { // Transfer Configuration |
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0:01f31e923fe2 | 214 | uint8_t idle_cycles; // Idle cycles after transfer |
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0:01f31e923fe2 | 215 | uint8_t padding[3]; |
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0:01f31e923fe2 | 216 | uint16_t retry_count; // Number of retries after WAIT response |
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0:01f31e923fe2 | 217 | uint16_t match_retry; // Number of retries if read value does not match |
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0:01f31e923fe2 | 218 | uint32_t match_mask; // Match Mask |
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0:01f31e923fe2 | 219 | } transfer; |
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0:01f31e923fe2 | 220 | #if (DAP_SWD != 0) |
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0:01f31e923fe2 | 221 | struct { // SWD Configuration |
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0:01f31e923fe2 | 222 | uint8_t turnaround; // Turnaround period |
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0:01f31e923fe2 | 223 | uint8_t data_phase; // Always generate Data Phase |
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0:01f31e923fe2 | 224 | } swd_conf; |
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0:01f31e923fe2 | 225 | #endif |
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0:01f31e923fe2 | 226 | #if (DAP_JTAG != 0) |
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0:01f31e923fe2 | 227 | struct { // JTAG Device Chain |
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0:01f31e923fe2 | 228 | uint8_t count; // Number of devices |
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0:01f31e923fe2 | 229 | uint8_t index; // Device index (device at TDO has index 0) |
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0:01f31e923fe2 | 230 | #if (DAP_JTAG_DEV_CNT != 0) |
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0:01f31e923fe2 | 231 | uint8_t ir_length[DAP_JTAG_DEV_CNT]; // IR Length in bits |
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0:01f31e923fe2 | 232 | uint16_t ir_before[DAP_JTAG_DEV_CNT]; // Bits before IR |
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0:01f31e923fe2 | 233 | uint16_t ir_after [DAP_JTAG_DEV_CNT]; // Bits after IR |
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0:01f31e923fe2 | 234 | #endif |
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0:01f31e923fe2 | 235 | } jtag_dev; |
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0:01f31e923fe2 | 236 | #endif |
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0:01f31e923fe2 | 237 | } DAP_Data_t; |
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0:01f31e923fe2 | 238 | |
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0:01f31e923fe2 | 239 | extern DAP_Data_t DAP_Data; // DAP Data |
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0:01f31e923fe2 | 240 | extern volatile uint8_t DAP_TransferAbort; // Transfer Abort Flag |
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0:01f31e923fe2 | 241 | |
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0:01f31e923fe2 | 242 | |
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0:01f31e923fe2 | 243 | #ifdef __cplusplus |
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0:01f31e923fe2 | 244 | extern "C" |
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0:01f31e923fe2 | 245 | { |
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0:01f31e923fe2 | 246 | #endif |
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0:01f31e923fe2 | 247 | |
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0:01f31e923fe2 | 248 | // Functions |
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0:01f31e923fe2 | 249 | extern void SWJ_Sequence (uint32_t count, const uint8_t *data); |
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0:01f31e923fe2 | 250 | extern void SWD_Sequence (uint32_t info, const uint8_t *swdo, uint8_t *swdi); |
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0:01f31e923fe2 | 251 | extern void JTAG_Sequence (uint32_t info, const uint8_t *tdi, uint8_t *tdo); |
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0:01f31e923fe2 | 252 | extern void JTAG_IR (uint32_t ir); |
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0:01f31e923fe2 | 253 | extern uint32_t JTAG_ReadIDCode (void); |
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0:01f31e923fe2 | 254 | extern void JTAG_WriteAbort (uint32_t data); |
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0:01f31e923fe2 | 255 | extern uint8_t JTAG_Transfer (uint32_t request, uint32_t *data); |
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0:01f31e923fe2 | 256 | extern uint8_t SWD_Transfer (uint32_t request, uint32_t *data); |
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0:01f31e923fe2 | 257 | |
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0:01f31e923fe2 | 258 | extern void Delayms (uint32_t delay); |
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0:01f31e923fe2 | 259 | |
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0:01f31e923fe2 | 260 | extern uint32_t SWO_Transport (const uint8_t *request, uint8_t *response); |
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0:01f31e923fe2 | 261 | extern uint32_t SWO_Mode (const uint8_t *request, uint8_t *response); |
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0:01f31e923fe2 | 262 | extern uint32_t SWO_Baudrate (const uint8_t *request, uint8_t *response); |
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0:01f31e923fe2 | 263 | extern uint32_t SWO_Control (const uint8_t *request, uint8_t *response); |
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0:01f31e923fe2 | 264 | extern uint32_t SWO_Status (uint8_t *response); |
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0:01f31e923fe2 | 265 | extern uint32_t SWO_ExtendedStatus (const uint8_t *request, uint8_t *response); |
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0:01f31e923fe2 | 266 | extern uint32_t SWO_Data (const uint8_t *request, uint8_t *response); |
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0:01f31e923fe2 | 267 | |
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0:01f31e923fe2 | 268 | extern void SWO_QueueTransfer (uint8_t *buf, uint32_t num); |
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0:01f31e923fe2 | 269 | extern void SWO_AbortTransfer (void); |
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0:01f31e923fe2 | 270 | extern void SWO_TransferComplete (void); |
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0:01f31e923fe2 | 271 | |
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0:01f31e923fe2 | 272 | extern uint32_t UART_SWO_Mode (uint32_t enable); |
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0:01f31e923fe2 | 273 | extern uint32_t UART_SWO_Baudrate (uint32_t baudrate); |
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0:01f31e923fe2 | 274 | extern uint32_t UART_SWO_Control (uint32_t active); |
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0:01f31e923fe2 | 275 | extern void UART_SWO_Capture (uint8_t *buf, uint32_t num); |
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0:01f31e923fe2 | 276 | extern uint32_t UART_SWO_GetCount (void); |
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0:01f31e923fe2 | 277 | |
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0:01f31e923fe2 | 278 | extern uint32_t Manchester_SWO_Mode (uint32_t enable); |
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0:01f31e923fe2 | 279 | extern uint32_t Manchester_SWO_Baudrate (uint32_t baudrate); |
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0:01f31e923fe2 | 280 | extern uint32_t Manchester_SWO_Control (uint32_t active); |
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0:01f31e923fe2 | 281 | extern void Manchester_SWO_Capture (uint8_t *buf, uint32_t num); |
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0:01f31e923fe2 | 282 | extern uint32_t Manchester_SWO_GetCount (void); |
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0:01f31e923fe2 | 283 | |
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0:01f31e923fe2 | 284 | extern uint32_t DAP_ProcessVendorCommand (const uint8_t *request, uint8_t *response); |
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0:01f31e923fe2 | 285 | extern uint32_t DAP_ProcessCommand (const uint8_t *request, uint8_t *response); |
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0:01f31e923fe2 | 286 | extern uint32_t DAP_ExecuteCommand (const uint8_t *request, uint8_t *response); |
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0:01f31e923fe2 | 287 | |
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0:01f31e923fe2 | 288 | extern void DAP_Setup (void); |
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0:01f31e923fe2 | 289 | |
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0:01f31e923fe2 | 290 | // Configurable delay for clock generation |
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0:01f31e923fe2 | 291 | #ifndef DELAY_SLOW_CYCLES |
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0:01f31e923fe2 | 292 | #define DELAY_SLOW_CYCLES 3U // Number of cycles for one iteration |
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0:01f31e923fe2 | 293 | #endif |
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0:01f31e923fe2 | 294 | #if defined(__CC_ARM) |
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0:01f31e923fe2 | 295 | __STATIC_FORCEINLINE void PIN_DELAY_SLOW (uint32_t delay) { |
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0:01f31e923fe2 | 296 | uint32_t count = delay; |
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0:01f31e923fe2 | 297 | while (--count); |
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0:01f31e923fe2 | 298 | } |
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0:01f31e923fe2 | 299 | #else |
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0:01f31e923fe2 | 300 | __STATIC_FORCEINLINE void PIN_DELAY_SLOW (uint32_t delay) { |
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0:01f31e923fe2 | 301 | __ASM volatile ( |
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0:01f31e923fe2 | 302 | ".syntax unified\n" |
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0:01f31e923fe2 | 303 | "0:\n\t" |
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0:01f31e923fe2 | 304 | "subs %0,%0,#1\n\t" |
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0:01f31e923fe2 | 305 | "bne 0b\n" |
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0:01f31e923fe2 | 306 | : "+l" (delay) : : "cc" |
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0:01f31e923fe2 | 307 | ); |
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0:01f31e923fe2 | 308 | } |
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0:01f31e923fe2 | 309 | #endif |
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0:01f31e923fe2 | 310 | |
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0:01f31e923fe2 | 311 | // Fixed delay for fast clock generation |
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0:01f31e923fe2 | 312 | #ifndef DELAY_FAST_CYCLES |
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0:01f31e923fe2 | 313 | #define DELAY_FAST_CYCLES 0U // Number of cycles: 0..3 |
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0:01f31e923fe2 | 314 | #endif |
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0:01f31e923fe2 | 315 | __STATIC_FORCEINLINE void PIN_DELAY_FAST (void) { |
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0:01f31e923fe2 | 316 | #if (DELAY_FAST_CYCLES >= 1U) |
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0:01f31e923fe2 | 317 | __NOP(); |
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0:01f31e923fe2 | 318 | #endif |
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0:01f31e923fe2 | 319 | #if (DELAY_FAST_CYCLES >= 2U) |
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0:01f31e923fe2 | 320 | __NOP(); |
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0:01f31e923fe2 | 321 | #endif |
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0:01f31e923fe2 | 322 | #if (DELAY_FAST_CYCLES >= 3U) |
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0:01f31e923fe2 | 323 | __NOP(); |
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0:01f31e923fe2 | 324 | #endif |
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0:01f31e923fe2 | 325 | } |
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0:01f31e923fe2 | 326 | |
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0:01f31e923fe2 | 327 | #ifdef __cplusplus |
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0:01f31e923fe2 | 328 | } |
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0:01f31e923fe2 | 329 | #endif |
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0:01f31e923fe2 | 330 | |
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0:01f31e923fe2 | 331 | |
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0:01f31e923fe2 | 332 | #endif /* __DAP_H__ */ |