Repostiory containing DAPLink source code with Reset Pin workaround for HANI_IOT board.
Upstream: https://github.com/ARMmbed/DAPLink
source/rtos/cm3/HAL_CM3.c@0:01f31e923fe2, 2020-04-07 (annotated)
- Committer:
- Pawel Zarembski
- Date:
- Tue Apr 07 12:55:42 2020 +0200
- Revision:
- 0:01f31e923fe2
hani: DAPLink with reset workaround
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Pawel Zarembski |
0:01f31e923fe2 | 1 | /** |
Pawel Zarembski |
0:01f31e923fe2 | 2 | * @file HAL_CM3.c |
Pawel Zarembski |
0:01f31e923fe2 | 3 | * @brief HAL for Cortex-M3 |
Pawel Zarembski |
0:01f31e923fe2 | 4 | * |
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0:01f31e923fe2 | 5 | * DAPLink Interface Firmware |
Pawel Zarembski |
0:01f31e923fe2 | 6 | * Copyright (c) 2009-2016, ARM Limited, All Rights Reserved |
Pawel Zarembski |
0:01f31e923fe2 | 7 | * SPDX-License-Identifier: Apache-2.0 |
Pawel Zarembski |
0:01f31e923fe2 | 8 | * |
Pawel Zarembski |
0:01f31e923fe2 | 9 | * Licensed under the Apache License, Version 2.0 (the "License"); you may |
Pawel Zarembski |
0:01f31e923fe2 | 10 | * not use this file except in compliance with the License. |
Pawel Zarembski |
0:01f31e923fe2 | 11 | * You may obtain a copy of the License at |
Pawel Zarembski |
0:01f31e923fe2 | 12 | * |
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0:01f31e923fe2 | 13 | * http://www.apache.org/licenses/LICENSE-2.0 |
Pawel Zarembski |
0:01f31e923fe2 | 14 | * |
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0:01f31e923fe2 | 15 | * Unless required by applicable law or agreed to in writing, software |
Pawel Zarembski |
0:01f31e923fe2 | 16 | * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT |
Pawel Zarembski |
0:01f31e923fe2 | 17 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
Pawel Zarembski |
0:01f31e923fe2 | 18 | * See the License for the specific language governing permissions and |
Pawel Zarembski |
0:01f31e923fe2 | 19 | * limitations under the License. |
Pawel Zarembski |
0:01f31e923fe2 | 20 | */ |
Pawel Zarembski |
0:01f31e923fe2 | 21 | |
Pawel Zarembski |
0:01f31e923fe2 | 22 | #include "rt_TypeDef.h" |
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0:01f31e923fe2 | 23 | #include "RTX_Config.h" |
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0:01f31e923fe2 | 24 | #include "rt_System.h" |
Pawel Zarembski |
0:01f31e923fe2 | 25 | #include "rt_HAL_CM.h" |
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0:01f31e923fe2 | 26 | #include "rt_Task.h" |
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0:01f31e923fe2 | 27 | #include "rt_List.h" |
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0:01f31e923fe2 | 28 | #include "rt_MemBox.h" |
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0:01f31e923fe2 | 29 | |
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0:01f31e923fe2 | 30 | |
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0:01f31e923fe2 | 31 | /*---------------------------------------------------------------------------- |
Pawel Zarembski |
0:01f31e923fe2 | 32 | * Global Variables |
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0:01f31e923fe2 | 33 | *---------------------------------------------------------------------------*/ |
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0:01f31e923fe2 | 34 | |
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0:01f31e923fe2 | 35 | BIT dbg_msg; |
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0:01f31e923fe2 | 36 | |
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0:01f31e923fe2 | 37 | /*---------------------------------------------------------------------------- |
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0:01f31e923fe2 | 38 | * Functions |
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0:01f31e923fe2 | 39 | *---------------------------------------------------------------------------*/ |
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0:01f31e923fe2 | 40 | |
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0:01f31e923fe2 | 41 | |
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0:01f31e923fe2 | 42 | /*--------------------------- rt_set_PSP ------------------------------------*/ |
Pawel Zarembski |
0:01f31e923fe2 | 43 | |
Pawel Zarembski |
0:01f31e923fe2 | 44 | __asm void rt_set_PSP (U32 stack) { |
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0:01f31e923fe2 | 45 | MSR PSP,R0 |
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0:01f31e923fe2 | 46 | BX LR |
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0:01f31e923fe2 | 47 | } |
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0:01f31e923fe2 | 48 | |
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0:01f31e923fe2 | 49 | |
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0:01f31e923fe2 | 50 | /*--------------------------- rt_get_PSP ------------------------------------*/ |
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0:01f31e923fe2 | 51 | |
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0:01f31e923fe2 | 52 | __asm U32 rt_get_PSP (void) { |
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0:01f31e923fe2 | 53 | MRS R0,PSP |
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0:01f31e923fe2 | 54 | BX LR |
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0:01f31e923fe2 | 55 | } |
Pawel Zarembski |
0:01f31e923fe2 | 56 | |
Pawel Zarembski |
0:01f31e923fe2 | 57 | |
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0:01f31e923fe2 | 58 | /*--------------------------- os_set_env ------------------------------------*/ |
Pawel Zarembski |
0:01f31e923fe2 | 59 | |
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0:01f31e923fe2 | 60 | __asm void os_set_env (void) { |
Pawel Zarembski |
0:01f31e923fe2 | 61 | /* Switch to Unprivileged/Privileged Thread mode, use PSP. */ |
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0:01f31e923fe2 | 62 | MOV R0,SP ; PSP = MSP |
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0:01f31e923fe2 | 63 | MSR PSP,R0 |
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0:01f31e923fe2 | 64 | LDR R0,=__cpp(&os_flags) |
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0:01f31e923fe2 | 65 | LDRB R0,[R0] |
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0:01f31e923fe2 | 66 | LSLS R0,#31 |
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0:01f31e923fe2 | 67 | MOVNE R0,#0x02 ; Privileged Thread mode, use PSP |
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0:01f31e923fe2 | 68 | MOVEQ R0,#0x03 ; Unprivileged Thread mode, use PSP |
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0:01f31e923fe2 | 69 | MSR CONTROL,R0 |
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0:01f31e923fe2 | 70 | BX LR |
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0:01f31e923fe2 | 71 | |
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0:01f31e923fe2 | 72 | ALIGN |
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0:01f31e923fe2 | 73 | } |
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0:01f31e923fe2 | 74 | |
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0:01f31e923fe2 | 75 | |
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0:01f31e923fe2 | 76 | /*--------------------------- _alloc_box ------------------------------------*/ |
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0:01f31e923fe2 | 77 | |
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0:01f31e923fe2 | 78 | __asm void *_alloc_box (void *box_mem) { |
Pawel Zarembski |
0:01f31e923fe2 | 79 | /* Function wrapper for Unprivileged/Privileged mode. */ |
Pawel Zarembski |
0:01f31e923fe2 | 80 | LDR R12,=__cpp(rt_alloc_box) |
Pawel Zarembski |
0:01f31e923fe2 | 81 | MRS R3,IPSR |
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0:01f31e923fe2 | 82 | LSLS R3,#24 |
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0:01f31e923fe2 | 83 | BXNE R12 |
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0:01f31e923fe2 | 84 | MRS R3,CONTROL |
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0:01f31e923fe2 | 85 | LSLS R3,#31 |
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0:01f31e923fe2 | 86 | BXEQ R12 |
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0:01f31e923fe2 | 87 | SVC 0 |
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0:01f31e923fe2 | 88 | BX LR |
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0:01f31e923fe2 | 89 | |
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0:01f31e923fe2 | 90 | ALIGN |
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0:01f31e923fe2 | 91 | } |
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0:01f31e923fe2 | 92 | |
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0:01f31e923fe2 | 93 | |
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0:01f31e923fe2 | 94 | /*--------------------------- _free_box -------------------------------------*/ |
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0:01f31e923fe2 | 95 | |
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0:01f31e923fe2 | 96 | __asm int _free_box (void *box_mem, void *box) { |
Pawel Zarembski |
0:01f31e923fe2 | 97 | /* Function wrapper for Unprivileged/Privileged mode. */ |
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0:01f31e923fe2 | 98 | LDR R12,=__cpp(rt_free_box) |
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0:01f31e923fe2 | 99 | MRS R3,IPSR |
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0:01f31e923fe2 | 100 | LSLS R3,#24 |
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0:01f31e923fe2 | 101 | BXNE R12 |
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0:01f31e923fe2 | 102 | MRS R3,CONTROL |
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0:01f31e923fe2 | 103 | LSLS R3,#31 |
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0:01f31e923fe2 | 104 | BXEQ R12 |
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0:01f31e923fe2 | 105 | SVC 0 |
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0:01f31e923fe2 | 106 | BX LR |
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0:01f31e923fe2 | 107 | |
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0:01f31e923fe2 | 108 | ALIGN |
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0:01f31e923fe2 | 109 | } |
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0:01f31e923fe2 | 110 | |
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0:01f31e923fe2 | 111 | |
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0:01f31e923fe2 | 112 | /*-------------------------- SVC_Handler ------------------------------------*/ |
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0:01f31e923fe2 | 113 | |
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0:01f31e923fe2 | 114 | __asm void SVC_Handler (void) { |
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0:01f31e923fe2 | 115 | PRESERVE8 |
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0:01f31e923fe2 | 116 | |
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0:01f31e923fe2 | 117 | #ifdef IFX_XMC4XXX |
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0:01f31e923fe2 | 118 | EXPORT SVC_Handler_Veneer |
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0:01f31e923fe2 | 119 | SVC_Handler_Veneer |
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0:01f31e923fe2 | 120 | #endif |
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0:01f31e923fe2 | 121 | |
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0:01f31e923fe2 | 122 | IMPORT SVC_Count |
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0:01f31e923fe2 | 123 | IMPORT SVC_Table |
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0:01f31e923fe2 | 124 | IMPORT rt_stk_check |
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0:01f31e923fe2 | 125 | |
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0:01f31e923fe2 | 126 | MRS R0,PSP ; Read PSP |
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0:01f31e923fe2 | 127 | LDR R1,[R0,#24] ; Read Saved PC from Stack |
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0:01f31e923fe2 | 128 | LDRB R1,[R1,#-2] ; Load SVC Number |
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0:01f31e923fe2 | 129 | CBNZ R1,SVC_User |
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0:01f31e923fe2 | 130 | |
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0:01f31e923fe2 | 131 | LDM R0,{R0-R3,R12} ; Read R0-R3,R12 from stack |
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0:01f31e923fe2 | 132 | BLX R12 ; Call SVC Function |
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0:01f31e923fe2 | 133 | |
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0:01f31e923fe2 | 134 | MRS R12,PSP ; Read PSP |
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0:01f31e923fe2 | 135 | LDR R3,=__cpp(&os_tsk) |
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0:01f31e923fe2 | 136 | LDM R3,{R1,R2} ; os_tsk.run, os_tsk.new |
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0:01f31e923fe2 | 137 | CMP R1,R2 |
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0:01f31e923fe2 | 138 | BEQ SVC_Exit ; no task switch |
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0:01f31e923fe2 | 139 | |
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0:01f31e923fe2 | 140 | CBZ R1,SVC_Restore ; Runtask deleted? |
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0:01f31e923fe2 | 141 | |
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0:01f31e923fe2 | 142 | PUSH {R2,R3} |
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0:01f31e923fe2 | 143 | MOV R3,#1 |
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0:01f31e923fe2 | 144 | STRB R3,[R1,#TCB_RETUPD] ; os_tsk.run->ret_upd = 1 |
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0:01f31e923fe2 | 145 | STMDB R12!,{R4-R11} ; Save Old context |
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0:01f31e923fe2 | 146 | STR R12,[R1,#TCB_TSTACK] ; Update os_tsk.run->tsk_stack |
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0:01f31e923fe2 | 147 | BL rt_stk_check ; Check for Stack overflow |
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0:01f31e923fe2 | 148 | POP {R2,R3} |
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0:01f31e923fe2 | 149 | |
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0:01f31e923fe2 | 150 | SVC_Restore |
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0:01f31e923fe2 | 151 | STR R2,[R3] ; os_tsk.run = os_tsk.new |
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0:01f31e923fe2 | 152 | |
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0:01f31e923fe2 | 153 | LDR R12,[R2,#TCB_TSTACK] ; os_tsk.new->tsk_stack |
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0:01f31e923fe2 | 154 | LDMIA R12!,{R4-R11} ; Restore New Context |
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0:01f31e923fe2 | 155 | LDRB R3,[R2,#TCB_RETUPD] ; Update ret_val? |
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0:01f31e923fe2 | 156 | MSR PSP,R12 ; Write PSP |
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0:01f31e923fe2 | 157 | |
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0:01f31e923fe2 | 158 | CBZ R3,SVC_Return |
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0:01f31e923fe2 | 159 | LDRB R0,[R2,#TCB_RETVAL] ; Write os_tsk.new->ret_val |
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0:01f31e923fe2 | 160 | |
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0:01f31e923fe2 | 161 | SVC_Exit |
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0:01f31e923fe2 | 162 | STR R0,[R12] ; Function return value |
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0:01f31e923fe2 | 163 | |
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0:01f31e923fe2 | 164 | SVC_Return |
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0:01f31e923fe2 | 165 | MVN LR,#:NOT:0xFFFFFFFD ; set EXC_RETURN value |
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0:01f31e923fe2 | 166 | #ifdef IFX_XMC4XXX |
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0:01f31e923fe2 | 167 | PUSH {LR} |
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0:01f31e923fe2 | 168 | POP {PC} |
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0:01f31e923fe2 | 169 | #else |
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0:01f31e923fe2 | 170 | BX LR |
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0:01f31e923fe2 | 171 | #endif |
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0:01f31e923fe2 | 172 | |
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0:01f31e923fe2 | 173 | /*------------------- User SVC ------------------------------*/ |
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0:01f31e923fe2 | 174 | |
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0:01f31e923fe2 | 175 | SVC_User |
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0:01f31e923fe2 | 176 | PUSH {R4,LR} ; Save Registers |
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0:01f31e923fe2 | 177 | LDR R2,=SVC_Count |
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0:01f31e923fe2 | 178 | LDR R2,[R2] |
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0:01f31e923fe2 | 179 | CMP R1,R2 |
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0:01f31e923fe2 | 180 | BHI SVC_Done ; Overflow |
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0:01f31e923fe2 | 181 | |
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0:01f31e923fe2 | 182 | LDR R4,=SVC_Table-4 |
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0:01f31e923fe2 | 183 | LDR R4,[R4,R1,LSL #2] ; Load SVC Function Address |
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0:01f31e923fe2 | 184 | |
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0:01f31e923fe2 | 185 | LDM R0,{R0-R3,R12} ; Read R0-R3,R12 from stack |
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0:01f31e923fe2 | 186 | BLX R4 ; Call SVC Function |
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0:01f31e923fe2 | 187 | |
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0:01f31e923fe2 | 188 | MRS R12,PSP |
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0:01f31e923fe2 | 189 | STM R12,{R0-R3} ; Function return values |
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0:01f31e923fe2 | 190 | SVC_Done |
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0:01f31e923fe2 | 191 | POP {R4,PC} ; RETI |
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0:01f31e923fe2 | 192 | |
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0:01f31e923fe2 | 193 | ALIGN |
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0:01f31e923fe2 | 194 | } |
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0:01f31e923fe2 | 195 | |
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0:01f31e923fe2 | 196 | |
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0:01f31e923fe2 | 197 | /*-------------------------- PendSV_Handler ---------------------------------*/ |
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0:01f31e923fe2 | 198 | |
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0:01f31e923fe2 | 199 | __asm void PendSV_Handler (void) { |
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0:01f31e923fe2 | 200 | PRESERVE8 |
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0:01f31e923fe2 | 201 | |
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0:01f31e923fe2 | 202 | #ifdef IFX_XMC4XXX |
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0:01f31e923fe2 | 203 | EXPORT PendSV_Handler_Veneer |
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0:01f31e923fe2 | 204 | PendSV_Handler_Veneer |
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0:01f31e923fe2 | 205 | #endif |
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0:01f31e923fe2 | 206 | |
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0:01f31e923fe2 | 207 | BL __cpp(rt_pop_req) |
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0:01f31e923fe2 | 208 | |
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0:01f31e923fe2 | 209 | Sys_Switch |
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0:01f31e923fe2 | 210 | LDR R3,=__cpp(&os_tsk) |
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0:01f31e923fe2 | 211 | LDM R3,{R1,R2} ; os_tsk.run, os_tsk.new |
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0:01f31e923fe2 | 212 | CMP R1,R2 |
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0:01f31e923fe2 | 213 | BEQ Sys_Exit |
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0:01f31e923fe2 | 214 | |
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0:01f31e923fe2 | 215 | PUSH {R2,R3} |
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0:01f31e923fe2 | 216 | MOV R3,#0 |
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0:01f31e923fe2 | 217 | STRB R3,[R1,#TCB_RETUPD] ; os_tsk.run->ret_upd = 0 |
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0:01f31e923fe2 | 218 | MRS R12,PSP ; Read PSP |
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0:01f31e923fe2 | 219 | STMDB R12!,{R4-R11} ; Save Old context |
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0:01f31e923fe2 | 220 | STR R12,[R1,#TCB_TSTACK] ; Update os_tsk.run->tsk_stack |
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0:01f31e923fe2 | 221 | BL rt_stk_check ; Check for Stack overflow |
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0:01f31e923fe2 | 222 | |
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0:01f31e923fe2 | 223 | POP {R2,R3} |
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0:01f31e923fe2 | 224 | STR R2,[R3] ; os_tsk.run = os_tsk.new |
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0:01f31e923fe2 | 225 | |
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0:01f31e923fe2 | 226 | LDR R12,[R2,#TCB_TSTACK] ; os_tsk.new->tsk_stack |
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0:01f31e923fe2 | 227 | LDMIA R12!,{R4-R11} ; Restore New Context |
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0:01f31e923fe2 | 228 | MSR PSP,R12 ; Write PSP |
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0:01f31e923fe2 | 229 | |
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0:01f31e923fe2 | 230 | LDRB R3,[R2,#TCB_RETUPD] ; Update ret_val? |
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0:01f31e923fe2 | 231 | CBZ R3,Sys_Exit |
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0:01f31e923fe2 | 232 | LDRB R3,[R2,#TCB_RETVAL] ; Write os_tsk.new->ret_val |
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0:01f31e923fe2 | 233 | STR R3,[R12] |
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0:01f31e923fe2 | 234 | Sys_Exit |
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0:01f31e923fe2 | 235 | MVN LR,#:NOT:0xFFFFFFFD ; set EXC_RETURN value |
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0:01f31e923fe2 | 236 | #ifdef IFX_XMC4XXX |
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0:01f31e923fe2 | 237 | PUSH {LR} |
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0:01f31e923fe2 | 238 | POP {PC} |
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0:01f31e923fe2 | 239 | #else |
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0:01f31e923fe2 | 240 | BX LR ; Return to Thread Mode |
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0:01f31e923fe2 | 241 | #endif |
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0:01f31e923fe2 | 242 | |
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0:01f31e923fe2 | 243 | ALIGN |
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0:01f31e923fe2 | 244 | } |
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0:01f31e923fe2 | 245 | |
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0:01f31e923fe2 | 246 | |
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0:01f31e923fe2 | 247 | /*-------------------------- SysTick_Handler --------------------------------*/ |
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0:01f31e923fe2 | 248 | |
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0:01f31e923fe2 | 249 | __asm void SysTick_Handler (void) { |
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0:01f31e923fe2 | 250 | PRESERVE8 |
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0:01f31e923fe2 | 251 | |
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0:01f31e923fe2 | 252 | #ifdef IFX_XMC4XXX |
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0:01f31e923fe2 | 253 | EXPORT SysTick_Handler_Veneer |
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0:01f31e923fe2 | 254 | SysTick_Handler_Veneer |
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0:01f31e923fe2 | 255 | #endif |
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0:01f31e923fe2 | 256 | |
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0:01f31e923fe2 | 257 | BL __cpp(rt_systick) |
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0:01f31e923fe2 | 258 | B Sys_Switch |
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0:01f31e923fe2 | 259 | |
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0:01f31e923fe2 | 260 | ALIGN |
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0:01f31e923fe2 | 261 | } |
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0:01f31e923fe2 | 262 | |
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0:01f31e923fe2 | 263 | |
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0:01f31e923fe2 | 264 | /*-------------------------- OS_Tick_Handler --------------------------------*/ |
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0:01f31e923fe2 | 265 | |
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0:01f31e923fe2 | 266 | __asm void OS_Tick_Handler (void) { |
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0:01f31e923fe2 | 267 | PRESERVE8 |
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0:01f31e923fe2 | 268 | |
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0:01f31e923fe2 | 269 | BL __cpp(os_tick_irqack) |
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0:01f31e923fe2 | 270 | BL __cpp(rt_systick) |
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0:01f31e923fe2 | 271 | B Sys_Switch |
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0:01f31e923fe2 | 272 | |
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0:01f31e923fe2 | 273 | ALIGN |
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0:01f31e923fe2 | 274 | } |
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0:01f31e923fe2 | 275 | |
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0:01f31e923fe2 | 276 | |
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0:01f31e923fe2 | 277 | /*--------------------------- rt_init_stack ---------------------------------*/ |
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0:01f31e923fe2 | 278 | |
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0:01f31e923fe2 | 279 | void rt_init_stack (P_TCB p_TCB, FUNCP task_body) { |
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0:01f31e923fe2 | 280 | /* Prepare TCB and saved context for a first time start of a task. */ |
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0:01f31e923fe2 | 281 | U32 *stk,i,size; |
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0:01f31e923fe2 | 282 | |
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0:01f31e923fe2 | 283 | /* Prepare a complete interrupt frame for first task start */ |
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0:01f31e923fe2 | 284 | size = p_TCB->priv_stack >> 2; |
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0:01f31e923fe2 | 285 | if (size == 0) { |
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0:01f31e923fe2 | 286 | size = (U16)os_stackinfo >> 2; |
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0:01f31e923fe2 | 287 | } |
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0:01f31e923fe2 | 288 | |
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0:01f31e923fe2 | 289 | /* Write to the top of stack. */ |
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0:01f31e923fe2 | 290 | stk = &p_TCB->stack[size]; |
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0:01f31e923fe2 | 291 | |
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0:01f31e923fe2 | 292 | /* Auto correct to 8-byte ARM stack alignment. */ |
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0:01f31e923fe2 | 293 | if ((U32)stk & 0x04) { |
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0:01f31e923fe2 | 294 | stk--; |
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0:01f31e923fe2 | 295 | } |
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0:01f31e923fe2 | 296 | |
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0:01f31e923fe2 | 297 | stk -= 16; |
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0:01f31e923fe2 | 298 | |
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0:01f31e923fe2 | 299 | /* Default xPSR and initial PC */ |
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0:01f31e923fe2 | 300 | stk[15] = INITIAL_xPSR; |
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0:01f31e923fe2 | 301 | stk[14] = (U32)task_body; |
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0:01f31e923fe2 | 302 | |
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0:01f31e923fe2 | 303 | /* Clear R1-R12,LR registers. */ |
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0:01f31e923fe2 | 304 | for (i = 0; i < 14; i++) { |
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0:01f31e923fe2 | 305 | stk[i] = 0; |
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0:01f31e923fe2 | 306 | } |
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0:01f31e923fe2 | 307 | |
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0:01f31e923fe2 | 308 | /* Assign a void pointer to R0. */ |
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0:01f31e923fe2 | 309 | stk[8] = (U32)p_TCB->msg; |
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0:01f31e923fe2 | 310 | |
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0:01f31e923fe2 | 311 | /* Initial Task stack pointer. */ |
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0:01f31e923fe2 | 312 | p_TCB->tsk_stack = (U32)stk; |
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0:01f31e923fe2 | 313 | |
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0:01f31e923fe2 | 314 | /* Task entry point. */ |
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0:01f31e923fe2 | 315 | p_TCB->ptask = task_body; |
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0:01f31e923fe2 | 316 | |
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0:01f31e923fe2 | 317 | /* Set a magic word for checking of stack overflow. */ |
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0:01f31e923fe2 | 318 | p_TCB->stack[0] = MAGIC_WORD; |
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0:01f31e923fe2 | 319 | } |
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0:01f31e923fe2 | 320 | |
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0:01f31e923fe2 | 321 | |
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0:01f31e923fe2 | 322 | /*--------------------------- dbg_init --------------------------------------*/ |
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0:01f31e923fe2 | 323 | |
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0:01f31e923fe2 | 324 | void dbg_init (void) { |
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0:01f31e923fe2 | 325 | if ((DEMCR & DEMCR_TRCENA) && |
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0:01f31e923fe2 | 326 | (ITM_CONTROL & ITM_ITMENA) && |
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0:01f31e923fe2 | 327 | (ITM_ENABLE & (1UL << 31))) { |
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0:01f31e923fe2 | 328 | dbg_msg = __TRUE; |
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0:01f31e923fe2 | 329 | } |
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0:01f31e923fe2 | 330 | } |
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0:01f31e923fe2 | 331 | |
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0:01f31e923fe2 | 332 | |
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0:01f31e923fe2 | 333 | /*--------------------------- dbg_task_notify -------------------------------*/ |
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0:01f31e923fe2 | 334 | |
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0:01f31e923fe2 | 335 | void dbg_task_notify (P_TCB p_tcb, BOOL create) { |
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0:01f31e923fe2 | 336 | while (ITM_PORT31_U32 == 0); |
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0:01f31e923fe2 | 337 | ITM_PORT31_U32 = (U32)p_tcb->ptask; |
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0:01f31e923fe2 | 338 | while (ITM_PORT31_U32 == 0); |
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0:01f31e923fe2 | 339 | ITM_PORT31_U16 = (create << 8) | p_tcb->task_id; |
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0:01f31e923fe2 | 340 | } |
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0:01f31e923fe2 | 341 | |
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0:01f31e923fe2 | 342 | |
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0:01f31e923fe2 | 343 | /*--------------------------- dbg_task_switch -------------------------------*/ |
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0:01f31e923fe2 | 344 | |
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0:01f31e923fe2 | 345 | void dbg_task_switch (U32 task_id) { |
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0:01f31e923fe2 | 346 | while (ITM_PORT31_U32 == 0); |
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0:01f31e923fe2 | 347 | ITM_PORT31_U8 = task_id; |
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0:01f31e923fe2 | 348 | } |
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0:01f31e923fe2 | 349 | |
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0:01f31e923fe2 | 350 | |
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0:01f31e923fe2 | 351 | /*---------------------------------------------------------------------------- |
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0:01f31e923fe2 | 352 | * end of file |
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0:01f31e923fe2 | 353 | *---------------------------------------------------------------------------*/ |
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0:01f31e923fe2 | 354 |