Arrow / Mbed OS DAPLink Reset

Repostiory containing DAPLink source code with Reset Pin workaround for HANI_IOT board.

Upstream: https://github.com/ARMmbed/DAPLink

source/hic_hal/nxp/lpc4322/lpc43xx_scu.h@0:01f31e923fe2, 2020-04-07 (annotated)

Committer:
Pawel Zarembski
Date:
Tue Apr 07 12:55:42 2020 +0200
Revision:
0:01f31e923fe2
hani: DAPLink with reset workaround

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Pawel Zarembski 0:01f31e923fe2 1 /**
Pawel Zarembski 0:01f31e923fe2 2 * @file lpc43xx_scu.h
Pawel Zarembski 0:01f31e923fe2 3 * @brief
Pawel Zarembski 0:01f31e923fe2 4 *
Pawel Zarembski 0:01f31e923fe2 5 * DAPLink Interface Firmware
Pawel Zarembski 0:01f31e923fe2 6 * Copyright (c) 2009-2016, ARM Limited, All Rights Reserved
Pawel Zarembski 0:01f31e923fe2 7 * SPDX-License-Identifier: Apache-2.0
Pawel Zarembski 0:01f31e923fe2 8 *
Pawel Zarembski 0:01f31e923fe2 9 * Licensed under the Apache License, Version 2.0 (the "License"); you may
Pawel Zarembski 0:01f31e923fe2 10 * not use this file except in compliance with the License.
Pawel Zarembski 0:01f31e923fe2 11 * You may obtain a copy of the License at
Pawel Zarembski 0:01f31e923fe2 12 *
Pawel Zarembski 0:01f31e923fe2 13 * http://www.apache.org/licenses/LICENSE-2.0
Pawel Zarembski 0:01f31e923fe2 14 *
Pawel Zarembski 0:01f31e923fe2 15 * Unless required by applicable law or agreed to in writing, software
Pawel Zarembski 0:01f31e923fe2 16 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
Pawel Zarembski 0:01f31e923fe2 17 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
Pawel Zarembski 0:01f31e923fe2 18 * See the License for the specific language governing permissions and
Pawel Zarembski 0:01f31e923fe2 19 * limitations under the License.
Pawel Zarembski 0:01f31e923fe2 20 */
Pawel Zarembski 0:01f31e923fe2 21
Pawel Zarembski 0:01f31e923fe2 22 /* Peripheral group ----------------------------------------------------------- */
Pawel Zarembski 0:01f31e923fe2 23 /** @defgroup SCU SCU (System Control Unit)
Pawel Zarembski 0:01f31e923fe2 24 * @ingroup LPC4300CMSIS_FwLib_Drivers
Pawel Zarembski 0:01f31e923fe2 25 * @{
Pawel Zarembski 0:01f31e923fe2 26 */
Pawel Zarembski 0:01f31e923fe2 27
Pawel Zarembski 0:01f31e923fe2 28 #ifndef __SCU_H
Pawel Zarembski 0:01f31e923fe2 29 #define __SCU_H
Pawel Zarembski 0:01f31e923fe2 30
Pawel Zarembski 0:01f31e923fe2 31 #ifdef __cplusplus
Pawel Zarembski 0:01f31e923fe2 32 extern "C"
Pawel Zarembski 0:01f31e923fe2 33 {
Pawel Zarembski 0:01f31e923fe2 34 #endif
Pawel Zarembski 0:01f31e923fe2 35
Pawel Zarembski 0:01f31e923fe2 36 /* Private macros ------------------------------------------------------------- */
Pawel Zarembski 0:01f31e923fe2 37 /** @defgroup SCT_Private_Macros SCT Private Macros
Pawel Zarembski 0:01f31e923fe2 38 * @{
Pawel Zarembski 0:01f31e923fe2 39 */
Pawel Zarembski 0:01f31e923fe2 40
Pawel Zarembski 0:01f31e923fe2 41 /** Port offset definition */
Pawel Zarembski 0:01f31e923fe2 42 #define PORT_OFFSET 0x80
Pawel Zarembski 0:01f31e923fe2 43 /** Pin offset definition */
Pawel Zarembski 0:01f31e923fe2 44 #define PIN_OFFSET 0x04
Pawel Zarembski 0:01f31e923fe2 45
Pawel Zarembski 0:01f31e923fe2 46 /* Pin mode defines, following partly a definition from older chip architectures */
Pawel Zarembski 0:01f31e923fe2 47 #define MD_PUP (0x0 << 3)
Pawel Zarembski 0:01f31e923fe2 48 #define MD_BUK (0x1 << 3)
Pawel Zarembski 0:01f31e923fe2 49 #define MD_PLN (0x2 << 3)
Pawel Zarembski 0:01f31e923fe2 50 #define MD_PDN (0x3 << 3)
Pawel Zarembski 0:01f31e923fe2 51 #define MD_EHS (0x1 << 5)
Pawel Zarembski 0:01f31e923fe2 52 #define MD_EZI (0x1 << 6)
Pawel Zarembski 0:01f31e923fe2 53 #define MD_ZI (0x1 << 7)
Pawel Zarembski 0:01f31e923fe2 54 #define MD_EHD0 (0x1 << 8)
Pawel Zarembski 0:01f31e923fe2 55 #define MD_EHD1 (0x1 << 9)
Pawel Zarembski 0:01f31e923fe2 56 #define MD_EHD2 (0x3 << 8)
Pawel Zarembski 0:01f31e923fe2 57 #define MD_PLN_FAST (MD_PLN | MD_EZI | MD_ZI | MD_EHS)
Pawel Zarembski 0:01f31e923fe2 58
Pawel Zarembski 0:01f31e923fe2 59
Pawel Zarembski 0:01f31e923fe2 60 /* Pin mode defines, more in line with the definitions in the LPC1800/4300 user manual */
Pawel Zarembski 0:01f31e923fe2 61 /* Defines for SFSPx_y pin configuration registers */
Pawel Zarembski 0:01f31e923fe2 62 #define PDN_ENABLE (1 << 3) // Pull-down enable
Pawel Zarembski 0:01f31e923fe2 63 #define PDN_DISABLE (0 << 3) // Pull-down disable
Pawel Zarembski 0:01f31e923fe2 64 #define PUP_ENABLE (0 << 4) // Pull-up enable
Pawel Zarembski 0:01f31e923fe2 65 #define PUP_DISABLE (1 << 4) // Pull-up disable
Pawel Zarembski 0:01f31e923fe2 66 #define SLEWRATE_SLOW (0 << 5) // Slew rate for low noise with medium speed
Pawel Zarembski 0:01f31e923fe2 67 #define SLEWRATE_FAST (1 << 5) // Slew rate for medium noise with fast speed
Pawel Zarembski 0:01f31e923fe2 68 #define INBUF_ENABLE (1 << 6) // Input buffer
Pawel Zarembski 0:01f31e923fe2 69 #define INBUF_DISABLE (0 << 6) // Input buffer
Pawel Zarembski 0:01f31e923fe2 70 #define FILTER_ENABLE (0 << 7) // Glitch filter (for signals below 30MHz)
Pawel Zarembski 0:01f31e923fe2 71 #define FILTER_DISABLE (1 << 7) // No glitch filter (for signals above 30MHz)
Pawel Zarembski 0:01f31e923fe2 72 #define DRIVE_8MA (1 << 8) // Drive strength of 8mA
Pawel Zarembski 0:01f31e923fe2 73 #define DRIVE_14MA (1 << 9) // Drive strength of 14mA
Pawel Zarembski 0:01f31e923fe2 74 #define DRIVE_20MA (3 << 8) // Drive strength of 20mA
Pawel Zarembski 0:01f31e923fe2 75
Pawel Zarembski 0:01f31e923fe2 76
Pawel Zarembski 0:01f31e923fe2 77 /* Configuration examples for various I/O pins */
Pawel Zarembski 0:01f31e923fe2 78 #define EMC_IO (PUP_ENABLE | PDN_ENABLE | SLEWRATE_FAST | INBUF_ENABLE | FILTER_DISABLE)
Pawel Zarembski 0:01f31e923fe2 79 #define LCD_PINCONFIG (PUP_DISABLE | PDN_DISABLE | SLEWRATE_FAST | INBUF_ENABLE | FILTER_DISABLE)
Pawel Zarembski 0:01f31e923fe2 80 #define CLK_IN (PUP_ENABLE | PDN_ENABLE | SLEWRATE_FAST | INBUF_ENABLE | FILTER_DISABLE)
Pawel Zarembski 0:01f31e923fe2 81 #define CLK_OUT (PUP_ENABLE | PDN_ENABLE | SLEWRATE_FAST | INBUF_ENABLE | FILTER_DISABLE)
Pawel Zarembski 0:01f31e923fe2 82 #define GPIO_PUP (PUP_ENABLE | PDN_DISABLE | SLEWRATE_SLOW | INBUF_ENABLE | FILTER_ENABLE )
Pawel Zarembski 0:01f31e923fe2 83 #define GPIO_PDN (PUP_DISABLE | PDN_ENABLE | SLEWRATE_SLOW | INBUF_ENABLE | FILTER_ENABLE )
Pawel Zarembski 0:01f31e923fe2 84 #define GPIO_NOPULL (PUP_DISABLE | PDN_DISABLE | SLEWRATE_SLOW | INBUF_ENABLE | FILTER_ENABLE )
Pawel Zarembski 0:01f31e923fe2 85 #define UART_RX_TX (PUP_DISABLE | PDN_ENABLE | SLEWRATE_SLOW | INBUF_ENABLE | FILTER_ENABLE )
Pawel Zarembski 0:01f31e923fe2 86 #define SSP_IO (PUP_ENABLE | PDN_ENABLE | SLEWRATE_FAST | INBUF_ENABLE | FILTER_DISABLE)
Pawel Zarembski 0:01f31e923fe2 87
Pawel Zarembski 0:01f31e923fe2 88
Pawel Zarembski 0:01f31e923fe2 89 /* Pin function */
Pawel Zarembski 0:01f31e923fe2 90 #define FUNC0 0x0 /** Function 0 */
Pawel Zarembski 0:01f31e923fe2 91 #define FUNC1 0x1 /** Function 1 */
Pawel Zarembski 0:01f31e923fe2 92 #define FUNC2 0x2 /** Function 2 */
Pawel Zarembski 0:01f31e923fe2 93 #define FUNC3 0x3 /** Function 3 */
Pawel Zarembski 0:01f31e923fe2 94 #define FUNC4 0x4
Pawel Zarembski 0:01f31e923fe2 95 #define FUNC5 0x5
Pawel Zarembski 0:01f31e923fe2 96 #define FUNC6 0x6
Pawel Zarembski 0:01f31e923fe2 97 #define FUNC7 0x7
Pawel Zarembski 0:01f31e923fe2 98 /**
Pawel Zarembski 0:01f31e923fe2 99 * @}
Pawel Zarembski 0:01f31e923fe2 100 */
Pawel Zarembski 0:01f31e923fe2 101
Pawel Zarembski 0:01f31e923fe2 102 #define LPC_SCU_PIN(po, pi) (*(volatile int *) (LPC_SCU_BASE + ((po) * 0x80) + ((pi) * 0x4)) )
Pawel Zarembski 0:01f31e923fe2 103 #define LPC_SCU_CLK(c) (*(volatile int *) (LPC_SCU_BASE + 0xC00 + ((c) * 0x4)) )
Pawel Zarembski 0:01f31e923fe2 104
Pawel Zarembski 0:01f31e923fe2 105 /* Public Functions ----------------------------------------------------------- */
Pawel Zarembski 0:01f31e923fe2 106 /** @defgroup SCU_Public_Functions SCU Public Functions
Pawel Zarembski 0:01f31e923fe2 107 * @{
Pawel Zarembski 0:01f31e923fe2 108 */
Pawel Zarembski 0:01f31e923fe2 109
Pawel Zarembski 0:01f31e923fe2 110 void scu_pinmux(uint8_t port, uint8_t pin, uint8_t mode, uint8_t func);
Pawel Zarembski 0:01f31e923fe2 111
Pawel Zarembski 0:01f31e923fe2 112 /**
Pawel Zarembski 0:01f31e923fe2 113 * @}
Pawel Zarembski 0:01f31e923fe2 114 */
Pawel Zarembski 0:01f31e923fe2 115
Pawel Zarembski 0:01f31e923fe2 116 #ifdef __cplusplus
Pawel Zarembski 0:01f31e923fe2 117 }
Pawel Zarembski 0:01f31e923fe2 118 #endif
Pawel Zarembski 0:01f31e923fe2 119
Pawel Zarembski 0:01f31e923fe2 120 #endif /* end __SCU_H */
Pawel Zarembski 0:01f31e923fe2 121
Pawel Zarembski 0:01f31e923fe2 122 /**
Pawel Zarembski 0:01f31e923fe2 123 * @}
Pawel Zarembski 0:01f31e923fe2 124 */
Pawel Zarembski 0:01f31e923fe2 125