Repostiory containing DAPLink source code with Reset Pin workaround for HANI_IOT board.

Upstream: https://github.com/ARMmbed/DAPLink

Committer:
Pawel Zarembski
Date:
Tue Apr 07 12:55:42 2020 +0200
Revision:
0:01f31e923fe2
hani: DAPLink with reset workaround

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Pawel Zarembski 0:01f31e923fe2 1 /**
Pawel Zarembski 0:01f31e923fe2 2 * @file gpio.c
Pawel Zarembski 0:01f31e923fe2 3 * @brief
Pawel Zarembski 0:01f31e923fe2 4 *
Pawel Zarembski 0:01f31e923fe2 5 * DAPLink Interface Firmware
Pawel Zarembski 0:01f31e923fe2 6 * Copyright (c) 2009-2016, ARM Limited, All Rights Reserved
Pawel Zarembski 0:01f31e923fe2 7 * SPDX-License-Identifier: Apache-2.0
Pawel Zarembski 0:01f31e923fe2 8 *
Pawel Zarembski 0:01f31e923fe2 9 * Licensed under the Apache License, Version 2.0 (the "License"); you may
Pawel Zarembski 0:01f31e923fe2 10 * not use this file except in compliance with the License.
Pawel Zarembski 0:01f31e923fe2 11 * You may obtain a copy of the License at
Pawel Zarembski 0:01f31e923fe2 12 *
Pawel Zarembski 0:01f31e923fe2 13 * http://www.apache.org/licenses/LICENSE-2.0
Pawel Zarembski 0:01f31e923fe2 14 *
Pawel Zarembski 0:01f31e923fe2 15 * Unless required by applicable law or agreed to in writing, software
Pawel Zarembski 0:01f31e923fe2 16 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
Pawel Zarembski 0:01f31e923fe2 17 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
Pawel Zarembski 0:01f31e923fe2 18 * See the License for the specific language governing permissions and
Pawel Zarembski 0:01f31e923fe2 19 * limitations under the License.
Pawel Zarembski 0:01f31e923fe2 20 */
Pawel Zarembski 0:01f31e923fe2 21
Pawel Zarembski 0:01f31e923fe2 22 #include "LPC43xx.h"
Pawel Zarembski 0:01f31e923fe2 23 #include "lpc43xx_scu.h"
Pawel Zarembski 0:01f31e923fe2 24 #include "gpio.h"
Pawel Zarembski 0:01f31e923fe2 25 #include "compiler.h"
Pawel Zarembski 0:01f31e923fe2 26 #include "DAP_config.h" // For the nRESET and RESET_TXE port/pin info
Pawel Zarembski 0:01f31e923fe2 27 #include "IO_Config.h"
Pawel Zarembski 0:01f31e923fe2 28
Pawel Zarembski 0:01f31e923fe2 29 BOOL gpio_reset_pin_is_input = __TRUE;
Pawel Zarembski 0:01f31e923fe2 30
Pawel Zarembski 0:01f31e923fe2 31 // Connected LED P1_1: GPIO0[8]
Pawel Zarembski 0:01f31e923fe2 32 #define LED_CONNECTED_PORT 0
Pawel Zarembski 0:01f31e923fe2 33 #define LED_CONNECTED_BIT 8
Pawel Zarembski 0:01f31e923fe2 34
Pawel Zarembski 0:01f31e923fe2 35 // LPC43xx peripheral register bit masks (used by macros)
Pawel Zarembski 0:01f31e923fe2 36 #define CCU_CLK_CFG_RUN (1UL << 0)
Pawel Zarembski 0:01f31e923fe2 37 #define CCU_CLK_CFG_AUTO (1UL << 1)
Pawel Zarembski 0:01f31e923fe2 38 #define CCU_CLK_STAT_RUN (1UL << 0)
Pawel Zarembski 0:01f31e923fe2 39
Pawel Zarembski 0:01f31e923fe2 40 static void busy_wait(uint32_t cycles)
Pawel Zarembski 0:01f31e923fe2 41 {
Pawel Zarembski 0:01f31e923fe2 42 volatile uint32_t i;
Pawel Zarembski 0:01f31e923fe2 43 i = cycles;
Pawel Zarembski 0:01f31e923fe2 44
Pawel Zarembski 0:01f31e923fe2 45 while (i > 0) {
Pawel Zarembski 0:01f31e923fe2 46 i--;
Pawel Zarembski 0:01f31e923fe2 47 }
Pawel Zarembski 0:01f31e923fe2 48 }
Pawel Zarembski 0:01f31e923fe2 49
Pawel Zarembski 0:01f31e923fe2 50 void gpio_init(void)
Pawel Zarembski 0:01f31e923fe2 51 {
Pawel Zarembski 0:01f31e923fe2 52 /* Enable clock and init GPIO outputs */
Pawel Zarembski 0:01f31e923fe2 53 LPC_CCU1->CLK_M4_GPIO_CFG = CCU_CLK_CFG_AUTO | CCU_CLK_CFG_RUN;
Pawel Zarembski 0:01f31e923fe2 54
Pawel Zarembski 0:01f31e923fe2 55 while (!(LPC_CCU1->CLK_M4_GPIO_STAT & CCU_CLK_STAT_RUN));
Pawel Zarembski 0:01f31e923fe2 56
Pawel Zarembski 0:01f31e923fe2 57 /* Configure I/O pins: function number, input buffer enabled, */
Pawel Zarembski 0:01f31e923fe2 58 /* no pull-up/down */
Pawel Zarembski 0:01f31e923fe2 59 scu_pinmux(1, 1, GPIO_NOPULL, FUNC0); /* LED: GPIO0[8] */
Pawel Zarembski 0:01f31e923fe2 60 scu_pinmux(2, 11, GPIO_NOPULL, FUNC0); /* ISPCTRL: GPIO1[11] */
Pawel Zarembski 0:01f31e923fe2 61 scu_pinmux(2, 5, GPIO_PUP, FUNC4); /* nRESET: GPIO5[5] */
Pawel Zarembski 0:01f31e923fe2 62 scu_pinmux(2, 6, GPIO_NOPULL, FUNC4); /* nRESET_OE: GPIO5[6] */
Pawel Zarembski 0:01f31e923fe2 63 /* Configure: LED as output (turned off) */
Pawel Zarembski 0:01f31e923fe2 64 LPC_GPIO_PORT->CLR[LED_CONNECTED_PORT] = (1 << LED_CONNECTED_BIT);
Pawel Zarembski 0:01f31e923fe2 65 LPC_GPIO_PORT->DIR[LED_CONNECTED_PORT] |= (1 << LED_CONNECTED_BIT);
Pawel Zarembski 0:01f31e923fe2 66 /* Configure: ISPCTRL as output and high */
Pawel Zarembski 0:01f31e923fe2 67 LPC_GPIO_PORT->SET[ISPCTRL_PORT] = (1 << ISPCTRL_BIT);
Pawel Zarembski 0:01f31e923fe2 68 LPC_GPIO_PORT->DIR[ISPCTRL_PORT] |= (1 << ISPCTRL_BIT);
Pawel Zarembski 0:01f31e923fe2 69 /* configure Reset Button as input, Reset Output Enable as output LOW */
Pawel Zarembski 0:01f31e923fe2 70 LPC_GPIO_PORT->DIR[PORT_nRESET] &= ~(1 << PIN_nRESET_IN_BIT);
Pawel Zarembski 0:01f31e923fe2 71 LPC_GPIO_PORT->CLR[PORT_RESET_TXE] = (1 << PIN_RESET_TXE_IN_BIT);
Pawel Zarembski 0:01f31e923fe2 72 LPC_GPIO_PORT->DIR[PORT_RESET_TXE] |= (1 << PIN_RESET_TXE_IN_BIT);
Pawel Zarembski 0:01f31e923fe2 73 /* Use Pin Interrupt 0 */
Pawel Zarembski 0:01f31e923fe2 74 LPC_SCU->PINTSEL0 &= ~0xff;
Pawel Zarembski 0:01f31e923fe2 75 LPC_SCU->PINTSEL0 |= (PORT_nRESET << 5) | (PIN_nRESET_IN_BIT);
Pawel Zarembski 0:01f31e923fe2 76
Pawel Zarembski 0:01f31e923fe2 77 busy_wait(10000);
Pawel Zarembski 0:01f31e923fe2 78 }
Pawel Zarembski 0:01f31e923fe2 79
Pawel Zarembski 0:01f31e923fe2 80 void gpio_set_hid_led(gpio_led_state_t state)
Pawel Zarembski 0:01f31e923fe2 81 {
Pawel Zarembski 0:01f31e923fe2 82 if (state) {
Pawel Zarembski 0:01f31e923fe2 83 LPC_GPIO_PORT->SET[LED_CONNECTED_PORT] = (1 << LED_CONNECTED_BIT);
Pawel Zarembski 0:01f31e923fe2 84 } else {
Pawel Zarembski 0:01f31e923fe2 85 LPC_GPIO_PORT->CLR[LED_CONNECTED_PORT] = (1 << LED_CONNECTED_BIT);
Pawel Zarembski 0:01f31e923fe2 86 }
Pawel Zarembski 0:01f31e923fe2 87 }
Pawel Zarembski 0:01f31e923fe2 88
Pawel Zarembski 0:01f31e923fe2 89 void gpio_set_cdc_led(gpio_led_state_t state)
Pawel Zarembski 0:01f31e923fe2 90 {
Pawel Zarembski 0:01f31e923fe2 91 if (state) {
Pawel Zarembski 0:01f31e923fe2 92 LPC_GPIO_PORT->SET[LED_CONNECTED_PORT] = (1 << LED_CONNECTED_BIT);
Pawel Zarembski 0:01f31e923fe2 93 } else {
Pawel Zarembski 0:01f31e923fe2 94 LPC_GPIO_PORT->CLR[LED_CONNECTED_PORT] = (1 << LED_CONNECTED_BIT);
Pawel Zarembski 0:01f31e923fe2 95 }
Pawel Zarembski 0:01f31e923fe2 96 }
Pawel Zarembski 0:01f31e923fe2 97
Pawel Zarembski 0:01f31e923fe2 98 void gpio_set_msc_led(gpio_led_state_t state)
Pawel Zarembski 0:01f31e923fe2 99 {
Pawel Zarembski 0:01f31e923fe2 100 if (state) {
Pawel Zarembski 0:01f31e923fe2 101 LPC_GPIO_PORT->SET[LED_CONNECTED_PORT] = (1 << LED_CONNECTED_BIT);
Pawel Zarembski 0:01f31e923fe2 102 } else {
Pawel Zarembski 0:01f31e923fe2 103 LPC_GPIO_PORT->CLR[LED_CONNECTED_PORT] = (1 << LED_CONNECTED_BIT);
Pawel Zarembski 0:01f31e923fe2 104 }
Pawel Zarembski 0:01f31e923fe2 105 }
Pawel Zarembski 0:01f31e923fe2 106
Pawel Zarembski 0:01f31e923fe2 107 void gpio_set_isp_pin(uint8_t state)
Pawel Zarembski 0:01f31e923fe2 108 {
Pawel Zarembski 0:01f31e923fe2 109 if (state) {
Pawel Zarembski 0:01f31e923fe2 110 LPC_GPIO_PORT->SET[ISPCTRL_PORT] = (1 << ISPCTRL_BIT);
Pawel Zarembski 0:01f31e923fe2 111 } else {
Pawel Zarembski 0:01f31e923fe2 112 LPC_GPIO_PORT->CLR[ISPCTRL_PORT] = (1 << ISPCTRL_BIT);
Pawel Zarembski 0:01f31e923fe2 113 }
Pawel Zarembski 0:01f31e923fe2 114 }
Pawel Zarembski 0:01f31e923fe2 115
Pawel Zarembski 0:01f31e923fe2 116 uint8_t gpio_get_reset_btn_no_fwrd(void)
Pawel Zarembski 0:01f31e923fe2 117 {
Pawel Zarembski 0:01f31e923fe2 118 return LPC_GPIO_PORT->W[PORT_nRESET * 32 + PIN_nRESET_IN_BIT] ? 0 : 1;
Pawel Zarembski 0:01f31e923fe2 119 }
Pawel Zarembski 0:01f31e923fe2 120
Pawel Zarembski 0:01f31e923fe2 121 uint8_t gpio_get_reset_btn_fwrd(void)
Pawel Zarembski 0:01f31e923fe2 122 {
Pawel Zarembski 0:01f31e923fe2 123 return 0;
Pawel Zarembski 0:01f31e923fe2 124 }
Pawel Zarembski 0:01f31e923fe2 125
Pawel Zarembski 0:01f31e923fe2 126 void gpio_set_board_power(bool powerEnabled)
Pawel Zarembski 0:01f31e923fe2 127 {
Pawel Zarembski 0:01f31e923fe2 128 }