Arrow / Mbed OS DAPLink Reset

Repostiory containing DAPLink source code with Reset Pin workaround for HANI_IOT board.

Upstream: https://github.com/ARMmbed/DAPLink

source/hic_hal/nxp/lpc4322/board_LPC43xx.c@0:01f31e923fe2, 2020-04-07 (annotated)

Committer:
Pawel Zarembski
Date:
Tue Apr 07 12:55:42 2020 +0200
Revision:
0:01f31e923fe2
hani: DAPLink with reset workaround

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Pawel Zarembski 0:01f31e923fe2 1 /**
Pawel Zarembski 0:01f31e923fe2 2 * @file board_LPC43xx.c
Pawel Zarembski 0:01f31e923fe2 3 * @brief
Pawel Zarembski 0:01f31e923fe2 4 *
Pawel Zarembski 0:01f31e923fe2 5 * DAPLink Interface Firmware
Pawel Zarembski 0:01f31e923fe2 6 * Copyright (c) 2009-2016, ARM Limited, All Rights Reserved
Pawel Zarembski 0:01f31e923fe2 7 * SPDX-License-Identifier: Apache-2.0
Pawel Zarembski 0:01f31e923fe2 8 *
Pawel Zarembski 0:01f31e923fe2 9 * Licensed under the Apache License, Version 2.0 (the "License"); you may
Pawel Zarembski 0:01f31e923fe2 10 * not use this file except in compliance with the License.
Pawel Zarembski 0:01f31e923fe2 11 * You may obtain a copy of the License at
Pawel Zarembski 0:01f31e923fe2 12 *
Pawel Zarembski 0:01f31e923fe2 13 * http://www.apache.org/licenses/LICENSE-2.0
Pawel Zarembski 0:01f31e923fe2 14 *
Pawel Zarembski 0:01f31e923fe2 15 * Unless required by applicable law or agreed to in writing, software
Pawel Zarembski 0:01f31e923fe2 16 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
Pawel Zarembski 0:01f31e923fe2 17 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
Pawel Zarembski 0:01f31e923fe2 18 * See the License for the specific language governing permissions and
Pawel Zarembski 0:01f31e923fe2 19 * limitations under the License.
Pawel Zarembski 0:01f31e923fe2 20 */
Pawel Zarembski 0:01f31e923fe2 21
Pawel Zarembski 0:01f31e923fe2 22 #include "sdk.h"
Pawel Zarembski 0:01f31e923fe2 23 #include "lpc43xx_cgu.h"
Pawel Zarembski 0:01f31e923fe2 24
Pawel Zarembski 0:01f31e923fe2 25 void sdk_init(void)
Pawel Zarembski 0:01f31e923fe2 26 {
Pawel Zarembski 0:01f31e923fe2 27 /* Set core clock to 96MHz */
Pawel Zarembski 0:01f31e923fe2 28 CGU_Init(96000000);
Pawel Zarembski 0:01f31e923fe2 29 /* Set up USB0 clock */
Pawel Zarembski 0:01f31e923fe2 30 /* Disable PLL first */
Pawel Zarembski 0:01f31e923fe2 31 CGU_EnableEntity(CGU_CLKSRC_PLL0, DISABLE);
Pawel Zarembski 0:01f31e923fe2 32
Pawel Zarembski 0:01f31e923fe2 33 /* the usb core require output clock = 480MHz */
Pawel Zarembski 0:01f31e923fe2 34 if (CGU_SetPLL0() != CGU_ERROR_SUCCESS) {
Pawel Zarembski 0:01f31e923fe2 35 while (1);
Pawel Zarembski 0:01f31e923fe2 36 }
Pawel Zarembski 0:01f31e923fe2 37
Pawel Zarembski 0:01f31e923fe2 38 CGU_EntityConnect(CGU_CLKSRC_XTAL_OSC, CGU_CLKSRC_PLL0);
Pawel Zarembski 0:01f31e923fe2 39 /* Enable PLL after all setting is done */
Pawel Zarembski 0:01f31e923fe2 40 CGU_EnableEntity(CGU_CLKSRC_PLL0, ENABLE);
Pawel Zarembski 0:01f31e923fe2 41 /* Turn on the USB0PHY */
Pawel Zarembski 0:01f31e923fe2 42 LPC_CREG->CREG0 &= ~(1 << 5);
Pawel Zarembski 0:01f31e923fe2 43 }