Arrow / Mbed OS DAPLink Reset

Repostiory containing DAPLink source code with Reset Pin workaround for HANI_IOT board.

Upstream: https://github.com/ARMmbed/DAPLink

source/hic_hal/maxim/max32625/icc_regs.h@0:01f31e923fe2, 2020-04-07 (annotated)

Committer:
Pawel Zarembski
Date:
Tue Apr 07 12:55:42 2020 +0200
Revision:
0:01f31e923fe2
hani: DAPLink with reset workaround

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Pawel Zarembski 0:01f31e923fe2 1 /* ****************************************************************************
Pawel Zarembski 0:01f31e923fe2 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
Pawel Zarembski 0:01f31e923fe2 3 *
Pawel Zarembski 0:01f31e923fe2 4 * Permission is hereby granted, free of charge, to any person obtaining a
Pawel Zarembski 0:01f31e923fe2 5 * copy of this software and associated documentation files (the "Software"),
Pawel Zarembski 0:01f31e923fe2 6 * to deal in the Software without restriction, including without limitation
Pawel Zarembski 0:01f31e923fe2 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
Pawel Zarembski 0:01f31e923fe2 8 * and/or sell copies of the Software, and to permit persons to whom the
Pawel Zarembski 0:01f31e923fe2 9 * Software is furnished to do so, subject to the following conditions:
Pawel Zarembski 0:01f31e923fe2 10 *
Pawel Zarembski 0:01f31e923fe2 11 * The above copyright notice and this permission notice shall be included
Pawel Zarembski 0:01f31e923fe2 12 * in all copies or substantial portions of the Software.
Pawel Zarembski 0:01f31e923fe2 13 *
Pawel Zarembski 0:01f31e923fe2 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
Pawel Zarembski 0:01f31e923fe2 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
Pawel Zarembski 0:01f31e923fe2 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
Pawel Zarembski 0:01f31e923fe2 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
Pawel Zarembski 0:01f31e923fe2 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
Pawel Zarembski 0:01f31e923fe2 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
Pawel Zarembski 0:01f31e923fe2 20 * OTHER DEALINGS IN THE SOFTWARE.
Pawel Zarembski 0:01f31e923fe2 21 *
Pawel Zarembski 0:01f31e923fe2 22 * Except as contained in this notice, the name of Maxim Integrated
Pawel Zarembski 0:01f31e923fe2 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
Pawel Zarembski 0:01f31e923fe2 24 * Products, Inc. Branding Policy.
Pawel Zarembski 0:01f31e923fe2 25 *
Pawel Zarembski 0:01f31e923fe2 26 * The mere transfer of this software does not imply any licenses
Pawel Zarembski 0:01f31e923fe2 27 * of trade secrets, proprietary technology, copyrights, patents,
Pawel Zarembski 0:01f31e923fe2 28 * trademarks, maskwork rights, or any other form of intellectual
Pawel Zarembski 0:01f31e923fe2 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
Pawel Zarembski 0:01f31e923fe2 30 * ownership rights.
Pawel Zarembski 0:01f31e923fe2 31 *
Pawel Zarembski 0:01f31e923fe2 32 *************************************************************************** */
Pawel Zarembski 0:01f31e923fe2 33
Pawel Zarembski 0:01f31e923fe2 34 /* Define to prevent redundant inclusion */
Pawel Zarembski 0:01f31e923fe2 35 #ifndef _MXC_ICC_REGS_H_
Pawel Zarembski 0:01f31e923fe2 36 #define _MXC_ICC_REGS_H_
Pawel Zarembski 0:01f31e923fe2 37
Pawel Zarembski 0:01f31e923fe2 38 /* **** Includes **** */
Pawel Zarembski 0:01f31e923fe2 39 #include <stdint.h>
Pawel Zarembski 0:01f31e923fe2 40
Pawel Zarembski 0:01f31e923fe2 41 #ifdef __cplusplus
Pawel Zarembski 0:01f31e923fe2 42 extern "C" {
Pawel Zarembski 0:01f31e923fe2 43 #endif
Pawel Zarembski 0:01f31e923fe2 44
Pawel Zarembski 0:01f31e923fe2 45 /// @cond
Pawel Zarembski 0:01f31e923fe2 46 /*
Pawel Zarembski 0:01f31e923fe2 47 If types are not defined elsewhere (CMSIS) define them here
Pawel Zarembski 0:01f31e923fe2 48 */
Pawel Zarembski 0:01f31e923fe2 49 #ifndef __IO
Pawel Zarembski 0:01f31e923fe2 50 #define __IO volatile
Pawel Zarembski 0:01f31e923fe2 51 #endif
Pawel Zarembski 0:01f31e923fe2 52 #ifndef __I
Pawel Zarembski 0:01f31e923fe2 53 #define __I volatile const
Pawel Zarembski 0:01f31e923fe2 54 #endif
Pawel Zarembski 0:01f31e923fe2 55 #ifndef __O
Pawel Zarembski 0:01f31e923fe2 56 #define __O volatile
Pawel Zarembski 0:01f31e923fe2 57 #endif
Pawel Zarembski 0:01f31e923fe2 58 #ifndef __R
Pawel Zarembski 0:01f31e923fe2 59 #define __R volatile const
Pawel Zarembski 0:01f31e923fe2 60 #endif
Pawel Zarembski 0:01f31e923fe2 61 ///@endcond
Pawel Zarembski 0:01f31e923fe2 62
Pawel Zarembski 0:01f31e923fe2 63 /* **** Definitions **** */
Pawel Zarembski 0:01f31e923fe2 64
Pawel Zarembski 0:01f31e923fe2 65 /**
Pawel Zarembski 0:01f31e923fe2 66 * @defgroup icc_registers Registers
Pawel Zarembski 0:01f31e923fe2 67 * @brief Registers, Bit Masks and Bit Positions for the ICC.
Pawel Zarembski 0:01f31e923fe2 68 * @ingroup icc
Pawel Zarembski 0:01f31e923fe2 69 * @{
Pawel Zarembski 0:01f31e923fe2 70 */
Pawel Zarembski 0:01f31e923fe2 71
Pawel Zarembski 0:01f31e923fe2 72 /**
Pawel Zarembski 0:01f31e923fe2 73 * Structure type to access the ICC Registers.
Pawel Zarembski 0:01f31e923fe2 74 */
Pawel Zarembski 0:01f31e923fe2 75 typedef struct {
Pawel Zarembski 0:01f31e923fe2 76 __IO uint32_t id; /**< <tt>\b 0x0000: </tt> ICC_ID Register \warning INTERNAL USE ONLY, DO NOT MODIFY */
Pawel Zarembski 0:01f31e923fe2 77 __IO uint32_t mem_cfg; /**< <tt>\b 0x0004: </tt> ICC_MEM_CFG Register */
Pawel Zarembski 0:01f31e923fe2 78 __R uint32_t rsv008[62]; /**< <tt>\b 0x0008-0x00FC: </tt> RESERVED */
Pawel Zarembski 0:01f31e923fe2 79 __IO uint32_t ctrl_stat; /**< <tt>\b 0x0100: </tt> ICC_CTRL_STAT Register */
Pawel Zarembski 0:01f31e923fe2 80 __R uint32_t rsv104[383]; /**< <tt>\b 0x0104-0x06FC: </tt> RESERVED */
Pawel Zarembski 0:01f31e923fe2 81 __IO uint32_t invdt_all; /**< <tt>\b 0x0700: </tt> ICC_INVDT_ALL Register */
Pawel Zarembski 0:01f31e923fe2 82 } mxc_icc_regs_t;
Pawel Zarembski 0:01f31e923fe2 83 /**@} end of group icc_registers*/
Pawel Zarembski 0:01f31e923fe2 84
Pawel Zarembski 0:01f31e923fe2 85 /*
Pawel Zarembski 0:01f31e923fe2 86 Register offsets for module ICC.
Pawel Zarembski 0:01f31e923fe2 87 */
Pawel Zarembski 0:01f31e923fe2 88 /**
Pawel Zarembski 0:01f31e923fe2 89 * @defgroup ICC_Register_Offsets Register Offsets
Pawel Zarembski 0:01f31e923fe2 90 * @ingroup icc_registers
Pawel Zarembski 0:01f31e923fe2 91 * @brief Instruction Cache Controller Register Offsets from the ICC Base Address.
Pawel Zarembski 0:01f31e923fe2 92 * @{
Pawel Zarembski 0:01f31e923fe2 93 */
Pawel Zarembski 0:01f31e923fe2 94 #define MXC_R_ICC_OFFS_ID ((uint32_t)0x00000000UL) /**< Offset from ICC Base Address: <tt>\b 0x0000</tt> */
Pawel Zarembski 0:01f31e923fe2 95 #define MXC_R_ICC_OFFS_MEM_CFG ((uint32_t)0x00000004UL) /**< Offset from ICC Base Address: <tt>\b 0x0004</tt> */
Pawel Zarembski 0:01f31e923fe2 96 #define MXC_R_ICC_OFFS_CTRL_STAT ((uint32_t)0x00000100UL) /**< Offset from ICC Base Address: <tt>\b 0x0100</tt> */
Pawel Zarembski 0:01f31e923fe2 97 #define MXC_R_ICC_OFFS_INVDT_ALL ((uint32_t)0x00000700UL) /**< Offset from ICC Base Address: <tt>\b 0x0700</tt> */
Pawel Zarembski 0:01f31e923fe2 98 /**@} end of group icc_registers */
Pawel Zarembski 0:01f31e923fe2 99
Pawel Zarembski 0:01f31e923fe2 100 /*
Pawel Zarembski 0:01f31e923fe2 101 Field positions and masks for module ICC.
Pawel Zarembski 0:01f31e923fe2 102 */
Pawel Zarembski 0:01f31e923fe2 103 /**
Pawel Zarembski 0:01f31e923fe2 104 * @defgroup ICC_ID_Register ICC_ID
Pawel Zarembski 0:01f31e923fe2 105 * @brief Field Positions and Bit Masks for the ICC_ID register
Pawel Zarembski 0:01f31e923fe2 106 * @ingroup icc_registers
Pawel Zarembski 0:01f31e923fe2 107 * @{
Pawel Zarembski 0:01f31e923fe2 108 */
Pawel Zarembski 0:01f31e923fe2 109 #define MXC_F_ICC_ID_RTL_VERSION_POS 0 /**< RTL_VERSION Position */
Pawel Zarembski 0:01f31e923fe2 110 #define MXC_F_ICC_ID_RTL_VERSION ((uint32_t)(0x0000003FUL << MXC_F_ICC_ID_RTL_VERSION_POS)) /**< RTL_VERSION Mask */
Pawel Zarembski 0:01f31e923fe2 111 #define MXC_F_ICC_ID_PART_NUM_POS 6 /**< PART_NUM Position */
Pawel Zarembski 0:01f31e923fe2 112 #define MXC_F_ICC_ID_PART_NUM ((uint32_t)(0x0000000FUL << MXC_F_ICC_ID_PART_NUM_POS)) /**< PART_NUM Mask */
Pawel Zarembski 0:01f31e923fe2 113 #define MXC_F_ICC_ID_CACHE_ID_POS 10 /**< CACHE_ID Position */
Pawel Zarembski 0:01f31e923fe2 114 #define MXC_F_ICC_ID_CACHE_ID ((uint32_t)(0x0000003FUL << MXC_F_ICC_ID_CACHE_ID_POS)) /**< CACHE_ID Mask */
Pawel Zarembski 0:01f31e923fe2 115 /**@} end of group ICC_ID_register */
Pawel Zarembski 0:01f31e923fe2 116 /**
Pawel Zarembski 0:01f31e923fe2 117 * @defgroup ICC_MEM_CFG_Register ICC_MEM_CFG
Pawel Zarembski 0:01f31e923fe2 118 * @brief Field Positions and Bit Masks for the ICC_MEM_CFG register
Pawel Zarembski 0:01f31e923fe2 119 * @ingroup icc_registers
Pawel Zarembski 0:01f31e923fe2 120 * @{
Pawel Zarembski 0:01f31e923fe2 121 */
Pawel Zarembski 0:01f31e923fe2 122 #define MXC_F_ICC_MEM_CFG_CACHE_SIZE_POS 0 /**< CACHE_SIZE Position */
Pawel Zarembski 0:01f31e923fe2 123 #define MXC_F_ICC_MEM_CFG_CACHE_SIZE ((uint32_t)(0x0000FFFFUL << MXC_F_ICC_MEM_CFG_CACHE_SIZE_POS)) /**< CACHE_SIZE Mask */
Pawel Zarembski 0:01f31e923fe2 124 #define MXC_F_ICC_MEM_CFG_MAIN_MEMORY_SIZE_POS 16 /**< MAIN_MEMORY_SIZE Position */
Pawel Zarembski 0:01f31e923fe2 125 #define MXC_F_ICC_MEM_CFG_MAIN_MEMORY_SIZE ((uint32_t)(0x0000FFFFUL << MXC_F_ICC_MEM_CFG_MAIN_MEMORY_SIZE_POS)) /**< MAIN_MEMORY_SIZE Mask */
Pawel Zarembski 0:01f31e923fe2 126 /**@} end of group ICC_MEM_CFG_register */
Pawel Zarembski 0:01f31e923fe2 127 /**
Pawel Zarembski 0:01f31e923fe2 128 * @defgroup ICC_CTRL_STAT_Register ICC_CTRL_STAT
Pawel Zarembski 0:01f31e923fe2 129 * @brief Field Positions and Bit Masks for the ICC_CTRL_STAT register
Pawel Zarembski 0:01f31e923fe2 130 * @ingroup icc_registers
Pawel Zarembski 0:01f31e923fe2 131 * @{
Pawel Zarembski 0:01f31e923fe2 132 */
Pawel Zarembski 0:01f31e923fe2 133 #define MXC_F_ICC_CTRL_STAT_ENABLE_POS 0 /**< ENABLE Position */
Pawel Zarembski 0:01f31e923fe2 134 #define MXC_F_ICC_CTRL_STAT_ENABLE ((uint32_t)(0x00000001UL << MXC_F_ICC_CTRL_STAT_ENABLE_POS)) /**< ENABLE Mask */
Pawel Zarembski 0:01f31e923fe2 135 #define MXC_F_ICC_CTRL_STAT_READY_POS 16 /**< READY Position */
Pawel Zarembski 0:01f31e923fe2 136 #define MXC_F_ICC_CTRL_STAT_READY ((uint32_t)(0x00000001UL << MXC_F_ICC_CTRL_STAT_READY_POS)) /**< READY Mask */
Pawel Zarembski 0:01f31e923fe2 137 /**@} end of group ICC_CTRL_STAT_register */
Pawel Zarembski 0:01f31e923fe2 138
Pawel Zarembski 0:01f31e923fe2 139 #ifdef __cplusplus
Pawel Zarembski 0:01f31e923fe2 140 }
Pawel Zarembski 0:01f31e923fe2 141 #endif
Pawel Zarembski 0:01f31e923fe2 142
Pawel Zarembski 0:01f31e923fe2 143 #endif /* _MXC_ICC_REGS_H_ */