Arrow / Mbed OS DAPLink Reset

Repostiory containing DAPLink source code with Reset Pin workaround for HANI_IOT board.

Upstream: https://github.com/ARMmbed/DAPLink

source/hic_hal/maxim/max32620/tmr_regs.h@0:01f31e923fe2, 2020-04-07 (annotated)

Committer:
Pawel Zarembski
Date:
Tue Apr 07 12:55:42 2020 +0200
Revision:
0:01f31e923fe2
hani: DAPLink with reset workaround

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Pawel Zarembski 0:01f31e923fe2 1 /*******************************************************************************
Pawel Zarembski 0:01f31e923fe2 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
Pawel Zarembski 0:01f31e923fe2 3 *
Pawel Zarembski 0:01f31e923fe2 4 * Permission is hereby granted, free of charge, to any person obtaining a
Pawel Zarembski 0:01f31e923fe2 5 * copy of this software and associated documentation files (the "Software"),
Pawel Zarembski 0:01f31e923fe2 6 * to deal in the Software without restriction, including without limitation
Pawel Zarembski 0:01f31e923fe2 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
Pawel Zarembski 0:01f31e923fe2 8 * and/or sell copies of the Software, and to permit persons to whom the
Pawel Zarembski 0:01f31e923fe2 9 * Software is furnished to do so, subject to the following conditions:
Pawel Zarembski 0:01f31e923fe2 10 *
Pawel Zarembski 0:01f31e923fe2 11 * The above copyright notice and this permission notice shall be included
Pawel Zarembski 0:01f31e923fe2 12 * in all copies or substantial portions of the Software.
Pawel Zarembski 0:01f31e923fe2 13 *
Pawel Zarembski 0:01f31e923fe2 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
Pawel Zarembski 0:01f31e923fe2 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
Pawel Zarembski 0:01f31e923fe2 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
Pawel Zarembski 0:01f31e923fe2 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
Pawel Zarembski 0:01f31e923fe2 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
Pawel Zarembski 0:01f31e923fe2 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
Pawel Zarembski 0:01f31e923fe2 20 * OTHER DEALINGS IN THE SOFTWARE.
Pawel Zarembski 0:01f31e923fe2 21 *
Pawel Zarembski 0:01f31e923fe2 22 * Except as contained in this notice, the name of Maxim Integrated
Pawel Zarembski 0:01f31e923fe2 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
Pawel Zarembski 0:01f31e923fe2 24 * Products, Inc. Branding Policy.
Pawel Zarembski 0:01f31e923fe2 25 *
Pawel Zarembski 0:01f31e923fe2 26 * The mere transfer of this software does not imply any licenses
Pawel Zarembski 0:01f31e923fe2 27 * of trade secrets, proprietary technology, copyrights, patents,
Pawel Zarembski 0:01f31e923fe2 28 * trademarks, maskwork rights, or any other form of intellectual
Pawel Zarembski 0:01f31e923fe2 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
Pawel Zarembski 0:01f31e923fe2 30 * ownership rights.
Pawel Zarembski 0:01f31e923fe2 31 *
Pawel Zarembski 0:01f31e923fe2 32 ******************************************************************************/
Pawel Zarembski 0:01f31e923fe2 33
Pawel Zarembski 0:01f31e923fe2 34 #ifndef _MXC_TMR_REGS_H_
Pawel Zarembski 0:01f31e923fe2 35 #define _MXC_TMR_REGS_H_
Pawel Zarembski 0:01f31e923fe2 36
Pawel Zarembski 0:01f31e923fe2 37 #ifdef __cplusplus
Pawel Zarembski 0:01f31e923fe2 38 extern "C" {
Pawel Zarembski 0:01f31e923fe2 39 #endif
Pawel Zarembski 0:01f31e923fe2 40
Pawel Zarembski 0:01f31e923fe2 41 #include <stdint.h>
Pawel Zarembski 0:01f31e923fe2 42
Pawel Zarembski 0:01f31e923fe2 43 /*
Pawel Zarembski 0:01f31e923fe2 44 If types are not defined elsewhere (CMSIS) define them here
Pawel Zarembski 0:01f31e923fe2 45 */
Pawel Zarembski 0:01f31e923fe2 46 #ifndef __IO
Pawel Zarembski 0:01f31e923fe2 47 #define __IO volatile
Pawel Zarembski 0:01f31e923fe2 48 #endif
Pawel Zarembski 0:01f31e923fe2 49 #ifndef __I
Pawel Zarembski 0:01f31e923fe2 50 #define __I volatile const
Pawel Zarembski 0:01f31e923fe2 51 #endif
Pawel Zarembski 0:01f31e923fe2 52 #ifndef __O
Pawel Zarembski 0:01f31e923fe2 53 #define __O volatile
Pawel Zarembski 0:01f31e923fe2 54 #endif
Pawel Zarembski 0:01f31e923fe2 55 #ifndef __R
Pawel Zarembski 0:01f31e923fe2 56 #define __R volatile const
Pawel Zarembski 0:01f31e923fe2 57 #endif
Pawel Zarembski 0:01f31e923fe2 58
Pawel Zarembski 0:01f31e923fe2 59
Pawel Zarembski 0:01f31e923fe2 60 /*
Pawel Zarembski 0:01f31e923fe2 61 Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
Pawel Zarembski 0:01f31e923fe2 62 access to each register in module.
Pawel Zarembski 0:01f31e923fe2 63 */
Pawel Zarembski 0:01f31e923fe2 64
Pawel Zarembski 0:01f31e923fe2 65 /* Offset Register Description
Pawel Zarembski 0:01f31e923fe2 66 ============= ============================================================================ */
Pawel Zarembski 0:01f31e923fe2 67 typedef struct {
Pawel Zarembski 0:01f31e923fe2 68 __IO uint32_t ctrl; /* 0x0000 Timer Control Register */
Pawel Zarembski 0:01f31e923fe2 69 __IO uint32_t count32; /* 0x0004 Timer [32 bit] Current Count Value */
Pawel Zarembski 0:01f31e923fe2 70 __IO uint32_t term_cnt32; /* 0x0008 Timer [32 bit] Terminal Count Setting */
Pawel Zarembski 0:01f31e923fe2 71 __IO uint32_t pwm_cap32; /* 0x000C Timer [32 bit] PWM Compare Setting or Capture/Measure Value */
Pawel Zarembski 0:01f31e923fe2 72 __IO uint32_t count16_0; /* 0x0010 Timer [16 bit] Current Count Value, 16-bit Timer 0 */
Pawel Zarembski 0:01f31e923fe2 73 __IO uint32_t term_cnt16_0; /* 0x0014 Timer [16 bit] Terminal Count Setting, 16-bit Timer 0 */
Pawel Zarembski 0:01f31e923fe2 74 __IO uint32_t count16_1; /* 0x0018 Timer [16 bit] Current Count Value, 16-bit Timer 1 */
Pawel Zarembski 0:01f31e923fe2 75 __IO uint32_t term_cnt16_1; /* 0x001C Timer [16 bit] Terminal Count Setting, 16-bit Timer 1 */
Pawel Zarembski 0:01f31e923fe2 76 __IO uint32_t intfl; /* 0x0020 Timer Interrupt Flags */
Pawel Zarembski 0:01f31e923fe2 77 __IO uint32_t inten; /* 0x0024 Timer Interrupt Enable/Disable Settings */
Pawel Zarembski 0:01f31e923fe2 78 } mxc_tmr_regs_t;
Pawel Zarembski 0:01f31e923fe2 79
Pawel Zarembski 0:01f31e923fe2 80
Pawel Zarembski 0:01f31e923fe2 81 /*
Pawel Zarembski 0:01f31e923fe2 82 Register offsets for module TMR.
Pawel Zarembski 0:01f31e923fe2 83 */
Pawel Zarembski 0:01f31e923fe2 84
Pawel Zarembski 0:01f31e923fe2 85 #define MXC_R_TMR_OFFS_CTRL ((uint32_t)0x00000000UL)
Pawel Zarembski 0:01f31e923fe2 86 #define MXC_R_TMR_OFFS_COUNT32 ((uint32_t)0x00000004UL)
Pawel Zarembski 0:01f31e923fe2 87 #define MXC_R_TMR_OFFS_TERM_CNT32 ((uint32_t)0x00000008UL)
Pawel Zarembski 0:01f31e923fe2 88 #define MXC_R_TMR_OFFS_PWM_CAP32 ((uint32_t)0x0000000CUL)
Pawel Zarembski 0:01f31e923fe2 89 #define MXC_R_TMR_OFFS_COUNT16_0 ((uint32_t)0x00000010UL)
Pawel Zarembski 0:01f31e923fe2 90 #define MXC_R_TMR_OFFS_TERM_CNT16_0 ((uint32_t)0x00000014UL)
Pawel Zarembski 0:01f31e923fe2 91 #define MXC_R_TMR_OFFS_COUNT16_1 ((uint32_t)0x00000018UL)
Pawel Zarembski 0:01f31e923fe2 92 #define MXC_R_TMR_OFFS_TERM_CNT16_1 ((uint32_t)0x0000001CUL)
Pawel Zarembski 0:01f31e923fe2 93 #define MXC_R_TMR_OFFS_INTFL ((uint32_t)0x00000020UL)
Pawel Zarembski 0:01f31e923fe2 94 #define MXC_R_TMR_OFFS_INTEN ((uint32_t)0x00000024UL)
Pawel Zarembski 0:01f31e923fe2 95
Pawel Zarembski 0:01f31e923fe2 96
Pawel Zarembski 0:01f31e923fe2 97 /*
Pawel Zarembski 0:01f31e923fe2 98 Field positions and masks for module TMR.
Pawel Zarembski 0:01f31e923fe2 99 */
Pawel Zarembski 0:01f31e923fe2 100
Pawel Zarembski 0:01f31e923fe2 101 #define MXC_F_TMR_CTRL_MODE_POS 0
Pawel Zarembski 0:01f31e923fe2 102 #define MXC_F_TMR_CTRL_MODE ((uint32_t)(0x00000007UL << MXC_F_TMR_CTRL_MODE_POS))
Pawel Zarembski 0:01f31e923fe2 103 #define MXC_F_TMR_CTRL_TMR2X16_POS 3
Pawel Zarembski 0:01f31e923fe2 104 #define MXC_F_TMR_CTRL_TMR2X16 ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_TMR2X16_POS))
Pawel Zarembski 0:01f31e923fe2 105 #define MXC_F_TMR_CTRL_PRESCALE_POS 4
Pawel Zarembski 0:01f31e923fe2 106 #define MXC_F_TMR_CTRL_PRESCALE ((uint32_t)(0x0000000FUL << MXC_F_TMR_CTRL_PRESCALE_POS))
Pawel Zarembski 0:01f31e923fe2 107 #define MXC_F_TMR_CTRL_POLARITY_POS 8
Pawel Zarembski 0:01f31e923fe2 108 #define MXC_F_TMR_CTRL_POLARITY ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_POLARITY_POS))
Pawel Zarembski 0:01f31e923fe2 109 #define MXC_F_TMR_CTRL_ENABLE0_POS 12
Pawel Zarembski 0:01f31e923fe2 110 #define MXC_F_TMR_CTRL_ENABLE0 ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_ENABLE0_POS))
Pawel Zarembski 0:01f31e923fe2 111 #define MXC_F_TMR_CTRL_ENABLE1_POS 13
Pawel Zarembski 0:01f31e923fe2 112 #define MXC_F_TMR_CTRL_ENABLE1 ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_ENABLE1_POS))
Pawel Zarembski 0:01f31e923fe2 113
Pawel Zarembski 0:01f31e923fe2 114 #define MXC_F_TMR_COUNT16_0_VALUE_POS 0
Pawel Zarembski 0:01f31e923fe2 115 #define MXC_F_TMR_COUNT16_0_VALUE ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_COUNT16_0_VALUE_POS))
Pawel Zarembski 0:01f31e923fe2 116
Pawel Zarembski 0:01f31e923fe2 117 #define MXC_F_TMR_TERM_CNT16_0_TERM_COUNT_POS 0
Pawel Zarembski 0:01f31e923fe2 118 #define MXC_F_TMR_TERM_CNT16_0_TERM_COUNT ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_TERM_CNT16_0_TERM_COUNT_POS))
Pawel Zarembski 0:01f31e923fe2 119
Pawel Zarembski 0:01f31e923fe2 120 #define MXC_F_TMR_COUNT16_1_VALUE_POS 0
Pawel Zarembski 0:01f31e923fe2 121 #define MXC_F_TMR_COUNT16_1_VALUE ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_COUNT16_1_VALUE_POS))
Pawel Zarembski 0:01f31e923fe2 122
Pawel Zarembski 0:01f31e923fe2 123 #define MXC_F_TMR_TERM_CNT16_1_TERM_COUNT_POS 0
Pawel Zarembski 0:01f31e923fe2 124 #define MXC_F_TMR_TERM_CNT16_1_TERM_COUNT ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_TERM_CNT16_1_TERM_COUNT_POS))
Pawel Zarembski 0:01f31e923fe2 125
Pawel Zarembski 0:01f31e923fe2 126 #define MXC_F_TMR_INTFL_TIMER0_POS 0
Pawel Zarembski 0:01f31e923fe2 127 #define MXC_F_TMR_INTFL_TIMER0 ((uint32_t)(0x00000001UL << MXC_F_TMR_INTFL_TIMER0_POS))
Pawel Zarembski 0:01f31e923fe2 128 #define MXC_F_TMR_INTFL_TIMER1_POS 1
Pawel Zarembski 0:01f31e923fe2 129 #define MXC_F_TMR_INTFL_TIMER1 ((uint32_t)(0x00000001UL << MXC_F_TMR_INTFL_TIMER1_POS))
Pawel Zarembski 0:01f31e923fe2 130
Pawel Zarembski 0:01f31e923fe2 131 #define MXC_F_TMR_INTEN_TIMER0_POS 0
Pawel Zarembski 0:01f31e923fe2 132 #define MXC_F_TMR_INTEN_TIMER0 ((uint32_t)(0x00000001UL << MXC_F_TMR_INTEN_TIMER0_POS))
Pawel Zarembski 0:01f31e923fe2 133 #define MXC_F_TMR_INTEN_TIMER1_POS 1
Pawel Zarembski 0:01f31e923fe2 134 #define MXC_F_TMR_INTEN_TIMER1 ((uint32_t)(0x00000001UL << MXC_F_TMR_INTEN_TIMER1_POS))
Pawel Zarembski 0:01f31e923fe2 135
Pawel Zarembski 0:01f31e923fe2 136
Pawel Zarembski 0:01f31e923fe2 137
Pawel Zarembski 0:01f31e923fe2 138 /*
Pawel Zarembski 0:01f31e923fe2 139 Field values and shifted values for module TMR.
Pawel Zarembski 0:01f31e923fe2 140 */
Pawel Zarembski 0:01f31e923fe2 141
Pawel Zarembski 0:01f31e923fe2 142 #define MXC_V_TMR_CTRL_MODE_ONE_SHOT ((uint32_t)(0x00000000UL))
Pawel Zarembski 0:01f31e923fe2 143 #define MXC_V_TMR_CTRL_MODE_CONTINUOUS ((uint32_t)(0x00000001UL))
Pawel Zarembski 0:01f31e923fe2 144 #define MXC_V_TMR_CTRL_MODE_COUNTER ((uint32_t)(0x00000002UL))
Pawel Zarembski 0:01f31e923fe2 145 #define MXC_V_TMR_CTRL_MODE_PWM ((uint32_t)(0x00000003UL))
Pawel Zarembski 0:01f31e923fe2 146 #define MXC_V_TMR_CTRL_MODE_CAPTURE ((uint32_t)(0x00000004UL))
Pawel Zarembski 0:01f31e923fe2 147 #define MXC_V_TMR_CTRL_MODE_COMPARE ((uint32_t)(0x00000005UL))
Pawel Zarembski 0:01f31e923fe2 148 #define MXC_V_TMR_CTRL_MODE_GATED ((uint32_t)(0x00000006UL))
Pawel Zarembski 0:01f31e923fe2 149 #define MXC_V_TMR_CTRL_MODE_MEASURE ((uint32_t)(0x00000007UL))
Pawel Zarembski 0:01f31e923fe2 150
Pawel Zarembski 0:01f31e923fe2 151 #define MXC_S_TMR_CTRL_MODE_ONE_SHOT ((uint32_t)(MXC_V_TMR_CTRL_MODE_ONE_SHOT << MXC_F_TMR_CTRL_MODE_POS))
Pawel Zarembski 0:01f31e923fe2 152 #define MXC_S_TMR_CTRL_MODE_CONTINUOUS ((uint32_t)(MXC_V_TMR_CTRL_MODE_CONTINUOUS << MXC_F_TMR_CTRL_MODE_POS))
Pawel Zarembski 0:01f31e923fe2 153 #define MXC_S_TMR_CTRL_MODE_COUNTER ((uint32_t)(MXC_V_TMR_CTRL_MODE_COUNTER << MXC_F_TMR_CTRL_MODE_POS))
Pawel Zarembski 0:01f31e923fe2 154 #define MXC_S_TMR_CTRL_MODE_PWM ((uint32_t)(MXC_V_TMR_CTRL_MODE_PWM << MXC_F_TMR_CTRL_MODE_POS))
Pawel Zarembski 0:01f31e923fe2 155 #define MXC_S_TMR_CTRL_MODE_CAPTURE ((uint32_t)(MXC_V_TMR_CTRL_MODE_CAPTURE << MXC_F_TMR_CTRL_MODE_POS))
Pawel Zarembski 0:01f31e923fe2 156 #define MXC_S_TMR_CTRL_MODE_COMPARE ((uint32_t)(MXC_V_TMR_CTRL_MODE_COMPARE << MXC_F_TMR_CTRL_MODE_POS))
Pawel Zarembski 0:01f31e923fe2 157 #define MXC_S_TMR_CTRL_MODE_GATED ((uint32_t)(MXC_V_TMR_CTRL_MODE_GATED << MXC_F_TMR_CTRL_MODE_POS))
Pawel Zarembski 0:01f31e923fe2 158 #define MXC_S_TMR_CTRL_MODE_MEASURE ((uint32_t)(MXC_V_TMR_CTRL_MODE_MEASURE << MXC_F_TMR_CTRL_MODE_POS))
Pawel Zarembski 0:01f31e923fe2 159
Pawel Zarembski 0:01f31e923fe2 160 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_1 ((uint32_t)(0x00000000UL))
Pawel Zarembski 0:01f31e923fe2 161 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_2 ((uint32_t)(0x00000001UL))
Pawel Zarembski 0:01f31e923fe2 162 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_4 ((uint32_t)(0x00000002UL))
Pawel Zarembski 0:01f31e923fe2 163 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_8 ((uint32_t)(0x00000003UL))
Pawel Zarembski 0:01f31e923fe2 164 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_16 ((uint32_t)(0x00000004UL))
Pawel Zarembski 0:01f31e923fe2 165 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_32 ((uint32_t)(0x00000005UL))
Pawel Zarembski 0:01f31e923fe2 166 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_64 ((uint32_t)(0x00000006UL))
Pawel Zarembski 0:01f31e923fe2 167 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_128 ((uint32_t)(0x00000007UL))
Pawel Zarembski 0:01f31e923fe2 168 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_256 ((uint32_t)(0x00000008UL))
Pawel Zarembski 0:01f31e923fe2 169 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_512 ((uint32_t)(0x00000009UL))
Pawel Zarembski 0:01f31e923fe2 170 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_1024 ((uint32_t)(0x0000000AUL))
Pawel Zarembski 0:01f31e923fe2 171 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_2048 ((uint32_t)(0x0000000BUL))
Pawel Zarembski 0:01f31e923fe2 172 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_4096 ((uint32_t)(0x0000000CUL))
Pawel Zarembski 0:01f31e923fe2 173
Pawel Zarembski 0:01f31e923fe2 174 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_1 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_1 << MXC_F_TMR_CTRL_PRESCALE_POS))
Pawel Zarembski 0:01f31e923fe2 175 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_2 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_2 << MXC_F_TMR_CTRL_PRESCALE_POS))
Pawel Zarembski 0:01f31e923fe2 176 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_4 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_4 << MXC_F_TMR_CTRL_PRESCALE_POS))
Pawel Zarembski 0:01f31e923fe2 177 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_8 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_8 << MXC_F_TMR_CTRL_PRESCALE_POS))
Pawel Zarembski 0:01f31e923fe2 178 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_16 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_16 << MXC_F_TMR_CTRL_PRESCALE_POS))
Pawel Zarembski 0:01f31e923fe2 179 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_32 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_32 << MXC_F_TMR_CTRL_PRESCALE_POS))
Pawel Zarembski 0:01f31e923fe2 180 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_64 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_64 << MXC_F_TMR_CTRL_PRESCALE_POS))
Pawel Zarembski 0:01f31e923fe2 181 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_128 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_128 << MXC_F_TMR_CTRL_PRESCALE_POS))
Pawel Zarembski 0:01f31e923fe2 182 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_256 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_256 << MXC_F_TMR_CTRL_PRESCALE_POS))
Pawel Zarembski 0:01f31e923fe2 183 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_512 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_512 << MXC_F_TMR_CTRL_PRESCALE_POS))
Pawel Zarembski 0:01f31e923fe2 184 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_1024 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_1024 << MXC_F_TMR_CTRL_PRESCALE_POS))
Pawel Zarembski 0:01f31e923fe2 185 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_2048 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_2048 << MXC_F_TMR_CTRL_PRESCALE_POS))
Pawel Zarembski 0:01f31e923fe2 186 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_4096 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_4096 << MXC_F_TMR_CTRL_PRESCALE_POS))
Pawel Zarembski 0:01f31e923fe2 187
Pawel Zarembski 0:01f31e923fe2 188
Pawel Zarembski 0:01f31e923fe2 189 /*
Pawel Zarembski 0:01f31e923fe2 190 * These two 1-bit fields replace the standard 3-bit mode field when the associated TMR module
Pawel Zarembski 0:01f31e923fe2 191 * is in dual 16-bit timer mode.
Pawel Zarembski 0:01f31e923fe2 192 */
Pawel Zarembski 0:01f31e923fe2 193
Pawel Zarembski 0:01f31e923fe2 194 #define MXC_F_TMR_CTRL_MODE_16_0_POS 0
Pawel Zarembski 0:01f31e923fe2 195 #define MXC_F_TMR_CTRL_MODE_16_0 ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_MODE_16_0_POS))
Pawel Zarembski 0:01f31e923fe2 196
Pawel Zarembski 0:01f31e923fe2 197 #define MXC_F_TMR_CTRL_MODE_16_1_POS 1
Pawel Zarembski 0:01f31e923fe2 198 #define MXC_F_TMR_CTRL_MODE_16_1 ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_MODE_16_1_POS))
Pawel Zarembski 0:01f31e923fe2 199
Pawel Zarembski 0:01f31e923fe2 200
Pawel Zarembski 0:01f31e923fe2 201 #ifdef __cplusplus
Pawel Zarembski 0:01f31e923fe2 202 }
Pawel Zarembski 0:01f31e923fe2 203 #endif
Pawel Zarembski 0:01f31e923fe2 204
Pawel Zarembski 0:01f31e923fe2 205 #endif /* _MXC_TMR_REGS_H_ */