Arrow / Mbed OS DAPLink Reset

Repostiory containing DAPLink source code with Reset Pin workaround for HANI_IOT board.

Upstream: https://github.com/ARMmbed/DAPLink

source/hic_hal/freescale/k26f/fsl_smc.h@0:01f31e923fe2, 2020-04-07 (annotated)

Committer:
Pawel Zarembski
Date:
Tue Apr 07 12:55:42 2020 +0200
Revision:
0:01f31e923fe2
hani: DAPLink with reset workaround

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Pawel Zarembski 0:01f31e923fe2 1 /*
Pawel Zarembski 0:01f31e923fe2 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
Pawel Zarembski 0:01f31e923fe2 3 * Copyright 2016-2017 NXP
Pawel Zarembski 0:01f31e923fe2 4 * All rights reserved.
Pawel Zarembski 0:01f31e923fe2 5 *
Pawel Zarembski 0:01f31e923fe2 6 * SPDX-License-Identifier: BSD-3-Clause
Pawel Zarembski 0:01f31e923fe2 7 */
Pawel Zarembski 0:01f31e923fe2 8
Pawel Zarembski 0:01f31e923fe2 9 #ifndef _FSL_SMC_H_
Pawel Zarembski 0:01f31e923fe2 10 #define _FSL_SMC_H_
Pawel Zarembski 0:01f31e923fe2 11
Pawel Zarembski 0:01f31e923fe2 12 #include "fsl_common.h"
Pawel Zarembski 0:01f31e923fe2 13
Pawel Zarembski 0:01f31e923fe2 14 /*! @addtogroup smc */
Pawel Zarembski 0:01f31e923fe2 15 /*! @{ */
Pawel Zarembski 0:01f31e923fe2 16
Pawel Zarembski 0:01f31e923fe2 17 /*******************************************************************************
Pawel Zarembski 0:01f31e923fe2 18 * Definitions
Pawel Zarembski 0:01f31e923fe2 19 ******************************************************************************/
Pawel Zarembski 0:01f31e923fe2 20
Pawel Zarembski 0:01f31e923fe2 21 /*! @name Driver version */
Pawel Zarembski 0:01f31e923fe2 22 /*@{*/
Pawel Zarembski 0:01f31e923fe2 23 /*! @brief SMC driver version 2.0.4. */
Pawel Zarembski 0:01f31e923fe2 24 #define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 4))
Pawel Zarembski 0:01f31e923fe2 25 /*@}*/
Pawel Zarembski 0:01f31e923fe2 26
Pawel Zarembski 0:01f31e923fe2 27 /*!
Pawel Zarembski 0:01f31e923fe2 28 * @brief Power Modes Protection
Pawel Zarembski 0:01f31e923fe2 29 */
Pawel Zarembski 0:01f31e923fe2 30 typedef enum _smc_power_mode_protection
Pawel Zarembski 0:01f31e923fe2 31 {
Pawel Zarembski 0:01f31e923fe2 32 #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
Pawel Zarembski 0:01f31e923fe2 33 kSMC_AllowPowerModeVlls = SMC_PMPROT_AVLLS_MASK, /*!< Allow Very-low-leakage Stop Mode. */
Pawel Zarembski 0:01f31e923fe2 34 #endif
Pawel Zarembski 0:01f31e923fe2 35 #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
Pawel Zarembski 0:01f31e923fe2 36 kSMC_AllowPowerModeLls = SMC_PMPROT_ALLS_MASK, /*!< Allow Low-leakage Stop Mode. */
Pawel Zarembski 0:01f31e923fe2 37 #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
Pawel Zarembski 0:01f31e923fe2 38 kSMC_AllowPowerModeVlp = SMC_PMPROT_AVLP_MASK, /*!< Allow Very-Low-power Mode. */
Pawel Zarembski 0:01f31e923fe2 39 #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
Pawel Zarembski 0:01f31e923fe2 40 kSMC_AllowPowerModeHsrun = SMC_PMPROT_AHSRUN_MASK, /*!< Allow High-speed Run mode. */
Pawel Zarembski 0:01f31e923fe2 41 #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
Pawel Zarembski 0:01f31e923fe2 42 kSMC_AllowPowerModeAll = (0U
Pawel Zarembski 0:01f31e923fe2 43 #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
Pawel Zarembski 0:01f31e923fe2 44 |
Pawel Zarembski 0:01f31e923fe2 45 SMC_PMPROT_AVLLS_MASK
Pawel Zarembski 0:01f31e923fe2 46 #endif
Pawel Zarembski 0:01f31e923fe2 47 #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
Pawel Zarembski 0:01f31e923fe2 48 |
Pawel Zarembski 0:01f31e923fe2 49 SMC_PMPROT_ALLS_MASK
Pawel Zarembski 0:01f31e923fe2 50 #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
Pawel Zarembski 0:01f31e923fe2 51 |
Pawel Zarembski 0:01f31e923fe2 52 SMC_PMPROT_AVLP_MASK
Pawel Zarembski 0:01f31e923fe2 53 #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
Pawel Zarembski 0:01f31e923fe2 54 |
Pawel Zarembski 0:01f31e923fe2 55 kSMC_AllowPowerModeHsrun
Pawel Zarembski 0:01f31e923fe2 56 #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
Pawel Zarembski 0:01f31e923fe2 57 ) /*!< Allow all power mode. */
Pawel Zarembski 0:01f31e923fe2 58 } smc_power_mode_protection_t;
Pawel Zarembski 0:01f31e923fe2 59
Pawel Zarembski 0:01f31e923fe2 60 /*!
Pawel Zarembski 0:01f31e923fe2 61 * @brief Power Modes in PMSTAT
Pawel Zarembski 0:01f31e923fe2 62 */
Pawel Zarembski 0:01f31e923fe2 63 typedef enum _smc_power_state
Pawel Zarembski 0:01f31e923fe2 64 {
Pawel Zarembski 0:01f31e923fe2 65 kSMC_PowerStateRun = 0x01U << 0U, /*!< 0000_0001 - Current power mode is RUN */
Pawel Zarembski 0:01f31e923fe2 66 kSMC_PowerStateStop = 0x01U << 1U, /*!< 0000_0010 - Current power mode is STOP */
Pawel Zarembski 0:01f31e923fe2 67 kSMC_PowerStateVlpr = 0x01U << 2U, /*!< 0000_0100 - Current power mode is VLPR */
Pawel Zarembski 0:01f31e923fe2 68 kSMC_PowerStateVlpw = 0x01U << 3U, /*!< 0000_1000 - Current power mode is VLPW */
Pawel Zarembski 0:01f31e923fe2 69 kSMC_PowerStateVlps = 0x01U << 4U, /*!< 0001_0000 - Current power mode is VLPS */
Pawel Zarembski 0:01f31e923fe2 70 #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
Pawel Zarembski 0:01f31e923fe2 71 kSMC_PowerStateLls = 0x01U << 5U, /*!< 0010_0000 - Current power mode is LLS */
Pawel Zarembski 0:01f31e923fe2 72 #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
Pawel Zarembski 0:01f31e923fe2 73 #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
Pawel Zarembski 0:01f31e923fe2 74 kSMC_PowerStateVlls = 0x01U << 6U, /*!< 0100_0000 - Current power mode is VLLS */
Pawel Zarembski 0:01f31e923fe2 75 #endif
Pawel Zarembski 0:01f31e923fe2 76 #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
Pawel Zarembski 0:01f31e923fe2 77 kSMC_PowerStateHsrun = 0x01U << 7U /*!< 1000_0000 - Current power mode is HSRUN */
Pawel Zarembski 0:01f31e923fe2 78 #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
Pawel Zarembski 0:01f31e923fe2 79 } smc_power_state_t;
Pawel Zarembski 0:01f31e923fe2 80
Pawel Zarembski 0:01f31e923fe2 81 /*!
Pawel Zarembski 0:01f31e923fe2 82 * @brief Run mode definition
Pawel Zarembski 0:01f31e923fe2 83 */
Pawel Zarembski 0:01f31e923fe2 84 typedef enum _smc_run_mode
Pawel Zarembski 0:01f31e923fe2 85 {
Pawel Zarembski 0:01f31e923fe2 86 kSMC_RunNormal = 0U, /*!< Normal RUN mode. */
Pawel Zarembski 0:01f31e923fe2 87 kSMC_RunVlpr = 2U, /*!< Very-low-power RUN mode. */
Pawel Zarembski 0:01f31e923fe2 88 #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
Pawel Zarembski 0:01f31e923fe2 89 kSMC_Hsrun = 3U /*!< High-speed Run mode (HSRUN). */
Pawel Zarembski 0:01f31e923fe2 90 #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
Pawel Zarembski 0:01f31e923fe2 91 } smc_run_mode_t;
Pawel Zarembski 0:01f31e923fe2 92
Pawel Zarembski 0:01f31e923fe2 93 /*!
Pawel Zarembski 0:01f31e923fe2 94 * @brief Stop mode definition
Pawel Zarembski 0:01f31e923fe2 95 */
Pawel Zarembski 0:01f31e923fe2 96 typedef enum _smc_stop_mode
Pawel Zarembski 0:01f31e923fe2 97 {
Pawel Zarembski 0:01f31e923fe2 98 kSMC_StopNormal = 0U, /*!< Normal STOP mode. */
Pawel Zarembski 0:01f31e923fe2 99 kSMC_StopVlps = 2U, /*!< Very-low-power STOP mode. */
Pawel Zarembski 0:01f31e923fe2 100 #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
Pawel Zarembski 0:01f31e923fe2 101 kSMC_StopLls = 3U, /*!< Low-leakage Stop mode. */
Pawel Zarembski 0:01f31e923fe2 102 #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
Pawel Zarembski 0:01f31e923fe2 103 #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
Pawel Zarembski 0:01f31e923fe2 104 kSMC_StopVlls = 4U /*!< Very-low-leakage Stop mode. */
Pawel Zarembski 0:01f31e923fe2 105 #endif
Pawel Zarembski 0:01f31e923fe2 106 } smc_stop_mode_t;
Pawel Zarembski 0:01f31e923fe2 107
Pawel Zarembski 0:01f31e923fe2 108 #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) || \
Pawel Zarembski 0:01f31e923fe2 109 (defined(FSL_FEATURE_SMC_USE_STOPCTRL_VLLSM) && FSL_FEATURE_SMC_USE_STOPCTRL_VLLSM) || \
Pawel Zarembski 0:01f31e923fe2 110 (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
Pawel Zarembski 0:01f31e923fe2 111 /*!
Pawel Zarembski 0:01f31e923fe2 112 * @brief VLLS/LLS stop sub mode definition
Pawel Zarembski 0:01f31e923fe2 113 */
Pawel Zarembski 0:01f31e923fe2 114 typedef enum _smc_stop_submode
Pawel Zarembski 0:01f31e923fe2 115 {
Pawel Zarembski 0:01f31e923fe2 116 kSMC_StopSub0 = 0U, /*!< Stop submode 0, for VLLS0/LLS0. */
Pawel Zarembski 0:01f31e923fe2 117 kSMC_StopSub1 = 1U, /*!< Stop submode 1, for VLLS1/LLS1. */
Pawel Zarembski 0:01f31e923fe2 118 kSMC_StopSub2 = 2U, /*!< Stop submode 2, for VLLS2/LLS2. */
Pawel Zarembski 0:01f31e923fe2 119 kSMC_StopSub3 = 3U /*!< Stop submode 3, for VLLS3/LLS3. */
Pawel Zarembski 0:01f31e923fe2 120 } smc_stop_submode_t;
Pawel Zarembski 0:01f31e923fe2 121 #endif
Pawel Zarembski 0:01f31e923fe2 122
Pawel Zarembski 0:01f31e923fe2 123 /*!
Pawel Zarembski 0:01f31e923fe2 124 * @brief Partial STOP option
Pawel Zarembski 0:01f31e923fe2 125 */
Pawel Zarembski 0:01f31e923fe2 126 typedef enum _smc_partial_stop_mode
Pawel Zarembski 0:01f31e923fe2 127 {
Pawel Zarembski 0:01f31e923fe2 128 kSMC_PartialStop = 0U, /*!< STOP - Normal Stop mode*/
Pawel Zarembski 0:01f31e923fe2 129 kSMC_PartialStop1 = 1U, /*!< Partial Stop with both system and bus clocks disabled*/
Pawel Zarembski 0:01f31e923fe2 130 kSMC_PartialStop2 = 2U, /*!< Partial Stop with system clock disabled and bus clock enabled*/
Pawel Zarembski 0:01f31e923fe2 131 } smc_partial_stop_option_t;
Pawel Zarembski 0:01f31e923fe2 132
Pawel Zarembski 0:01f31e923fe2 133 /*!
Pawel Zarembski 0:01f31e923fe2 134 * @brief SMC configuration status.
Pawel Zarembski 0:01f31e923fe2 135 */
Pawel Zarembski 0:01f31e923fe2 136 enum _smc_status
Pawel Zarembski 0:01f31e923fe2 137 {
Pawel Zarembski 0:01f31e923fe2 138 kStatus_SMC_StopAbort = MAKE_STATUS(kStatusGroup_POWER, 0) /*!< Entering Stop mode is abort*/
Pawel Zarembski 0:01f31e923fe2 139 };
Pawel Zarembski 0:01f31e923fe2 140
Pawel Zarembski 0:01f31e923fe2 141 #if (defined(FSL_FEATURE_SMC_HAS_VERID) && FSL_FEATURE_SMC_HAS_VERID)
Pawel Zarembski 0:01f31e923fe2 142 /*!
Pawel Zarembski 0:01f31e923fe2 143 * @brief IP version ID definition.
Pawel Zarembski 0:01f31e923fe2 144 */
Pawel Zarembski 0:01f31e923fe2 145 typedef struct _smc_version_id
Pawel Zarembski 0:01f31e923fe2 146 {
Pawel Zarembski 0:01f31e923fe2 147 uint16_t feature; /*!< Feature Specification Number. */
Pawel Zarembski 0:01f31e923fe2 148 uint8_t minor; /*!< Minor version number. */
Pawel Zarembski 0:01f31e923fe2 149 uint8_t major; /*!< Major version number. */
Pawel Zarembski 0:01f31e923fe2 150 } smc_version_id_t;
Pawel Zarembski 0:01f31e923fe2 151 #endif /* FSL_FEATURE_SMC_HAS_VERID */
Pawel Zarembski 0:01f31e923fe2 152
Pawel Zarembski 0:01f31e923fe2 153 #if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM)
Pawel Zarembski 0:01f31e923fe2 154 /*!
Pawel Zarembski 0:01f31e923fe2 155 * @brief IP parameter definition.
Pawel Zarembski 0:01f31e923fe2 156 */
Pawel Zarembski 0:01f31e923fe2 157 typedef struct _smc_param
Pawel Zarembski 0:01f31e923fe2 158 {
Pawel Zarembski 0:01f31e923fe2 159 bool hsrunEnable; /*!< HSRUN mode enable. */
Pawel Zarembski 0:01f31e923fe2 160 bool llsEnable; /*!< LLS mode enable. */
Pawel Zarembski 0:01f31e923fe2 161 bool lls2Enable; /*!< LLS2 mode enable. */
Pawel Zarembski 0:01f31e923fe2 162 bool vlls0Enable; /*!< VLLS0 mode enable. */
Pawel Zarembski 0:01f31e923fe2 163 } smc_param_t;
Pawel Zarembski 0:01f31e923fe2 164 #endif /* FSL_FEATURE_SMC_HAS_PARAM */
Pawel Zarembski 0:01f31e923fe2 165
Pawel Zarembski 0:01f31e923fe2 166 #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
Pawel Zarembski 0:01f31e923fe2 167 (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)
Pawel Zarembski 0:01f31e923fe2 168 /*!
Pawel Zarembski 0:01f31e923fe2 169 * @brief SMC Low-Leakage Stop power mode configuration.
Pawel Zarembski 0:01f31e923fe2 170 */
Pawel Zarembski 0:01f31e923fe2 171 typedef struct _smc_power_mode_lls_config
Pawel Zarembski 0:01f31e923fe2 172 {
Pawel Zarembski 0:01f31e923fe2 173 #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
Pawel Zarembski 0:01f31e923fe2 174 smc_stop_submode_t subMode; /*!< Low-leakage Stop sub-mode */
Pawel Zarembski 0:01f31e923fe2 175 #endif
Pawel Zarembski 0:01f31e923fe2 176 #if (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)
Pawel Zarembski 0:01f31e923fe2 177 bool enableLpoClock; /*!< Enable LPO clock in LLS mode */
Pawel Zarembski 0:01f31e923fe2 178 #endif
Pawel Zarembski 0:01f31e923fe2 179 } smc_power_mode_lls_config_t;
Pawel Zarembski 0:01f31e923fe2 180 #endif /* (FSL_FEATURE_SMC_HAS_LLS_SUBMODE || FSL_FEATURE_SMC_HAS_LPOPO) */
Pawel Zarembski 0:01f31e923fe2 181
Pawel Zarembski 0:01f31e923fe2 182 #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
Pawel Zarembski 0:01f31e923fe2 183 /*!
Pawel Zarembski 0:01f31e923fe2 184 * @brief SMC Very Low-Leakage Stop power mode configuration.
Pawel Zarembski 0:01f31e923fe2 185 */
Pawel Zarembski 0:01f31e923fe2 186 typedef struct _smc_power_mode_vlls_config
Pawel Zarembski 0:01f31e923fe2 187 {
Pawel Zarembski 0:01f31e923fe2 188 #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) || \
Pawel Zarembski 0:01f31e923fe2 189 (defined(FSL_FEATURE_SMC_USE_STOPCTRL_VLLSM) && FSL_FEATURE_SMC_USE_STOPCTRL_VLLSM) || \
Pawel Zarembski 0:01f31e923fe2 190 (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
Pawel Zarembski 0:01f31e923fe2 191 smc_stop_submode_t subMode; /*!< Very Low-leakage Stop sub-mode */
Pawel Zarembski 0:01f31e923fe2 192 #endif
Pawel Zarembski 0:01f31e923fe2 193 #if (defined(FSL_FEATURE_SMC_HAS_PORPO) && FSL_FEATURE_SMC_HAS_PORPO)
Pawel Zarembski 0:01f31e923fe2 194 bool enablePorDetectInVlls0; /*!< Enable Power on reset detect in VLLS mode */
Pawel Zarembski 0:01f31e923fe2 195 #endif
Pawel Zarembski 0:01f31e923fe2 196 #if (defined(FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION) && FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION)
Pawel Zarembski 0:01f31e923fe2 197 bool enableRam2InVlls2; /*!< Enable RAM2 power in VLLS2 */
Pawel Zarembski 0:01f31e923fe2 198 #endif
Pawel Zarembski 0:01f31e923fe2 199 #if (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)
Pawel Zarembski 0:01f31e923fe2 200 bool enableLpoClock; /*!< Enable LPO clock in VLLS mode */
Pawel Zarembski 0:01f31e923fe2 201 #endif
Pawel Zarembski 0:01f31e923fe2 202 } smc_power_mode_vlls_config_t;
Pawel Zarembski 0:01f31e923fe2 203 #endif
Pawel Zarembski 0:01f31e923fe2 204
Pawel Zarembski 0:01f31e923fe2 205 /*******************************************************************************
Pawel Zarembski 0:01f31e923fe2 206 * API
Pawel Zarembski 0:01f31e923fe2 207 ******************************************************************************/
Pawel Zarembski 0:01f31e923fe2 208
Pawel Zarembski 0:01f31e923fe2 209 #if defined(__cplusplus)
Pawel Zarembski 0:01f31e923fe2 210 extern "C" {
Pawel Zarembski 0:01f31e923fe2 211 #endif /* __cplusplus */
Pawel Zarembski 0:01f31e923fe2 212
Pawel Zarembski 0:01f31e923fe2 213 /*! @name System mode controller APIs*/
Pawel Zarembski 0:01f31e923fe2 214 /*@{*/
Pawel Zarembski 0:01f31e923fe2 215
Pawel Zarembski 0:01f31e923fe2 216 #if (defined(FSL_FEATURE_SMC_HAS_VERID) && FSL_FEATURE_SMC_HAS_VERID)
Pawel Zarembski 0:01f31e923fe2 217 /*!
Pawel Zarembski 0:01f31e923fe2 218 * @brief Gets the SMC version ID.
Pawel Zarembski 0:01f31e923fe2 219 *
Pawel Zarembski 0:01f31e923fe2 220 * This function gets the SMC version ID, including major version number,
Pawel Zarembski 0:01f31e923fe2 221 * minor version number, and feature specification number.
Pawel Zarembski 0:01f31e923fe2 222 *
Pawel Zarembski 0:01f31e923fe2 223 * @param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 224 * @param versionId Pointer to the version ID structure.
Pawel Zarembski 0:01f31e923fe2 225 */
Pawel Zarembski 0:01f31e923fe2 226 static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId)
Pawel Zarembski 0:01f31e923fe2 227 {
Pawel Zarembski 0:01f31e923fe2 228 *((uint32_t *)versionId) = base->VERID;
Pawel Zarembski 0:01f31e923fe2 229 }
Pawel Zarembski 0:01f31e923fe2 230 #endif /* FSL_FEATURE_SMC_HAS_VERID */
Pawel Zarembski 0:01f31e923fe2 231
Pawel Zarembski 0:01f31e923fe2 232 #if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM)
Pawel Zarembski 0:01f31e923fe2 233 /*!
Pawel Zarembski 0:01f31e923fe2 234 * @brief Gets the SMC parameter.
Pawel Zarembski 0:01f31e923fe2 235 *
Pawel Zarembski 0:01f31e923fe2 236 * This function gets the SMC parameter including the enabled power mdoes.
Pawel Zarembski 0:01f31e923fe2 237 *
Pawel Zarembski 0:01f31e923fe2 238 * @param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 239 * @param param Pointer to the SMC param structure.
Pawel Zarembski 0:01f31e923fe2 240 */
Pawel Zarembski 0:01f31e923fe2 241 void SMC_GetParam(SMC_Type *base, smc_param_t *param);
Pawel Zarembski 0:01f31e923fe2 242 #endif
Pawel Zarembski 0:01f31e923fe2 243
Pawel Zarembski 0:01f31e923fe2 244 /*!
Pawel Zarembski 0:01f31e923fe2 245 * @brief Configures all power mode protection settings.
Pawel Zarembski 0:01f31e923fe2 246 *
Pawel Zarembski 0:01f31e923fe2 247 * This function configures the power mode protection settings for
Pawel Zarembski 0:01f31e923fe2 248 * supported power modes in the specified chip family. The available power modes
Pawel Zarembski 0:01f31e923fe2 249 * are defined in the smc_power_mode_protection_t. This should be done at an early
Pawel Zarembski 0:01f31e923fe2 250 * system level initialization stage. See the reference manual for details.
Pawel Zarembski 0:01f31e923fe2 251 * This register can only write once after the power reset.
Pawel Zarembski 0:01f31e923fe2 252 *
Pawel Zarembski 0:01f31e923fe2 253 * The allowed modes are passed as bit map. For example, to allow LLS and VLLS,
Pawel Zarembski 0:01f31e923fe2 254 * use SMC_SetPowerModeProtection(kSMC_AllowPowerModeVlls | kSMC_AllowPowerModeVlps).
Pawel Zarembski 0:01f31e923fe2 255 * To allow all modes, use SMC_SetPowerModeProtection(kSMC_AllowPowerModeAll).
Pawel Zarembski 0:01f31e923fe2 256 *
Pawel Zarembski 0:01f31e923fe2 257 * @param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 258 * @param allowedModes Bitmap of the allowed power modes.
Pawel Zarembski 0:01f31e923fe2 259 */
Pawel Zarembski 0:01f31e923fe2 260 static inline void SMC_SetPowerModeProtection(SMC_Type *base, uint8_t allowedModes)
Pawel Zarembski 0:01f31e923fe2 261 {
Pawel Zarembski 0:01f31e923fe2 262 base->PMPROT = allowedModes;
Pawel Zarembski 0:01f31e923fe2 263 }
Pawel Zarembski 0:01f31e923fe2 264
Pawel Zarembski 0:01f31e923fe2 265 /*!
Pawel Zarembski 0:01f31e923fe2 266 * @brief Gets the current power mode status.
Pawel Zarembski 0:01f31e923fe2 267 *
Pawel Zarembski 0:01f31e923fe2 268 * This function returns the current power mode status. After the application
Pawel Zarembski 0:01f31e923fe2 269 * switches the power mode, it should always check the status to check whether it
Pawel Zarembski 0:01f31e923fe2 270 * runs into the specified mode or not. The application should check
Pawel Zarembski 0:01f31e923fe2 271 * this mode before switching to a different mode. The system requires that
Pawel Zarembski 0:01f31e923fe2 272 * only certain modes can switch to other specific modes. See the
Pawel Zarembski 0:01f31e923fe2 273 * reference manual for details and the smc_power_state_t for information about
Pawel Zarembski 0:01f31e923fe2 274 * the power status.
Pawel Zarembski 0:01f31e923fe2 275 *
Pawel Zarembski 0:01f31e923fe2 276 * @param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 277 * @return Current power mode status.
Pawel Zarembski 0:01f31e923fe2 278 */
Pawel Zarembski 0:01f31e923fe2 279 static inline smc_power_state_t SMC_GetPowerModeState(SMC_Type *base)
Pawel Zarembski 0:01f31e923fe2 280 {
Pawel Zarembski 0:01f31e923fe2 281 return (smc_power_state_t)base->PMSTAT;
Pawel Zarembski 0:01f31e923fe2 282 }
Pawel Zarembski 0:01f31e923fe2 283
Pawel Zarembski 0:01f31e923fe2 284 /*!
Pawel Zarembski 0:01f31e923fe2 285 * @brief Prepares to enter stop modes.
Pawel Zarembski 0:01f31e923fe2 286 *
Pawel Zarembski 0:01f31e923fe2 287 * This function should be called before entering STOP/VLPS/LLS/VLLS modes.
Pawel Zarembski 0:01f31e923fe2 288 */
Pawel Zarembski 0:01f31e923fe2 289 void SMC_PreEnterStopModes(void);
Pawel Zarembski 0:01f31e923fe2 290
Pawel Zarembski 0:01f31e923fe2 291 /*!
Pawel Zarembski 0:01f31e923fe2 292 * @brief Recovers after wake up from stop modes.
Pawel Zarembski 0:01f31e923fe2 293 *
Pawel Zarembski 0:01f31e923fe2 294 * This function should be called after wake up from STOP/VLPS/LLS/VLLS modes.
Pawel Zarembski 0:01f31e923fe2 295 * It is used with @ref SMC_PreEnterStopModes.
Pawel Zarembski 0:01f31e923fe2 296 */
Pawel Zarembski 0:01f31e923fe2 297 void SMC_PostExitStopModes(void);
Pawel Zarembski 0:01f31e923fe2 298
Pawel Zarembski 0:01f31e923fe2 299 /*!
Pawel Zarembski 0:01f31e923fe2 300 * @brief Prepares to enter wait modes.
Pawel Zarembski 0:01f31e923fe2 301 *
Pawel Zarembski 0:01f31e923fe2 302 * This function should be called before entering WAIT/VLPW modes.
Pawel Zarembski 0:01f31e923fe2 303 */
Pawel Zarembski 0:01f31e923fe2 304 void SMC_PreEnterWaitModes(void);
Pawel Zarembski 0:01f31e923fe2 305
Pawel Zarembski 0:01f31e923fe2 306 /*!
Pawel Zarembski 0:01f31e923fe2 307 * @brief Recovers after wake up from stop modes.
Pawel Zarembski 0:01f31e923fe2 308 *
Pawel Zarembski 0:01f31e923fe2 309 * This function should be called after wake up from WAIT/VLPW modes.
Pawel Zarembski 0:01f31e923fe2 310 * It is used with @ref SMC_PreEnterWaitModes.
Pawel Zarembski 0:01f31e923fe2 311 */
Pawel Zarembski 0:01f31e923fe2 312 void SMC_PostExitWaitModes(void);
Pawel Zarembski 0:01f31e923fe2 313
Pawel Zarembski 0:01f31e923fe2 314 /*!
Pawel Zarembski 0:01f31e923fe2 315 * @brief Configures the system to RUN power mode.
Pawel Zarembski 0:01f31e923fe2 316 *
Pawel Zarembski 0:01f31e923fe2 317 * @param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 318 * @return SMC configuration error code.
Pawel Zarembski 0:01f31e923fe2 319 */
Pawel Zarembski 0:01f31e923fe2 320 status_t SMC_SetPowerModeRun(SMC_Type *base);
Pawel Zarembski 0:01f31e923fe2 321
Pawel Zarembski 0:01f31e923fe2 322 #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
Pawel Zarembski 0:01f31e923fe2 323 /*!
Pawel Zarembski 0:01f31e923fe2 324 * @brief Configures the system to HSRUN power mode.
Pawel Zarembski 0:01f31e923fe2 325 *
Pawel Zarembski 0:01f31e923fe2 326 * @param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 327 * @return SMC configuration error code.
Pawel Zarembski 0:01f31e923fe2 328 */
Pawel Zarembski 0:01f31e923fe2 329 status_t SMC_SetPowerModeHsrun(SMC_Type *base);
Pawel Zarembski 0:01f31e923fe2 330 #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
Pawel Zarembski 0:01f31e923fe2 331
Pawel Zarembski 0:01f31e923fe2 332 /*!
Pawel Zarembski 0:01f31e923fe2 333 * @brief Configures the system to WAIT power mode.
Pawel Zarembski 0:01f31e923fe2 334 *
Pawel Zarembski 0:01f31e923fe2 335 * @param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 336 * @return SMC configuration error code.
Pawel Zarembski 0:01f31e923fe2 337 */
Pawel Zarembski 0:01f31e923fe2 338 status_t SMC_SetPowerModeWait(SMC_Type *base);
Pawel Zarembski 0:01f31e923fe2 339
Pawel Zarembski 0:01f31e923fe2 340 /*!
Pawel Zarembski 0:01f31e923fe2 341 * @brief Configures the system to Stop power mode.
Pawel Zarembski 0:01f31e923fe2 342 *
Pawel Zarembski 0:01f31e923fe2 343 * @param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 344 * @param option Partial Stop mode option.
Pawel Zarembski 0:01f31e923fe2 345 * @return SMC configuration error code.
Pawel Zarembski 0:01f31e923fe2 346 */
Pawel Zarembski 0:01f31e923fe2 347 status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option);
Pawel Zarembski 0:01f31e923fe2 348
Pawel Zarembski 0:01f31e923fe2 349 #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
Pawel Zarembski 0:01f31e923fe2 350 /*!
Pawel Zarembski 0:01f31e923fe2 351 * @brief Configures the system to VLPR power mode.
Pawel Zarembski 0:01f31e923fe2 352 *
Pawel Zarembski 0:01f31e923fe2 353 * @param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 354 * @param wakeupMode Enter Normal Run mode if true, else stay in VLPR mode.
Pawel Zarembski 0:01f31e923fe2 355 * @return SMC configuration error code.
Pawel Zarembski 0:01f31e923fe2 356 */
Pawel Zarembski 0:01f31e923fe2 357 status_t SMC_SetPowerModeVlpr(SMC_Type *base, bool wakeupMode);
Pawel Zarembski 0:01f31e923fe2 358 #else
Pawel Zarembski 0:01f31e923fe2 359 /*!
Pawel Zarembski 0:01f31e923fe2 360 * @brief Configures the system to VLPR power mode.
Pawel Zarembski 0:01f31e923fe2 361 *
Pawel Zarembski 0:01f31e923fe2 362 * @param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 363 * @return SMC configuration error code.
Pawel Zarembski 0:01f31e923fe2 364 */
Pawel Zarembski 0:01f31e923fe2 365 status_t SMC_SetPowerModeVlpr(SMC_Type *base);
Pawel Zarembski 0:01f31e923fe2 366 #endif /* FSL_FEATURE_SMC_HAS_LPWUI */
Pawel Zarembski 0:01f31e923fe2 367
Pawel Zarembski 0:01f31e923fe2 368 /*!
Pawel Zarembski 0:01f31e923fe2 369 * @brief Configures the system to VLPW power mode.
Pawel Zarembski 0:01f31e923fe2 370 *
Pawel Zarembski 0:01f31e923fe2 371 * @param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 372 * @return SMC configuration error code.
Pawel Zarembski 0:01f31e923fe2 373 */
Pawel Zarembski 0:01f31e923fe2 374 status_t SMC_SetPowerModeVlpw(SMC_Type *base);
Pawel Zarembski 0:01f31e923fe2 375
Pawel Zarembski 0:01f31e923fe2 376 /*!
Pawel Zarembski 0:01f31e923fe2 377 * @brief Configures the system to VLPS power mode.
Pawel Zarembski 0:01f31e923fe2 378 *
Pawel Zarembski 0:01f31e923fe2 379 * @param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 380 * @return SMC configuration error code.
Pawel Zarembski 0:01f31e923fe2 381 */
Pawel Zarembski 0:01f31e923fe2 382 status_t SMC_SetPowerModeVlps(SMC_Type *base);
Pawel Zarembski 0:01f31e923fe2 383
Pawel Zarembski 0:01f31e923fe2 384 #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
Pawel Zarembski 0:01f31e923fe2 385 #if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
Pawel Zarembski 0:01f31e923fe2 386 (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO))
Pawel Zarembski 0:01f31e923fe2 387 /*!
Pawel Zarembski 0:01f31e923fe2 388 * @brief Configures the system to LLS power mode.
Pawel Zarembski 0:01f31e923fe2 389 *
Pawel Zarembski 0:01f31e923fe2 390 * @param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 391 * @param config The LLS power mode configuration structure
Pawel Zarembski 0:01f31e923fe2 392 * @return SMC configuration error code.
Pawel Zarembski 0:01f31e923fe2 393 */
Pawel Zarembski 0:01f31e923fe2 394 status_t SMC_SetPowerModeLls(SMC_Type *base, const smc_power_mode_lls_config_t *config);
Pawel Zarembski 0:01f31e923fe2 395 #else
Pawel Zarembski 0:01f31e923fe2 396 /*!
Pawel Zarembski 0:01f31e923fe2 397 * @brief Configures the system to LLS power mode.
Pawel Zarembski 0:01f31e923fe2 398 *
Pawel Zarembski 0:01f31e923fe2 399 * @param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 400 * @return SMC configuration error code.
Pawel Zarembski 0:01f31e923fe2 401 */
Pawel Zarembski 0:01f31e923fe2 402 status_t SMC_SetPowerModeLls(SMC_Type *base);
Pawel Zarembski 0:01f31e923fe2 403 #endif
Pawel Zarembski 0:01f31e923fe2 404 #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
Pawel Zarembski 0:01f31e923fe2 405
Pawel Zarembski 0:01f31e923fe2 406 #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
Pawel Zarembski 0:01f31e923fe2 407 /*!
Pawel Zarembski 0:01f31e923fe2 408 * @brief Configures the system to VLLS power mode.
Pawel Zarembski 0:01f31e923fe2 409 *
Pawel Zarembski 0:01f31e923fe2 410 * @param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 411 * @param config The VLLS power mode configuration structure.
Pawel Zarembski 0:01f31e923fe2 412 * @return SMC configuration error code.
Pawel Zarembski 0:01f31e923fe2 413 */
Pawel Zarembski 0:01f31e923fe2 414 status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config);
Pawel Zarembski 0:01f31e923fe2 415 #endif /* FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE */
Pawel Zarembski 0:01f31e923fe2 416
Pawel Zarembski 0:01f31e923fe2 417 /*@}*/
Pawel Zarembski 0:01f31e923fe2 418
Pawel Zarembski 0:01f31e923fe2 419 #if defined(__cplusplus)
Pawel Zarembski 0:01f31e923fe2 420 }
Pawel Zarembski 0:01f31e923fe2 421 #endif /* __cplusplus */
Pawel Zarembski 0:01f31e923fe2 422
Pawel Zarembski 0:01f31e923fe2 423 /*! @}*/
Pawel Zarembski 0:01f31e923fe2 424
Pawel Zarembski 0:01f31e923fe2 425 #endif /* _FSL_SMC_H_ */