Arrow / Mbed OS DAPLink Reset

Repostiory containing DAPLink source code with Reset Pin workaround for HANI_IOT board.

Upstream: https://github.com/ARMmbed/DAPLink

source/hic_hal/freescale/k26f/fsl_smc.c@0:01f31e923fe2, 2020-04-07 (annotated)

Committer:
Pawel Zarembski
Date:
Tue Apr 07 12:55:42 2020 +0200
Revision:
0:01f31e923fe2
hani: DAPLink with reset workaround

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Pawel Zarembski 0:01f31e923fe2 1 /*
Pawel Zarembski 0:01f31e923fe2 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
Pawel Zarembski 0:01f31e923fe2 3 * Copyright 2016-2017 NXP
Pawel Zarembski 0:01f31e923fe2 4 * All rights reserved.
Pawel Zarembski 0:01f31e923fe2 5 *
Pawel Zarembski 0:01f31e923fe2 6 * SPDX-License-Identifier: BSD-3-Clause
Pawel Zarembski 0:01f31e923fe2 7 */
Pawel Zarembski 0:01f31e923fe2 8
Pawel Zarembski 0:01f31e923fe2 9 #include "fsl_smc.h"
Pawel Zarembski 0:01f31e923fe2 10 #include "fsl_common.h"
Pawel Zarembski 0:01f31e923fe2 11
Pawel Zarembski 0:01f31e923fe2 12 /*******************************************************************************
Pawel Zarembski 0:01f31e923fe2 13 * Definitions
Pawel Zarembski 0:01f31e923fe2 14 ******************************************************************************/
Pawel Zarembski 0:01f31e923fe2 15 /* Component ID definition, used by tools. */
Pawel Zarembski 0:01f31e923fe2 16 #ifndef FSL_COMPONENT_ID
Pawel Zarembski 0:01f31e923fe2 17 #define FSL_COMPONENT_ID "platform.drivers.smc"
Pawel Zarembski 0:01f31e923fe2 18 #endif
Pawel Zarembski 0:01f31e923fe2 19
Pawel Zarembski 0:01f31e923fe2 20 typedef void (*smc_stop_ram_func_t)(void);
Pawel Zarembski 0:01f31e923fe2 21
Pawel Zarembski 0:01f31e923fe2 22 /*******************************************************************************
Pawel Zarembski 0:01f31e923fe2 23 * Prototypes
Pawel Zarembski 0:01f31e923fe2 24 ******************************************************************************/
Pawel Zarembski 0:01f31e923fe2 25 static void SMC_EnterStopRamFunc(void);
Pawel Zarembski 0:01f31e923fe2 26
Pawel Zarembski 0:01f31e923fe2 27 /*******************************************************************************
Pawel Zarembski 0:01f31e923fe2 28 * Variables
Pawel Zarembski 0:01f31e923fe2 29 ******************************************************************************/
Pawel Zarembski 0:01f31e923fe2 30 static uint32_t g_savedPrimask;
Pawel Zarembski 0:01f31e923fe2 31
Pawel Zarembski 0:01f31e923fe2 32 /*
Pawel Zarembski 0:01f31e923fe2 33 * The ram function code is:
Pawel Zarembski 0:01f31e923fe2 34 *
Pawel Zarembski 0:01f31e923fe2 35 * uint32_t i;
Pawel Zarembski 0:01f31e923fe2 36 * for (i=0; i<0x8; i++)
Pawel Zarembski 0:01f31e923fe2 37 * {
Pawel Zarembski 0:01f31e923fe2 38 * __NOP();
Pawel Zarembski 0:01f31e923fe2 39 * }
Pawel Zarembski 0:01f31e923fe2 40 * __DSB();
Pawel Zarembski 0:01f31e923fe2 41 * __WFI();
Pawel Zarembski 0:01f31e923fe2 42 * __ISB();
Pawel Zarembski 0:01f31e923fe2 43 *
Pawel Zarembski 0:01f31e923fe2 44 * When entring the stop modes, the flash prefetch might be interrupted, thus
Pawel Zarembski 0:01f31e923fe2 45 * the prefetched code or data might be broken. To make sure the flash is idle
Pawel Zarembski 0:01f31e923fe2 46 * when entring the stop modes, the code is moved to ram. And delay for a while
Pawel Zarembski 0:01f31e923fe2 47 * before WFI to make sure previous flash prefetch is finished.
Pawel Zarembski 0:01f31e923fe2 48 *
Pawel Zarembski 0:01f31e923fe2 49 * Only need to do like this when code is in flash, if code is in rom or ram,
Pawel Zarembski 0:01f31e923fe2 50 * this is not necessary.
Pawel Zarembski 0:01f31e923fe2 51 */
Pawel Zarembski 0:01f31e923fe2 52 static uint16_t s_stopRamFuncArray[] = {
Pawel Zarembski 0:01f31e923fe2 53 0x2000, /* MOVS R0, #0 */
Pawel Zarembski 0:01f31e923fe2 54 0x2808, /* CMP R0, #8 */
Pawel Zarembski 0:01f31e923fe2 55 0xD202, /* BCS.N */
Pawel Zarembski 0:01f31e923fe2 56 0xBF00, /* NOP */
Pawel Zarembski 0:01f31e923fe2 57 0x1C40, /* ADDS R0, R0, #1 */
Pawel Zarembski 0:01f31e923fe2 58 0xE7FA, /* B.N */
Pawel Zarembski 0:01f31e923fe2 59 0xF3BF, 0x8F4F, /* DSB */
Pawel Zarembski 0:01f31e923fe2 60 0xBF30, /* WFI */
Pawel Zarembski 0:01f31e923fe2 61 0xF3BF, 0x8F6F, /* ISB */
Pawel Zarembski 0:01f31e923fe2 62 0x4770, /* BX LR */
Pawel Zarembski 0:01f31e923fe2 63 };
Pawel Zarembski 0:01f31e923fe2 64
Pawel Zarembski 0:01f31e923fe2 65 /*******************************************************************************
Pawel Zarembski 0:01f31e923fe2 66 * Code
Pawel Zarembski 0:01f31e923fe2 67 ******************************************************************************/
Pawel Zarembski 0:01f31e923fe2 68 static void SMC_EnterStopRamFunc(void)
Pawel Zarembski 0:01f31e923fe2 69 {
Pawel Zarembski 0:01f31e923fe2 70 uint32_t ramFuncEntry = ((uint32_t)(s_stopRamFuncArray)) + 1U;
Pawel Zarembski 0:01f31e923fe2 71 smc_stop_ram_func_t stopRamFunc = (smc_stop_ram_func_t)ramFuncEntry;
Pawel Zarembski 0:01f31e923fe2 72 stopRamFunc();
Pawel Zarembski 0:01f31e923fe2 73 }
Pawel Zarembski 0:01f31e923fe2 74
Pawel Zarembski 0:01f31e923fe2 75 #if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM)
Pawel Zarembski 0:01f31e923fe2 76 /*!
Pawel Zarembski 0:01f31e923fe2 77 * brief Gets the SMC parameter.
Pawel Zarembski 0:01f31e923fe2 78 *
Pawel Zarembski 0:01f31e923fe2 79 * This function gets the SMC parameter including the enabled power mdoes.
Pawel Zarembski 0:01f31e923fe2 80 *
Pawel Zarembski 0:01f31e923fe2 81 * param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 82 * param param Pointer to the SMC param structure.
Pawel Zarembski 0:01f31e923fe2 83 */
Pawel Zarembski 0:01f31e923fe2 84 void SMC_GetParam(SMC_Type *base, smc_param_t *param)
Pawel Zarembski 0:01f31e923fe2 85 {
Pawel Zarembski 0:01f31e923fe2 86 uint32_t reg = base->PARAM;
Pawel Zarembski 0:01f31e923fe2 87 param->hsrunEnable = (bool)(reg & SMC_PARAM_EHSRUN_MASK);
Pawel Zarembski 0:01f31e923fe2 88 param->llsEnable = (bool)(reg & SMC_PARAM_ELLS_MASK);
Pawel Zarembski 0:01f31e923fe2 89 param->lls2Enable = (bool)(reg & SMC_PARAM_ELLS2_MASK);
Pawel Zarembski 0:01f31e923fe2 90 param->vlls0Enable = (bool)(reg & SMC_PARAM_EVLLS0_MASK);
Pawel Zarembski 0:01f31e923fe2 91 }
Pawel Zarembski 0:01f31e923fe2 92 #endif /* FSL_FEATURE_SMC_HAS_PARAM */
Pawel Zarembski 0:01f31e923fe2 93
Pawel Zarembski 0:01f31e923fe2 94 /*!
Pawel Zarembski 0:01f31e923fe2 95 * brief Prepares to enter stop modes.
Pawel Zarembski 0:01f31e923fe2 96 *
Pawel Zarembski 0:01f31e923fe2 97 * This function should be called before entering STOP/VLPS/LLS/VLLS modes.
Pawel Zarembski 0:01f31e923fe2 98 */
Pawel Zarembski 0:01f31e923fe2 99 void SMC_PreEnterStopModes(void)
Pawel Zarembski 0:01f31e923fe2 100 {
Pawel Zarembski 0:01f31e923fe2 101 g_savedPrimask = DisableGlobalIRQ();
Pawel Zarembski 0:01f31e923fe2 102 __ISB();
Pawel Zarembski 0:01f31e923fe2 103 }
Pawel Zarembski 0:01f31e923fe2 104
Pawel Zarembski 0:01f31e923fe2 105 /*!
Pawel Zarembski 0:01f31e923fe2 106 * brief Recovers after wake up from stop modes.
Pawel Zarembski 0:01f31e923fe2 107 *
Pawel Zarembski 0:01f31e923fe2 108 * This function should be called after wake up from STOP/VLPS/LLS/VLLS modes.
Pawel Zarembski 0:01f31e923fe2 109 * It is used with ref SMC_PreEnterStopModes.
Pawel Zarembski 0:01f31e923fe2 110 */
Pawel Zarembski 0:01f31e923fe2 111 void SMC_PostExitStopModes(void)
Pawel Zarembski 0:01f31e923fe2 112 {
Pawel Zarembski 0:01f31e923fe2 113 EnableGlobalIRQ(g_savedPrimask);
Pawel Zarembski 0:01f31e923fe2 114 __ISB();
Pawel Zarembski 0:01f31e923fe2 115 }
Pawel Zarembski 0:01f31e923fe2 116
Pawel Zarembski 0:01f31e923fe2 117 /*!
Pawel Zarembski 0:01f31e923fe2 118 * brief Prepares to enter wait modes.
Pawel Zarembski 0:01f31e923fe2 119 *
Pawel Zarembski 0:01f31e923fe2 120 * This function should be called before entering WAIT/VLPW modes.
Pawel Zarembski 0:01f31e923fe2 121 */
Pawel Zarembski 0:01f31e923fe2 122 void SMC_PreEnterWaitModes(void)
Pawel Zarembski 0:01f31e923fe2 123 {
Pawel Zarembski 0:01f31e923fe2 124 g_savedPrimask = DisableGlobalIRQ();
Pawel Zarembski 0:01f31e923fe2 125 __ISB();
Pawel Zarembski 0:01f31e923fe2 126 }
Pawel Zarembski 0:01f31e923fe2 127
Pawel Zarembski 0:01f31e923fe2 128 /*!
Pawel Zarembski 0:01f31e923fe2 129 * brief Recovers after wake up from stop modes.
Pawel Zarembski 0:01f31e923fe2 130 *
Pawel Zarembski 0:01f31e923fe2 131 * This function should be called after wake up from WAIT/VLPW modes.
Pawel Zarembski 0:01f31e923fe2 132 * It is used with ref SMC_PreEnterWaitModes.
Pawel Zarembski 0:01f31e923fe2 133 */
Pawel Zarembski 0:01f31e923fe2 134 void SMC_PostExitWaitModes(void)
Pawel Zarembski 0:01f31e923fe2 135 {
Pawel Zarembski 0:01f31e923fe2 136 EnableGlobalIRQ(g_savedPrimask);
Pawel Zarembski 0:01f31e923fe2 137 __ISB();
Pawel Zarembski 0:01f31e923fe2 138 }
Pawel Zarembski 0:01f31e923fe2 139
Pawel Zarembski 0:01f31e923fe2 140 /*!
Pawel Zarembski 0:01f31e923fe2 141 * brief Configures the system to RUN power mode.
Pawel Zarembski 0:01f31e923fe2 142 *
Pawel Zarembski 0:01f31e923fe2 143 * param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 144 * return SMC configuration error code.
Pawel Zarembski 0:01f31e923fe2 145 */
Pawel Zarembski 0:01f31e923fe2 146 status_t SMC_SetPowerModeRun(SMC_Type *base)
Pawel Zarembski 0:01f31e923fe2 147 {
Pawel Zarembski 0:01f31e923fe2 148 uint8_t reg;
Pawel Zarembski 0:01f31e923fe2 149
Pawel Zarembski 0:01f31e923fe2 150 reg = base->PMCTRL;
Pawel Zarembski 0:01f31e923fe2 151 /* configure Normal RUN mode */
Pawel Zarembski 0:01f31e923fe2 152 reg &= ~SMC_PMCTRL_RUNM_MASK;
Pawel Zarembski 0:01f31e923fe2 153 reg |= (kSMC_RunNormal << SMC_PMCTRL_RUNM_SHIFT);
Pawel Zarembski 0:01f31e923fe2 154 base->PMCTRL = reg;
Pawel Zarembski 0:01f31e923fe2 155
Pawel Zarembski 0:01f31e923fe2 156 return kStatus_Success;
Pawel Zarembski 0:01f31e923fe2 157 }
Pawel Zarembski 0:01f31e923fe2 158
Pawel Zarembski 0:01f31e923fe2 159 #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
Pawel Zarembski 0:01f31e923fe2 160 /*!
Pawel Zarembski 0:01f31e923fe2 161 * brief Configures the system to HSRUN power mode.
Pawel Zarembski 0:01f31e923fe2 162 *
Pawel Zarembski 0:01f31e923fe2 163 * param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 164 * return SMC configuration error code.
Pawel Zarembski 0:01f31e923fe2 165 */
Pawel Zarembski 0:01f31e923fe2 166 status_t SMC_SetPowerModeHsrun(SMC_Type *base)
Pawel Zarembski 0:01f31e923fe2 167 {
Pawel Zarembski 0:01f31e923fe2 168 uint8_t reg;
Pawel Zarembski 0:01f31e923fe2 169
Pawel Zarembski 0:01f31e923fe2 170 reg = base->PMCTRL;
Pawel Zarembski 0:01f31e923fe2 171 /* configure High Speed RUN mode */
Pawel Zarembski 0:01f31e923fe2 172 reg &= ~SMC_PMCTRL_RUNM_MASK;
Pawel Zarembski 0:01f31e923fe2 173 reg |= (kSMC_Hsrun << SMC_PMCTRL_RUNM_SHIFT);
Pawel Zarembski 0:01f31e923fe2 174 base->PMCTRL = reg;
Pawel Zarembski 0:01f31e923fe2 175
Pawel Zarembski 0:01f31e923fe2 176 return kStatus_Success;
Pawel Zarembski 0:01f31e923fe2 177 }
Pawel Zarembski 0:01f31e923fe2 178 #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
Pawel Zarembski 0:01f31e923fe2 179
Pawel Zarembski 0:01f31e923fe2 180 /*!
Pawel Zarembski 0:01f31e923fe2 181 * brief Configures the system to WAIT power mode.
Pawel Zarembski 0:01f31e923fe2 182 *
Pawel Zarembski 0:01f31e923fe2 183 * param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 184 * return SMC configuration error code.
Pawel Zarembski 0:01f31e923fe2 185 */
Pawel Zarembski 0:01f31e923fe2 186 status_t SMC_SetPowerModeWait(SMC_Type *base)
Pawel Zarembski 0:01f31e923fe2 187 {
Pawel Zarembski 0:01f31e923fe2 188 /* configure Normal Wait mode */
Pawel Zarembski 0:01f31e923fe2 189 SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
Pawel Zarembski 0:01f31e923fe2 190 __DSB();
Pawel Zarembski 0:01f31e923fe2 191 __WFI();
Pawel Zarembski 0:01f31e923fe2 192 __ISB();
Pawel Zarembski 0:01f31e923fe2 193
Pawel Zarembski 0:01f31e923fe2 194 return kStatus_Success;
Pawel Zarembski 0:01f31e923fe2 195 }
Pawel Zarembski 0:01f31e923fe2 196
Pawel Zarembski 0:01f31e923fe2 197 /*!
Pawel Zarembski 0:01f31e923fe2 198 * brief Configures the system to Stop power mode.
Pawel Zarembski 0:01f31e923fe2 199 *
Pawel Zarembski 0:01f31e923fe2 200 * param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 201 * param option Partial Stop mode option.
Pawel Zarembski 0:01f31e923fe2 202 * return SMC configuration error code.
Pawel Zarembski 0:01f31e923fe2 203 */
Pawel Zarembski 0:01f31e923fe2 204 status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
Pawel Zarembski 0:01f31e923fe2 205 {
Pawel Zarembski 0:01f31e923fe2 206 uint8_t reg;
Pawel Zarembski 0:01f31e923fe2 207
Pawel Zarembski 0:01f31e923fe2 208 #if (defined(FSL_FEATURE_SMC_HAS_PSTOPO) && FSL_FEATURE_SMC_HAS_PSTOPO)
Pawel Zarembski 0:01f31e923fe2 209 /* configure the Partial Stop mode in Normal Stop mode */
Pawel Zarembski 0:01f31e923fe2 210 reg = base->STOPCTRL;
Pawel Zarembski 0:01f31e923fe2 211 reg &= ~SMC_STOPCTRL_PSTOPO_MASK;
Pawel Zarembski 0:01f31e923fe2 212 reg |= ((uint32_t)option << SMC_STOPCTRL_PSTOPO_SHIFT);
Pawel Zarembski 0:01f31e923fe2 213 base->STOPCTRL = reg;
Pawel Zarembski 0:01f31e923fe2 214 #endif
Pawel Zarembski 0:01f31e923fe2 215
Pawel Zarembski 0:01f31e923fe2 216 /* configure Normal Stop mode */
Pawel Zarembski 0:01f31e923fe2 217 reg = base->PMCTRL;
Pawel Zarembski 0:01f31e923fe2 218 reg &= ~SMC_PMCTRL_STOPM_MASK;
Pawel Zarembski 0:01f31e923fe2 219 reg |= (kSMC_StopNormal << SMC_PMCTRL_STOPM_SHIFT);
Pawel Zarembski 0:01f31e923fe2 220 base->PMCTRL = reg;
Pawel Zarembski 0:01f31e923fe2 221
Pawel Zarembski 0:01f31e923fe2 222 /* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */
Pawel Zarembski 0:01f31e923fe2 223 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
Pawel Zarembski 0:01f31e923fe2 224
Pawel Zarembski 0:01f31e923fe2 225 /* read back to make sure the configuration valid before enter stop mode */
Pawel Zarembski 0:01f31e923fe2 226 (void)base->PMCTRL;
Pawel Zarembski 0:01f31e923fe2 227 SMC_EnterStopRamFunc();
Pawel Zarembski 0:01f31e923fe2 228
Pawel Zarembski 0:01f31e923fe2 229 /* check whether the power mode enter Stop mode succeed */
Pawel Zarembski 0:01f31e923fe2 230 if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK)
Pawel Zarembski 0:01f31e923fe2 231 {
Pawel Zarembski 0:01f31e923fe2 232 return kStatus_SMC_StopAbort;
Pawel Zarembski 0:01f31e923fe2 233 }
Pawel Zarembski 0:01f31e923fe2 234 else
Pawel Zarembski 0:01f31e923fe2 235 {
Pawel Zarembski 0:01f31e923fe2 236 return kStatus_Success;
Pawel Zarembski 0:01f31e923fe2 237 }
Pawel Zarembski 0:01f31e923fe2 238 }
Pawel Zarembski 0:01f31e923fe2 239
Pawel Zarembski 0:01f31e923fe2 240 /*!
Pawel Zarembski 0:01f31e923fe2 241 * brief Configures the system to VLPR power mode.
Pawel Zarembski 0:01f31e923fe2 242 *
Pawel Zarembski 0:01f31e923fe2 243 * param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 244 * return SMC configuration error code.
Pawel Zarembski 0:01f31e923fe2 245 */
Pawel Zarembski 0:01f31e923fe2 246 status_t SMC_SetPowerModeVlpr(SMC_Type *base
Pawel Zarembski 0:01f31e923fe2 247 #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
Pawel Zarembski 0:01f31e923fe2 248 ,
Pawel Zarembski 0:01f31e923fe2 249 bool wakeupMode
Pawel Zarembski 0:01f31e923fe2 250 #endif
Pawel Zarembski 0:01f31e923fe2 251 )
Pawel Zarembski 0:01f31e923fe2 252 {
Pawel Zarembski 0:01f31e923fe2 253 uint8_t reg;
Pawel Zarembski 0:01f31e923fe2 254
Pawel Zarembski 0:01f31e923fe2 255 reg = base->PMCTRL;
Pawel Zarembski 0:01f31e923fe2 256 #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
Pawel Zarembski 0:01f31e923fe2 257 /* configure whether the system remains in VLP mode on an interrupt */
Pawel Zarembski 0:01f31e923fe2 258 if (wakeupMode)
Pawel Zarembski 0:01f31e923fe2 259 {
Pawel Zarembski 0:01f31e923fe2 260 /* exits to RUN mode on an interrupt */
Pawel Zarembski 0:01f31e923fe2 261 reg |= SMC_PMCTRL_LPWUI_MASK;
Pawel Zarembski 0:01f31e923fe2 262 }
Pawel Zarembski 0:01f31e923fe2 263 else
Pawel Zarembski 0:01f31e923fe2 264 {
Pawel Zarembski 0:01f31e923fe2 265 /* remains in VLP mode on an interrupt */
Pawel Zarembski 0:01f31e923fe2 266 reg &= ~SMC_PMCTRL_LPWUI_MASK;
Pawel Zarembski 0:01f31e923fe2 267 }
Pawel Zarembski 0:01f31e923fe2 268 #endif /* FSL_FEATURE_SMC_HAS_LPWUI */
Pawel Zarembski 0:01f31e923fe2 269
Pawel Zarembski 0:01f31e923fe2 270 /* configure VLPR mode */
Pawel Zarembski 0:01f31e923fe2 271 reg &= ~SMC_PMCTRL_RUNM_MASK;
Pawel Zarembski 0:01f31e923fe2 272 reg |= (kSMC_RunVlpr << SMC_PMCTRL_RUNM_SHIFT);
Pawel Zarembski 0:01f31e923fe2 273 base->PMCTRL = reg;
Pawel Zarembski 0:01f31e923fe2 274
Pawel Zarembski 0:01f31e923fe2 275 return kStatus_Success;
Pawel Zarembski 0:01f31e923fe2 276 }
Pawel Zarembski 0:01f31e923fe2 277
Pawel Zarembski 0:01f31e923fe2 278 /*!
Pawel Zarembski 0:01f31e923fe2 279 * brief Configures the system to VLPW power mode.
Pawel Zarembski 0:01f31e923fe2 280 *
Pawel Zarembski 0:01f31e923fe2 281 * param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 282 * return SMC configuration error code.
Pawel Zarembski 0:01f31e923fe2 283 */
Pawel Zarembski 0:01f31e923fe2 284 status_t SMC_SetPowerModeVlpw(SMC_Type *base)
Pawel Zarembski 0:01f31e923fe2 285 {
Pawel Zarembski 0:01f31e923fe2 286 /* configure VLPW mode */
Pawel Zarembski 0:01f31e923fe2 287 /* Set the SLEEPDEEP bit to enable deep sleep mode */
Pawel Zarembski 0:01f31e923fe2 288 SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
Pawel Zarembski 0:01f31e923fe2 289 __DSB();
Pawel Zarembski 0:01f31e923fe2 290 __WFI();
Pawel Zarembski 0:01f31e923fe2 291 __ISB();
Pawel Zarembski 0:01f31e923fe2 292
Pawel Zarembski 0:01f31e923fe2 293 return kStatus_Success;
Pawel Zarembski 0:01f31e923fe2 294 }
Pawel Zarembski 0:01f31e923fe2 295
Pawel Zarembski 0:01f31e923fe2 296 /*!
Pawel Zarembski 0:01f31e923fe2 297 * brief Configures the system to VLPS power mode.
Pawel Zarembski 0:01f31e923fe2 298 *
Pawel Zarembski 0:01f31e923fe2 299 * param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 300 * return SMC configuration error code.
Pawel Zarembski 0:01f31e923fe2 301 */
Pawel Zarembski 0:01f31e923fe2 302 status_t SMC_SetPowerModeVlps(SMC_Type *base)
Pawel Zarembski 0:01f31e923fe2 303 {
Pawel Zarembski 0:01f31e923fe2 304 uint8_t reg;
Pawel Zarembski 0:01f31e923fe2 305
Pawel Zarembski 0:01f31e923fe2 306 /* configure VLPS mode */
Pawel Zarembski 0:01f31e923fe2 307 reg = base->PMCTRL;
Pawel Zarembski 0:01f31e923fe2 308 reg &= ~SMC_PMCTRL_STOPM_MASK;
Pawel Zarembski 0:01f31e923fe2 309 reg |= (kSMC_StopVlps << SMC_PMCTRL_STOPM_SHIFT);
Pawel Zarembski 0:01f31e923fe2 310 base->PMCTRL = reg;
Pawel Zarembski 0:01f31e923fe2 311
Pawel Zarembski 0:01f31e923fe2 312 /* Set the SLEEPDEEP bit to enable deep sleep mode */
Pawel Zarembski 0:01f31e923fe2 313 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
Pawel Zarembski 0:01f31e923fe2 314
Pawel Zarembski 0:01f31e923fe2 315 /* read back to make sure the configuration valid before enter stop mode */
Pawel Zarembski 0:01f31e923fe2 316 (void)base->PMCTRL;
Pawel Zarembski 0:01f31e923fe2 317 SMC_EnterStopRamFunc();
Pawel Zarembski 0:01f31e923fe2 318
Pawel Zarembski 0:01f31e923fe2 319 /* check whether the power mode enter VLPS mode succeed */
Pawel Zarembski 0:01f31e923fe2 320 if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK)
Pawel Zarembski 0:01f31e923fe2 321 {
Pawel Zarembski 0:01f31e923fe2 322 return kStatus_SMC_StopAbort;
Pawel Zarembski 0:01f31e923fe2 323 }
Pawel Zarembski 0:01f31e923fe2 324 else
Pawel Zarembski 0:01f31e923fe2 325 {
Pawel Zarembski 0:01f31e923fe2 326 return kStatus_Success;
Pawel Zarembski 0:01f31e923fe2 327 }
Pawel Zarembski 0:01f31e923fe2 328 }
Pawel Zarembski 0:01f31e923fe2 329
Pawel Zarembski 0:01f31e923fe2 330 #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
Pawel Zarembski 0:01f31e923fe2 331 /*!
Pawel Zarembski 0:01f31e923fe2 332 * brief Configures the system to LLS power mode.
Pawel Zarembski 0:01f31e923fe2 333 *
Pawel Zarembski 0:01f31e923fe2 334 * param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 335 * return SMC configuration error code.
Pawel Zarembski 0:01f31e923fe2 336 */
Pawel Zarembski 0:01f31e923fe2 337 status_t SMC_SetPowerModeLls(SMC_Type *base
Pawel Zarembski 0:01f31e923fe2 338 #if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
Pawel Zarembski 0:01f31e923fe2 339 (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO))
Pawel Zarembski 0:01f31e923fe2 340 ,
Pawel Zarembski 0:01f31e923fe2 341 const smc_power_mode_lls_config_t *config
Pawel Zarembski 0:01f31e923fe2 342 #endif
Pawel Zarembski 0:01f31e923fe2 343 )
Pawel Zarembski 0:01f31e923fe2 344 {
Pawel Zarembski 0:01f31e923fe2 345 uint8_t reg;
Pawel Zarembski 0:01f31e923fe2 346
Pawel Zarembski 0:01f31e923fe2 347 /* configure to LLS mode */
Pawel Zarembski 0:01f31e923fe2 348 reg = base->PMCTRL;
Pawel Zarembski 0:01f31e923fe2 349 reg &= ~SMC_PMCTRL_STOPM_MASK;
Pawel Zarembski 0:01f31e923fe2 350 reg |= (kSMC_StopLls << SMC_PMCTRL_STOPM_SHIFT);
Pawel Zarembski 0:01f31e923fe2 351 base->PMCTRL = reg;
Pawel Zarembski 0:01f31e923fe2 352
Pawel Zarembski 0:01f31e923fe2 353 /* configure LLS sub-mode*/
Pawel Zarembski 0:01f31e923fe2 354 #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
Pawel Zarembski 0:01f31e923fe2 355 reg = base->STOPCTRL;
Pawel Zarembski 0:01f31e923fe2 356 reg &= ~SMC_STOPCTRL_LLSM_MASK;
Pawel Zarembski 0:01f31e923fe2 357 reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
Pawel Zarembski 0:01f31e923fe2 358 base->STOPCTRL = reg;
Pawel Zarembski 0:01f31e923fe2 359 #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
Pawel Zarembski 0:01f31e923fe2 360
Pawel Zarembski 0:01f31e923fe2 361 #if (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)
Pawel Zarembski 0:01f31e923fe2 362 if (config->enableLpoClock)
Pawel Zarembski 0:01f31e923fe2 363 {
Pawel Zarembski 0:01f31e923fe2 364 base->STOPCTRL &= ~SMC_STOPCTRL_LPOPO_MASK;
Pawel Zarembski 0:01f31e923fe2 365 }
Pawel Zarembski 0:01f31e923fe2 366 else
Pawel Zarembski 0:01f31e923fe2 367 {
Pawel Zarembski 0:01f31e923fe2 368 base->STOPCTRL |= SMC_STOPCTRL_LPOPO_MASK;
Pawel Zarembski 0:01f31e923fe2 369 }
Pawel Zarembski 0:01f31e923fe2 370 #endif /* FSL_FEATURE_SMC_HAS_LPOPO */
Pawel Zarembski 0:01f31e923fe2 371
Pawel Zarembski 0:01f31e923fe2 372 /* Set the SLEEPDEEP bit to enable deep sleep mode */
Pawel Zarembski 0:01f31e923fe2 373 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
Pawel Zarembski 0:01f31e923fe2 374
Pawel Zarembski 0:01f31e923fe2 375 /* read back to make sure the configuration valid before enter stop mode */
Pawel Zarembski 0:01f31e923fe2 376 (void)base->PMCTRL;
Pawel Zarembski 0:01f31e923fe2 377 SMC_EnterStopRamFunc();
Pawel Zarembski 0:01f31e923fe2 378
Pawel Zarembski 0:01f31e923fe2 379 /* check whether the power mode enter LLS mode succeed */
Pawel Zarembski 0:01f31e923fe2 380 if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK)
Pawel Zarembski 0:01f31e923fe2 381 {
Pawel Zarembski 0:01f31e923fe2 382 return kStatus_SMC_StopAbort;
Pawel Zarembski 0:01f31e923fe2 383 }
Pawel Zarembski 0:01f31e923fe2 384 else
Pawel Zarembski 0:01f31e923fe2 385 {
Pawel Zarembski 0:01f31e923fe2 386 return kStatus_Success;
Pawel Zarembski 0:01f31e923fe2 387 }
Pawel Zarembski 0:01f31e923fe2 388 }
Pawel Zarembski 0:01f31e923fe2 389 #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
Pawel Zarembski 0:01f31e923fe2 390
Pawel Zarembski 0:01f31e923fe2 391 #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
Pawel Zarembski 0:01f31e923fe2 392 /*!
Pawel Zarembski 0:01f31e923fe2 393 * brief Configures the system to VLLS power mode.
Pawel Zarembski 0:01f31e923fe2 394 *
Pawel Zarembski 0:01f31e923fe2 395 * param base SMC peripheral base address.
Pawel Zarembski 0:01f31e923fe2 396 * param config The VLLS power mode configuration structure.
Pawel Zarembski 0:01f31e923fe2 397 * return SMC configuration error code.
Pawel Zarembski 0:01f31e923fe2 398 */
Pawel Zarembski 0:01f31e923fe2 399 status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config)
Pawel Zarembski 0:01f31e923fe2 400 {
Pawel Zarembski 0:01f31e923fe2 401 uint8_t reg;
Pawel Zarembski 0:01f31e923fe2 402
Pawel Zarembski 0:01f31e923fe2 403 #if (defined(FSL_FEATURE_SMC_HAS_PORPO) && FSL_FEATURE_SMC_HAS_PORPO)
Pawel Zarembski 0:01f31e923fe2 404 #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) || \
Pawel Zarembski 0:01f31e923fe2 405 (defined(FSL_FEATURE_SMC_USE_STOPCTRL_VLLSM) && FSL_FEATURE_SMC_USE_STOPCTRL_VLLSM) || \
Pawel Zarembski 0:01f31e923fe2 406 (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
Pawel Zarembski 0:01f31e923fe2 407 if (config->subMode == kSMC_StopSub0)
Pawel Zarembski 0:01f31e923fe2 408 #endif
Pawel Zarembski 0:01f31e923fe2 409 {
Pawel Zarembski 0:01f31e923fe2 410 /* configure whether the Por Detect work in Vlls0 mode */
Pawel Zarembski 0:01f31e923fe2 411 if (config->enablePorDetectInVlls0)
Pawel Zarembski 0:01f31e923fe2 412 {
Pawel Zarembski 0:01f31e923fe2 413 #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
Pawel Zarembski 0:01f31e923fe2 414 base->VLLSCTRL &= ~SMC_VLLSCTRL_PORPO_MASK;
Pawel Zarembski 0:01f31e923fe2 415 #else
Pawel Zarembski 0:01f31e923fe2 416 base->STOPCTRL &= ~SMC_STOPCTRL_PORPO_MASK;
Pawel Zarembski 0:01f31e923fe2 417 #endif
Pawel Zarembski 0:01f31e923fe2 418 }
Pawel Zarembski 0:01f31e923fe2 419 else
Pawel Zarembski 0:01f31e923fe2 420 {
Pawel Zarembski 0:01f31e923fe2 421 #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
Pawel Zarembski 0:01f31e923fe2 422 base->VLLSCTRL |= SMC_VLLSCTRL_PORPO_MASK;
Pawel Zarembski 0:01f31e923fe2 423 #else
Pawel Zarembski 0:01f31e923fe2 424 base->STOPCTRL |= SMC_STOPCTRL_PORPO_MASK;
Pawel Zarembski 0:01f31e923fe2 425 #endif
Pawel Zarembski 0:01f31e923fe2 426 }
Pawel Zarembski 0:01f31e923fe2 427 }
Pawel Zarembski 0:01f31e923fe2 428 #endif /* FSL_FEATURE_SMC_HAS_PORPO */
Pawel Zarembski 0:01f31e923fe2 429
Pawel Zarembski 0:01f31e923fe2 430 #if (defined(FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION) && FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION)
Pawel Zarembski 0:01f31e923fe2 431 else if (config->subMode == kSMC_StopSub2)
Pawel Zarembski 0:01f31e923fe2 432 {
Pawel Zarembski 0:01f31e923fe2 433 /* configure whether the Por Detect work in Vlls0 mode */
Pawel Zarembski 0:01f31e923fe2 434 if (config->enableRam2InVlls2)
Pawel Zarembski 0:01f31e923fe2 435 {
Pawel Zarembski 0:01f31e923fe2 436 #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
Pawel Zarembski 0:01f31e923fe2 437 base->VLLSCTRL |= SMC_VLLSCTRL_RAM2PO_MASK;
Pawel Zarembski 0:01f31e923fe2 438 #else
Pawel Zarembski 0:01f31e923fe2 439 base->STOPCTRL |= SMC_STOPCTRL_RAM2PO_MASK;
Pawel Zarembski 0:01f31e923fe2 440 #endif
Pawel Zarembski 0:01f31e923fe2 441 }
Pawel Zarembski 0:01f31e923fe2 442 else
Pawel Zarembski 0:01f31e923fe2 443 {
Pawel Zarembski 0:01f31e923fe2 444 #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
Pawel Zarembski 0:01f31e923fe2 445 base->VLLSCTRL &= ~SMC_VLLSCTRL_RAM2PO_MASK;
Pawel Zarembski 0:01f31e923fe2 446 #else
Pawel Zarembski 0:01f31e923fe2 447 base->STOPCTRL &= ~SMC_STOPCTRL_RAM2PO_MASK;
Pawel Zarembski 0:01f31e923fe2 448 #endif
Pawel Zarembski 0:01f31e923fe2 449 }
Pawel Zarembski 0:01f31e923fe2 450 }
Pawel Zarembski 0:01f31e923fe2 451 else
Pawel Zarembski 0:01f31e923fe2 452 {
Pawel Zarembski 0:01f31e923fe2 453 }
Pawel Zarembski 0:01f31e923fe2 454 #endif /* FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION */
Pawel Zarembski 0:01f31e923fe2 455
Pawel Zarembski 0:01f31e923fe2 456 /* configure to VLLS mode */
Pawel Zarembski 0:01f31e923fe2 457 reg = base->PMCTRL;
Pawel Zarembski 0:01f31e923fe2 458 reg &= ~SMC_PMCTRL_STOPM_MASK;
Pawel Zarembski 0:01f31e923fe2 459 reg |= (kSMC_StopVlls << SMC_PMCTRL_STOPM_SHIFT);
Pawel Zarembski 0:01f31e923fe2 460 base->PMCTRL = reg;
Pawel Zarembski 0:01f31e923fe2 461
Pawel Zarembski 0:01f31e923fe2 462 /* configure the VLLS sub-mode */
Pawel Zarembski 0:01f31e923fe2 463 #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
Pawel Zarembski 0:01f31e923fe2 464 reg = base->VLLSCTRL;
Pawel Zarembski 0:01f31e923fe2 465 reg &= ~SMC_VLLSCTRL_VLLSM_MASK;
Pawel Zarembski 0:01f31e923fe2 466 reg |= ((uint32_t)config->subMode << SMC_VLLSCTRL_VLLSM_SHIFT);
Pawel Zarembski 0:01f31e923fe2 467 base->VLLSCTRL = reg;
Pawel Zarembski 0:01f31e923fe2 468 #else
Pawel Zarembski 0:01f31e923fe2 469 #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
Pawel Zarembski 0:01f31e923fe2 470 reg = base->STOPCTRL;
Pawel Zarembski 0:01f31e923fe2 471 reg &= ~SMC_STOPCTRL_LLSM_MASK;
Pawel Zarembski 0:01f31e923fe2 472 reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
Pawel Zarembski 0:01f31e923fe2 473 base->STOPCTRL = reg;
Pawel Zarembski 0:01f31e923fe2 474 #else
Pawel Zarembski 0:01f31e923fe2 475 reg = base->STOPCTRL;
Pawel Zarembski 0:01f31e923fe2 476 reg &= ~SMC_STOPCTRL_VLLSM_MASK;
Pawel Zarembski 0:01f31e923fe2 477 reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_VLLSM_SHIFT);
Pawel Zarembski 0:01f31e923fe2 478 base->STOPCTRL = reg;
Pawel Zarembski 0:01f31e923fe2 479 #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
Pawel Zarembski 0:01f31e923fe2 480 #endif
Pawel Zarembski 0:01f31e923fe2 481
Pawel Zarembski 0:01f31e923fe2 482 #if (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)
Pawel Zarembski 0:01f31e923fe2 483 if (config->enableLpoClock)
Pawel Zarembski 0:01f31e923fe2 484 {
Pawel Zarembski 0:01f31e923fe2 485 base->STOPCTRL &= ~SMC_STOPCTRL_LPOPO_MASK;
Pawel Zarembski 0:01f31e923fe2 486 }
Pawel Zarembski 0:01f31e923fe2 487 else
Pawel Zarembski 0:01f31e923fe2 488 {
Pawel Zarembski 0:01f31e923fe2 489 base->STOPCTRL |= SMC_STOPCTRL_LPOPO_MASK;
Pawel Zarembski 0:01f31e923fe2 490 }
Pawel Zarembski 0:01f31e923fe2 491 #endif /* FSL_FEATURE_SMC_HAS_LPOPO */
Pawel Zarembski 0:01f31e923fe2 492
Pawel Zarembski 0:01f31e923fe2 493 /* Set the SLEEPDEEP bit to enable deep sleep mode */
Pawel Zarembski 0:01f31e923fe2 494 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
Pawel Zarembski 0:01f31e923fe2 495
Pawel Zarembski 0:01f31e923fe2 496 /* read back to make sure the configuration valid before enter stop mode */
Pawel Zarembski 0:01f31e923fe2 497 (void)base->PMCTRL;
Pawel Zarembski 0:01f31e923fe2 498 SMC_EnterStopRamFunc();
Pawel Zarembski 0:01f31e923fe2 499
Pawel Zarembski 0:01f31e923fe2 500 /* check whether the power mode enter LLS mode succeed */
Pawel Zarembski 0:01f31e923fe2 501 if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK)
Pawel Zarembski 0:01f31e923fe2 502 {
Pawel Zarembski 0:01f31e923fe2 503 return kStatus_SMC_StopAbort;
Pawel Zarembski 0:01f31e923fe2 504 }
Pawel Zarembski 0:01f31e923fe2 505 else
Pawel Zarembski 0:01f31e923fe2 506 {
Pawel Zarembski 0:01f31e923fe2 507 return kStatus_Success;
Pawel Zarembski 0:01f31e923fe2 508 }
Pawel Zarembski 0:01f31e923fe2 509 }
Pawel Zarembski 0:01f31e923fe2 510 #endif /* FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE */