Arrow / Mbed OS DAPLink Reset

Repostiory containing DAPLink source code with Reset Pin workaround for HANI_IOT board.

Upstream: https://github.com/ARMmbed/DAPLink

source/hic_hal/freescale/k26f/fsl_edma.h@0:01f31e923fe2, 2020-04-07 (annotated)

Committer:
Pawel Zarembski
Date:
Tue Apr 07 12:55:42 2020 +0200
Revision:
0:01f31e923fe2
hani: DAPLink with reset workaround

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Pawel Zarembski 0:01f31e923fe2 1 /*
Pawel Zarembski 0:01f31e923fe2 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
Pawel Zarembski 0:01f31e923fe2 3 * Copyright 2016-2018 NXP
Pawel Zarembski 0:01f31e923fe2 4 * All rights reserved.
Pawel Zarembski 0:01f31e923fe2 5 *
Pawel Zarembski 0:01f31e923fe2 6 * SPDX-License-Identifier: BSD-3-Clause
Pawel Zarembski 0:01f31e923fe2 7 */
Pawel Zarembski 0:01f31e923fe2 8
Pawel Zarembski 0:01f31e923fe2 9 #ifndef _FSL_EDMA_H_
Pawel Zarembski 0:01f31e923fe2 10 #define _FSL_EDMA_H_
Pawel Zarembski 0:01f31e923fe2 11
Pawel Zarembski 0:01f31e923fe2 12 #include "fsl_common.h"
Pawel Zarembski 0:01f31e923fe2 13
Pawel Zarembski 0:01f31e923fe2 14 /*!
Pawel Zarembski 0:01f31e923fe2 15 * @addtogroup edma
Pawel Zarembski 0:01f31e923fe2 16 * @{
Pawel Zarembski 0:01f31e923fe2 17 */
Pawel Zarembski 0:01f31e923fe2 18
Pawel Zarembski 0:01f31e923fe2 19 /*******************************************************************************
Pawel Zarembski 0:01f31e923fe2 20 * Definitions
Pawel Zarembski 0:01f31e923fe2 21 ******************************************************************************/
Pawel Zarembski 0:01f31e923fe2 22
Pawel Zarembski 0:01f31e923fe2 23 /*! @name Driver version */
Pawel Zarembski 0:01f31e923fe2 24 /*@{*/
Pawel Zarembski 0:01f31e923fe2 25 /*! @brief eDMA driver version */
Pawel Zarembski 0:01f31e923fe2 26 #define FSL_EDMA_DRIVER_VERSION (MAKE_VERSION(2, 1, 4)) /*!< Version 2.1.4. */
Pawel Zarembski 0:01f31e923fe2 27 /*@}*/
Pawel Zarembski 0:01f31e923fe2 28
Pawel Zarembski 0:01f31e923fe2 29 /*! @brief Compute the offset unit from DCHPRI3 */
Pawel Zarembski 0:01f31e923fe2 30 #define DMA_DCHPRI_INDEX(channel) (((channel) & ~0x03U) | (3 - ((channel)&0x03U)))
Pawel Zarembski 0:01f31e923fe2 31
Pawel Zarembski 0:01f31e923fe2 32 /*! @brief Get the pointer of DCHPRIn */
Pawel Zarembski 0:01f31e923fe2 33 #define DMA_DCHPRIn(base, channel) ((volatile uint8_t *)&((base)->DCHPRI3))[DMA_DCHPRI_INDEX(channel)]
Pawel Zarembski 0:01f31e923fe2 34
Pawel Zarembski 0:01f31e923fe2 35 /*! @brief eDMA transfer configuration */
Pawel Zarembski 0:01f31e923fe2 36 typedef enum _edma_transfer_size
Pawel Zarembski 0:01f31e923fe2 37 {
Pawel Zarembski 0:01f31e923fe2 38 kEDMA_TransferSize1Bytes = 0x0U, /*!< Source/Destination data transfer size is 1 byte every time */
Pawel Zarembski 0:01f31e923fe2 39 kEDMA_TransferSize2Bytes = 0x1U, /*!< Source/Destination data transfer size is 2 bytes every time */
Pawel Zarembski 0:01f31e923fe2 40 kEDMA_TransferSize4Bytes = 0x2U, /*!< Source/Destination data transfer size is 4 bytes every time */
Pawel Zarembski 0:01f31e923fe2 41 kEDMA_TransferSize8Bytes = 0x3U, /*!< Source/Destination data transfer size is 8 bytes every time */
Pawel Zarembski 0:01f31e923fe2 42 kEDMA_TransferSize16Bytes = 0x4U, /*!< Source/Destination data transfer size is 16 bytes every time */
Pawel Zarembski 0:01f31e923fe2 43 kEDMA_TransferSize32Bytes = 0x5U, /*!< Source/Destination data transfer size is 32 bytes every time */
Pawel Zarembski 0:01f31e923fe2 44 } edma_transfer_size_t;
Pawel Zarembski 0:01f31e923fe2 45
Pawel Zarembski 0:01f31e923fe2 46 /*! @brief eDMA modulo configuration */
Pawel Zarembski 0:01f31e923fe2 47 typedef enum _edma_modulo
Pawel Zarembski 0:01f31e923fe2 48 {
Pawel Zarembski 0:01f31e923fe2 49 kEDMA_ModuloDisable = 0x0U, /*!< Disable modulo */
Pawel Zarembski 0:01f31e923fe2 50 kEDMA_Modulo2bytes, /*!< Circular buffer size is 2 bytes. */
Pawel Zarembski 0:01f31e923fe2 51 kEDMA_Modulo4bytes, /*!< Circular buffer size is 4 bytes. */
Pawel Zarembski 0:01f31e923fe2 52 kEDMA_Modulo8bytes, /*!< Circular buffer size is 8 bytes. */
Pawel Zarembski 0:01f31e923fe2 53 kEDMA_Modulo16bytes, /*!< Circular buffer size is 16 bytes. */
Pawel Zarembski 0:01f31e923fe2 54 kEDMA_Modulo32bytes, /*!< Circular buffer size is 32 bytes. */
Pawel Zarembski 0:01f31e923fe2 55 kEDMA_Modulo64bytes, /*!< Circular buffer size is 64 bytes. */
Pawel Zarembski 0:01f31e923fe2 56 kEDMA_Modulo128bytes, /*!< Circular buffer size is 128 bytes. */
Pawel Zarembski 0:01f31e923fe2 57 kEDMA_Modulo256bytes, /*!< Circular buffer size is 256 bytes. */
Pawel Zarembski 0:01f31e923fe2 58 kEDMA_Modulo512bytes, /*!< Circular buffer size is 512 bytes. */
Pawel Zarembski 0:01f31e923fe2 59 kEDMA_Modulo1Kbytes, /*!< Circular buffer size is 1 K bytes. */
Pawel Zarembski 0:01f31e923fe2 60 kEDMA_Modulo2Kbytes, /*!< Circular buffer size is 2 K bytes. */
Pawel Zarembski 0:01f31e923fe2 61 kEDMA_Modulo4Kbytes, /*!< Circular buffer size is 4 K bytes. */
Pawel Zarembski 0:01f31e923fe2 62 kEDMA_Modulo8Kbytes, /*!< Circular buffer size is 8 K bytes. */
Pawel Zarembski 0:01f31e923fe2 63 kEDMA_Modulo16Kbytes, /*!< Circular buffer size is 16 K bytes. */
Pawel Zarembski 0:01f31e923fe2 64 kEDMA_Modulo32Kbytes, /*!< Circular buffer size is 32 K bytes. */
Pawel Zarembski 0:01f31e923fe2 65 kEDMA_Modulo64Kbytes, /*!< Circular buffer size is 64 K bytes. */
Pawel Zarembski 0:01f31e923fe2 66 kEDMA_Modulo128Kbytes, /*!< Circular buffer size is 128 K bytes. */
Pawel Zarembski 0:01f31e923fe2 67 kEDMA_Modulo256Kbytes, /*!< Circular buffer size is 256 K bytes. */
Pawel Zarembski 0:01f31e923fe2 68 kEDMA_Modulo512Kbytes, /*!< Circular buffer size is 512 K bytes. */
Pawel Zarembski 0:01f31e923fe2 69 kEDMA_Modulo1Mbytes, /*!< Circular buffer size is 1 M bytes. */
Pawel Zarembski 0:01f31e923fe2 70 kEDMA_Modulo2Mbytes, /*!< Circular buffer size is 2 M bytes. */
Pawel Zarembski 0:01f31e923fe2 71 kEDMA_Modulo4Mbytes, /*!< Circular buffer size is 4 M bytes. */
Pawel Zarembski 0:01f31e923fe2 72 kEDMA_Modulo8Mbytes, /*!< Circular buffer size is 8 M bytes. */
Pawel Zarembski 0:01f31e923fe2 73 kEDMA_Modulo16Mbytes, /*!< Circular buffer size is 16 M bytes. */
Pawel Zarembski 0:01f31e923fe2 74 kEDMA_Modulo32Mbytes, /*!< Circular buffer size is 32 M bytes. */
Pawel Zarembski 0:01f31e923fe2 75 kEDMA_Modulo64Mbytes, /*!< Circular buffer size is 64 M bytes. */
Pawel Zarembski 0:01f31e923fe2 76 kEDMA_Modulo128Mbytes, /*!< Circular buffer size is 128 M bytes. */
Pawel Zarembski 0:01f31e923fe2 77 kEDMA_Modulo256Mbytes, /*!< Circular buffer size is 256 M bytes. */
Pawel Zarembski 0:01f31e923fe2 78 kEDMA_Modulo512Mbytes, /*!< Circular buffer size is 512 M bytes. */
Pawel Zarembski 0:01f31e923fe2 79 kEDMA_Modulo1Gbytes, /*!< Circular buffer size is 1 G bytes. */
Pawel Zarembski 0:01f31e923fe2 80 kEDMA_Modulo2Gbytes, /*!< Circular buffer size is 2 G bytes. */
Pawel Zarembski 0:01f31e923fe2 81 } edma_modulo_t;
Pawel Zarembski 0:01f31e923fe2 82
Pawel Zarembski 0:01f31e923fe2 83 /*! @brief Bandwidth control */
Pawel Zarembski 0:01f31e923fe2 84 typedef enum _edma_bandwidth
Pawel Zarembski 0:01f31e923fe2 85 {
Pawel Zarembski 0:01f31e923fe2 86 kEDMA_BandwidthStallNone = 0x0U, /*!< No eDMA engine stalls. */
Pawel Zarembski 0:01f31e923fe2 87 kEDMA_BandwidthStall4Cycle = 0x2U, /*!< eDMA engine stalls for 4 cycles after each read/write. */
Pawel Zarembski 0:01f31e923fe2 88 kEDMA_BandwidthStall8Cycle = 0x3U, /*!< eDMA engine stalls for 8 cycles after each read/write. */
Pawel Zarembski 0:01f31e923fe2 89 } edma_bandwidth_t;
Pawel Zarembski 0:01f31e923fe2 90
Pawel Zarembski 0:01f31e923fe2 91 /*! @brief Channel link type */
Pawel Zarembski 0:01f31e923fe2 92 typedef enum _edma_channel_link_type
Pawel Zarembski 0:01f31e923fe2 93 {
Pawel Zarembski 0:01f31e923fe2 94 kEDMA_LinkNone = 0x0U, /*!< No channel link */
Pawel Zarembski 0:01f31e923fe2 95 kEDMA_MinorLink, /*!< Channel link after each minor loop */
Pawel Zarembski 0:01f31e923fe2 96 kEDMA_MajorLink, /*!< Channel link while major loop count exhausted */
Pawel Zarembski 0:01f31e923fe2 97 } edma_channel_link_type_t;
Pawel Zarembski 0:01f31e923fe2 98
Pawel Zarembski 0:01f31e923fe2 99 /*!@brief eDMA channel status flags. */
Pawel Zarembski 0:01f31e923fe2 100 enum _edma_channel_status_flags
Pawel Zarembski 0:01f31e923fe2 101 {
Pawel Zarembski 0:01f31e923fe2 102 kEDMA_DoneFlag = 0x1U, /*!< DONE flag, set while transfer finished, CITER value exhausted*/
Pawel Zarembski 0:01f31e923fe2 103 kEDMA_ErrorFlag = 0x2U, /*!< eDMA error flag, an error occurred in a transfer */
Pawel Zarembski 0:01f31e923fe2 104 kEDMA_InterruptFlag = 0x4U, /*!< eDMA interrupt flag, set while an interrupt occurred of this channel */
Pawel Zarembski 0:01f31e923fe2 105 };
Pawel Zarembski 0:01f31e923fe2 106
Pawel Zarembski 0:01f31e923fe2 107 /*! @brief eDMA channel error status flags. */
Pawel Zarembski 0:01f31e923fe2 108 enum _edma_error_status_flags
Pawel Zarembski 0:01f31e923fe2 109 {
Pawel Zarembski 0:01f31e923fe2 110 kEDMA_DestinationBusErrorFlag = DMA_ES_DBE_MASK, /*!< Bus error on destination address */
Pawel Zarembski 0:01f31e923fe2 111 kEDMA_SourceBusErrorFlag = DMA_ES_SBE_MASK, /*!< Bus error on the source address */
Pawel Zarembski 0:01f31e923fe2 112 kEDMA_ScatterGatherErrorFlag = DMA_ES_SGE_MASK, /*!< Error on the Scatter/Gather address, not 32byte aligned. */
Pawel Zarembski 0:01f31e923fe2 113 kEDMA_NbytesErrorFlag = DMA_ES_NCE_MASK, /*!< NBYTES/CITER configuration error */
Pawel Zarembski 0:01f31e923fe2 114 kEDMA_DestinationOffsetErrorFlag = DMA_ES_DOE_MASK, /*!< Destination offset not aligned with destination size */
Pawel Zarembski 0:01f31e923fe2 115 kEDMA_DestinationAddressErrorFlag = DMA_ES_DAE_MASK, /*!< Destination address not aligned with destination size */
Pawel Zarembski 0:01f31e923fe2 116 kEDMA_SourceOffsetErrorFlag = DMA_ES_SOE_MASK, /*!< Source offset not aligned with source size */
Pawel Zarembski 0:01f31e923fe2 117 kEDMA_SourceAddressErrorFlag = DMA_ES_SAE_MASK, /*!< Source address not aligned with source size*/
Pawel Zarembski 0:01f31e923fe2 118 kEDMA_ErrorChannelFlag = DMA_ES_ERRCHN_MASK, /*!< Error channel number of the cancelled channel number */
Pawel Zarembski 0:01f31e923fe2 119 kEDMA_ChannelPriorityErrorFlag = DMA_ES_CPE_MASK, /*!< Channel priority is not unique. */
Pawel Zarembski 0:01f31e923fe2 120 kEDMA_TransferCanceledFlag = DMA_ES_ECX_MASK, /*!< Transfer cancelled */
Pawel Zarembski 0:01f31e923fe2 121 #if defined(FSL_FEATURE_EDMA_CHANNEL_GROUP_COUNT) && FSL_FEATURE_EDMA_CHANNEL_GROUP_COUNT > 1
Pawel Zarembski 0:01f31e923fe2 122 kEDMA_GroupPriorityErrorFlag = DMA_ES_GPE_MASK, /*!< Group priority is not unique. */
Pawel Zarembski 0:01f31e923fe2 123 #endif
Pawel Zarembski 0:01f31e923fe2 124 kEDMA_ValidFlag = (int)DMA_ES_VLD_MASK, /*!< No error occurred, this bit is 0. Otherwise, it is 1. */
Pawel Zarembski 0:01f31e923fe2 125 };
Pawel Zarembski 0:01f31e923fe2 126
Pawel Zarembski 0:01f31e923fe2 127 /*! @brief eDMA interrupt source */
Pawel Zarembski 0:01f31e923fe2 128 typedef enum _edma_interrupt_enable
Pawel Zarembski 0:01f31e923fe2 129 {
Pawel Zarembski 0:01f31e923fe2 130 kEDMA_ErrorInterruptEnable = 0x1U, /*!< Enable interrupt while channel error occurs. */
Pawel Zarembski 0:01f31e923fe2 131 kEDMA_MajorInterruptEnable = DMA_CSR_INTMAJOR_MASK, /*!< Enable interrupt while major count exhausted. */
Pawel Zarembski 0:01f31e923fe2 132 kEDMA_HalfInterruptEnable = DMA_CSR_INTHALF_MASK, /*!< Enable interrupt while major count to half value. */
Pawel Zarembski 0:01f31e923fe2 133 } edma_interrupt_enable_t;
Pawel Zarembski 0:01f31e923fe2 134
Pawel Zarembski 0:01f31e923fe2 135 /*! @brief eDMA transfer type */
Pawel Zarembski 0:01f31e923fe2 136 typedef enum _edma_transfer_type
Pawel Zarembski 0:01f31e923fe2 137 {
Pawel Zarembski 0:01f31e923fe2 138 kEDMA_MemoryToMemory = 0x0U, /*!< Transfer from memory to memory */
Pawel Zarembski 0:01f31e923fe2 139 kEDMA_PeripheralToMemory, /*!< Transfer from peripheral to memory */
Pawel Zarembski 0:01f31e923fe2 140 kEDMA_MemoryToPeripheral, /*!< Transfer from memory to peripheral */
Pawel Zarembski 0:01f31e923fe2 141 } edma_transfer_type_t;
Pawel Zarembski 0:01f31e923fe2 142
Pawel Zarembski 0:01f31e923fe2 143 /*! @brief eDMA transfer status */
Pawel Zarembski 0:01f31e923fe2 144 enum _edma_transfer_status
Pawel Zarembski 0:01f31e923fe2 145 {
Pawel Zarembski 0:01f31e923fe2 146 kStatus_EDMA_QueueFull = MAKE_STATUS(kStatusGroup_EDMA, 0), /*!< TCD queue is full. */
Pawel Zarembski 0:01f31e923fe2 147 kStatus_EDMA_Busy = MAKE_STATUS(kStatusGroup_EDMA, 1), /*!< Channel is busy and can't handle the
Pawel Zarembski 0:01f31e923fe2 148 transfer request. */
Pawel Zarembski 0:01f31e923fe2 149 };
Pawel Zarembski 0:01f31e923fe2 150
Pawel Zarembski 0:01f31e923fe2 151 /*! @brief eDMA global configuration structure.*/
Pawel Zarembski 0:01f31e923fe2 152 typedef struct _edma_config
Pawel Zarembski 0:01f31e923fe2 153 {
Pawel Zarembski 0:01f31e923fe2 154 bool enableContinuousLinkMode; /*!< Enable (true) continuous link mode. Upon minor loop completion, the channel
Pawel Zarembski 0:01f31e923fe2 155 activates again if that channel has a minor loop channel link enabled and
Pawel Zarembski 0:01f31e923fe2 156 the link channel is itself. */
Pawel Zarembski 0:01f31e923fe2 157 bool enableHaltOnError; /*!< Enable (true) transfer halt on error. Any error causes the HALT bit to set.
Pawel Zarembski 0:01f31e923fe2 158 Subsequently, all service requests are ignored until the HALT bit is cleared.*/
Pawel Zarembski 0:01f31e923fe2 159 bool enableRoundRobinArbitration; /*!< Enable (true) round robin channel arbitration method or fixed priority
Pawel Zarembski 0:01f31e923fe2 160 arbitration is used for channel selection */
Pawel Zarembski 0:01f31e923fe2 161 bool enableDebugMode; /*!< Enable(true) eDMA debug mode. When in debug mode, the eDMA stalls the start of
Pawel Zarembski 0:01f31e923fe2 162 a new channel. Executing channels are allowed to complete. */
Pawel Zarembski 0:01f31e923fe2 163 } edma_config_t;
Pawel Zarembski 0:01f31e923fe2 164
Pawel Zarembski 0:01f31e923fe2 165 /*!
Pawel Zarembski 0:01f31e923fe2 166 * @brief eDMA transfer configuration
Pawel Zarembski 0:01f31e923fe2 167 *
Pawel Zarembski 0:01f31e923fe2 168 * This structure configures the source/destination transfer attribute.
Pawel Zarembski 0:01f31e923fe2 169 */
Pawel Zarembski 0:01f31e923fe2 170 typedef struct _edma_transfer_config
Pawel Zarembski 0:01f31e923fe2 171 {
Pawel Zarembski 0:01f31e923fe2 172 uint32_t srcAddr; /*!< Source data address. */
Pawel Zarembski 0:01f31e923fe2 173 uint32_t destAddr; /*!< Destination data address. */
Pawel Zarembski 0:01f31e923fe2 174 edma_transfer_size_t srcTransferSize; /*!< Source data transfer size. */
Pawel Zarembski 0:01f31e923fe2 175 edma_transfer_size_t destTransferSize; /*!< Destination data transfer size. */
Pawel Zarembski 0:01f31e923fe2 176 int16_t srcOffset; /*!< Sign-extended offset applied to the current source address to
Pawel Zarembski 0:01f31e923fe2 177 form the next-state value as each source read is completed. */
Pawel Zarembski 0:01f31e923fe2 178 int16_t destOffset; /*!< Sign-extended offset applied to the current destination address to
Pawel Zarembski 0:01f31e923fe2 179 form the next-state value as each destination write is completed. */
Pawel Zarembski 0:01f31e923fe2 180 uint32_t minorLoopBytes; /*!< Bytes to transfer in a minor loop*/
Pawel Zarembski 0:01f31e923fe2 181 uint32_t majorLoopCounts; /*!< Major loop iteration count. */
Pawel Zarembski 0:01f31e923fe2 182 } edma_transfer_config_t;
Pawel Zarembski 0:01f31e923fe2 183
Pawel Zarembski 0:01f31e923fe2 184 /*! @brief eDMA channel priority configuration */
Pawel Zarembski 0:01f31e923fe2 185 typedef struct _edma_channel_Preemption_config
Pawel Zarembski 0:01f31e923fe2 186 {
Pawel Zarembski 0:01f31e923fe2 187 bool enableChannelPreemption; /*!< If true: a channel can be suspended by other channel with higher priority */
Pawel Zarembski 0:01f31e923fe2 188 bool enablePreemptAbility; /*!< If true: a channel can suspend other channel with low priority */
Pawel Zarembski 0:01f31e923fe2 189 uint8_t channelPriority; /*!< Channel priority */
Pawel Zarembski 0:01f31e923fe2 190 } edma_channel_Preemption_config_t;
Pawel Zarembski 0:01f31e923fe2 191
Pawel Zarembski 0:01f31e923fe2 192 /*! @brief eDMA minor offset configuration */
Pawel Zarembski 0:01f31e923fe2 193 typedef struct _edma_minor_offset_config
Pawel Zarembski 0:01f31e923fe2 194 {
Pawel Zarembski 0:01f31e923fe2 195 bool enableSrcMinorOffset; /*!< Enable(true) or Disable(false) source minor loop offset. */
Pawel Zarembski 0:01f31e923fe2 196 bool enableDestMinorOffset; /*!< Enable(true) or Disable(false) destination minor loop offset. */
Pawel Zarembski 0:01f31e923fe2 197 uint32_t minorOffset; /*!< Offset for a minor loop mapping. */
Pawel Zarembski 0:01f31e923fe2 198 } edma_minor_offset_config_t;
Pawel Zarembski 0:01f31e923fe2 199
Pawel Zarembski 0:01f31e923fe2 200 /*!
Pawel Zarembski 0:01f31e923fe2 201 * @brief eDMA TCD.
Pawel Zarembski 0:01f31e923fe2 202 *
Pawel Zarembski 0:01f31e923fe2 203 * This structure is same as TCD register which is described in reference manual,
Pawel Zarembski 0:01f31e923fe2 204 * and is used to configure the scatter/gather feature as a next hardware TCD.
Pawel Zarembski 0:01f31e923fe2 205 */
Pawel Zarembski 0:01f31e923fe2 206 typedef struct _edma_tcd
Pawel Zarembski 0:01f31e923fe2 207 {
Pawel Zarembski 0:01f31e923fe2 208 __IO uint32_t SADDR; /*!< SADDR register, used to save source address */
Pawel Zarembski 0:01f31e923fe2 209 __IO uint16_t SOFF; /*!< SOFF register, save offset bytes every transfer */
Pawel Zarembski 0:01f31e923fe2 210 __IO uint16_t ATTR; /*!< ATTR register, source/destination transfer size and modulo */
Pawel Zarembski 0:01f31e923fe2 211 __IO uint32_t NBYTES; /*!< Nbytes register, minor loop length in bytes */
Pawel Zarembski 0:01f31e923fe2 212 __IO uint32_t SLAST; /*!< SLAST register */
Pawel Zarembski 0:01f31e923fe2 213 __IO uint32_t DADDR; /*!< DADDR register, used for destination address */
Pawel Zarembski 0:01f31e923fe2 214 __IO uint16_t DOFF; /*!< DOFF register, used for destination offset */
Pawel Zarembski 0:01f31e923fe2 215 __IO uint16_t CITER; /*!< CITER register, current minor loop numbers, for unfinished minor loop.*/
Pawel Zarembski 0:01f31e923fe2 216 __IO uint32_t DLAST_SGA; /*!< DLASTSGA register, next tcd address used in scatter-gather mode */
Pawel Zarembski 0:01f31e923fe2 217 __IO uint16_t CSR; /*!< CSR register, for TCD control status */
Pawel Zarembski 0:01f31e923fe2 218 __IO uint16_t BITER; /*!< BITER register, begin minor loop count. */
Pawel Zarembski 0:01f31e923fe2 219 } edma_tcd_t;
Pawel Zarembski 0:01f31e923fe2 220
Pawel Zarembski 0:01f31e923fe2 221 /*! @brief Callback for eDMA */
Pawel Zarembski 0:01f31e923fe2 222 struct _edma_handle;
Pawel Zarembski 0:01f31e923fe2 223
Pawel Zarembski 0:01f31e923fe2 224 /*! @brief Define callback function for eDMA.
Pawel Zarembski 0:01f31e923fe2 225 *
Pawel Zarembski 0:01f31e923fe2 226 * This callback function is called in the EDMA interrupt handle.
Pawel Zarembski 0:01f31e923fe2 227 * In normal mode, run into callback function means the transfer users need is done.
Pawel Zarembski 0:01f31e923fe2 228 * In scatter gather mode, run into callback function means a transfer control block (tcd) is finished. Not
Pawel Zarembski 0:01f31e923fe2 229 * all transfer finished, users can get the finished tcd numbers using interface EDMA_GetUnusedTCDNumber.
Pawel Zarembski 0:01f31e923fe2 230 *
Pawel Zarembski 0:01f31e923fe2 231 * @param handle EDMA handle pointer, users shall not touch the values inside.
Pawel Zarembski 0:01f31e923fe2 232 * @param userData The callback user parameter pointer. Users can use this parameter to involve things users need to
Pawel Zarembski 0:01f31e923fe2 233 * change in EDMA callback function.
Pawel Zarembski 0:01f31e923fe2 234 * @param transferDone If the current loaded transfer done. In normal mode it means if all transfer done. In scatter
Pawel Zarembski 0:01f31e923fe2 235 * gather mode, this parameter shows is the current transfer block in EDMA register is done. As the
Pawel Zarembski 0:01f31e923fe2 236 * load of core is different, it will be different if the new tcd loaded into EDMA registers while
Pawel Zarembski 0:01f31e923fe2 237 * this callback called. If true, it always means new tcd still not loaded into registers, while
Pawel Zarembski 0:01f31e923fe2 238 * false means new tcd already loaded into registers.
Pawel Zarembski 0:01f31e923fe2 239 * @param tcds How many tcds are done from the last callback. This parameter only used in scatter gather mode. It
Pawel Zarembski 0:01f31e923fe2 240 * tells user how many tcds are finished between the last callback and this.
Pawel Zarembski 0:01f31e923fe2 241 */
Pawel Zarembski 0:01f31e923fe2 242 typedef void (*edma_callback)(struct _edma_handle *handle, void *userData, bool transferDone, uint32_t tcds);
Pawel Zarembski 0:01f31e923fe2 243
Pawel Zarembski 0:01f31e923fe2 244 /*! @brief eDMA transfer handle structure */
Pawel Zarembski 0:01f31e923fe2 245 typedef struct _edma_handle
Pawel Zarembski 0:01f31e923fe2 246 {
Pawel Zarembski 0:01f31e923fe2 247 edma_callback callback; /*!< Callback function for major count exhausted. */
Pawel Zarembski 0:01f31e923fe2 248 void *userData; /*!< Callback function parameter. */
Pawel Zarembski 0:01f31e923fe2 249 DMA_Type *base; /*!< eDMA peripheral base address. */
Pawel Zarembski 0:01f31e923fe2 250 edma_tcd_t *tcdPool; /*!< Pointer to memory stored TCDs. */
Pawel Zarembski 0:01f31e923fe2 251 uint8_t channel; /*!< eDMA channel number. */
Pawel Zarembski 0:01f31e923fe2 252 volatile int8_t header; /*!< The first TCD index. Should point to the next TCD to be loaded into the eDMA engine. */
Pawel Zarembski 0:01f31e923fe2 253 volatile int8_t tail; /*!< The last TCD index. Should point to the next TCD to be stored into the memory pool. */
Pawel Zarembski 0:01f31e923fe2 254 volatile int8_t tcdUsed; /*!< The number of used TCD slots. Should reflect the number of TCDs can be used/loaded in
Pawel Zarembski 0:01f31e923fe2 255 the memory. */
Pawel Zarembski 0:01f31e923fe2 256 volatile int8_t tcdSize; /*!< The total number of TCD slots in the queue. */
Pawel Zarembski 0:01f31e923fe2 257 uint8_t flags; /*!< The status of the current channel. */
Pawel Zarembski 0:01f31e923fe2 258 } edma_handle_t;
Pawel Zarembski 0:01f31e923fe2 259
Pawel Zarembski 0:01f31e923fe2 260 /*******************************************************************************
Pawel Zarembski 0:01f31e923fe2 261 * APIs
Pawel Zarembski 0:01f31e923fe2 262 ******************************************************************************/
Pawel Zarembski 0:01f31e923fe2 263 #if defined(__cplusplus)
Pawel Zarembski 0:01f31e923fe2 264 extern "C" {
Pawel Zarembski 0:01f31e923fe2 265 #endif /* __cplusplus */
Pawel Zarembski 0:01f31e923fe2 266
Pawel Zarembski 0:01f31e923fe2 267 /*!
Pawel Zarembski 0:01f31e923fe2 268 * @name eDMA initialization and de-initialization
Pawel Zarembski 0:01f31e923fe2 269 * @{
Pawel Zarembski 0:01f31e923fe2 270 */
Pawel Zarembski 0:01f31e923fe2 271
Pawel Zarembski 0:01f31e923fe2 272 /*!
Pawel Zarembski 0:01f31e923fe2 273 * @brief Initializes the eDMA peripheral.
Pawel Zarembski 0:01f31e923fe2 274 *
Pawel Zarembski 0:01f31e923fe2 275 * This function ungates the eDMA clock and configures the eDMA peripheral according
Pawel Zarembski 0:01f31e923fe2 276 * to the configuration structure.
Pawel Zarembski 0:01f31e923fe2 277 *
Pawel Zarembski 0:01f31e923fe2 278 * @param base eDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 279 * @param config A pointer to the configuration structure, see "edma_config_t".
Pawel Zarembski 0:01f31e923fe2 280 * @note This function enables the minor loop map feature.
Pawel Zarembski 0:01f31e923fe2 281 */
Pawel Zarembski 0:01f31e923fe2 282 void EDMA_Init(DMA_Type *base, const edma_config_t *config);
Pawel Zarembski 0:01f31e923fe2 283
Pawel Zarembski 0:01f31e923fe2 284 /*!
Pawel Zarembski 0:01f31e923fe2 285 * @brief Deinitializes the eDMA peripheral.
Pawel Zarembski 0:01f31e923fe2 286 *
Pawel Zarembski 0:01f31e923fe2 287 * This function gates the eDMA clock.
Pawel Zarembski 0:01f31e923fe2 288 *
Pawel Zarembski 0:01f31e923fe2 289 * @param base eDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 290 */
Pawel Zarembski 0:01f31e923fe2 291 void EDMA_Deinit(DMA_Type *base);
Pawel Zarembski 0:01f31e923fe2 292
Pawel Zarembski 0:01f31e923fe2 293 /*!
Pawel Zarembski 0:01f31e923fe2 294 * @brief Push content of TCD structure into hardware TCD register.
Pawel Zarembski 0:01f31e923fe2 295 *
Pawel Zarembski 0:01f31e923fe2 296 * @param base EDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 297 * @param channel EDMA channel number.
Pawel Zarembski 0:01f31e923fe2 298 * @param tcd Point to TCD structure.
Pawel Zarembski 0:01f31e923fe2 299 */
Pawel Zarembski 0:01f31e923fe2 300 void EDMA_InstallTCD(DMA_Type *base, uint32_t channel, edma_tcd_t *tcd);
Pawel Zarembski 0:01f31e923fe2 301
Pawel Zarembski 0:01f31e923fe2 302 /*!
Pawel Zarembski 0:01f31e923fe2 303 * @brief Gets the eDMA default configuration structure.
Pawel Zarembski 0:01f31e923fe2 304 *
Pawel Zarembski 0:01f31e923fe2 305 * This function sets the configuration structure to default values.
Pawel Zarembski 0:01f31e923fe2 306 * The default configuration is set to the following values.
Pawel Zarembski 0:01f31e923fe2 307 * @code
Pawel Zarembski 0:01f31e923fe2 308 * config.enableContinuousLinkMode = false;
Pawel Zarembski 0:01f31e923fe2 309 * config.enableHaltOnError = true;
Pawel Zarembski 0:01f31e923fe2 310 * config.enableRoundRobinArbitration = false;
Pawel Zarembski 0:01f31e923fe2 311 * config.enableDebugMode = false;
Pawel Zarembski 0:01f31e923fe2 312 * @endcode
Pawel Zarembski 0:01f31e923fe2 313 *
Pawel Zarembski 0:01f31e923fe2 314 * @param config A pointer to the eDMA configuration structure.
Pawel Zarembski 0:01f31e923fe2 315 */
Pawel Zarembski 0:01f31e923fe2 316 void EDMA_GetDefaultConfig(edma_config_t *config);
Pawel Zarembski 0:01f31e923fe2 317
Pawel Zarembski 0:01f31e923fe2 318 /* @} */
Pawel Zarembski 0:01f31e923fe2 319 /*!
Pawel Zarembski 0:01f31e923fe2 320 * @name eDMA Channel Operation
Pawel Zarembski 0:01f31e923fe2 321 * @{
Pawel Zarembski 0:01f31e923fe2 322 */
Pawel Zarembski 0:01f31e923fe2 323
Pawel Zarembski 0:01f31e923fe2 324 /*!
Pawel Zarembski 0:01f31e923fe2 325 * @brief Sets all TCD registers to default values.
Pawel Zarembski 0:01f31e923fe2 326 *
Pawel Zarembski 0:01f31e923fe2 327 * This function sets TCD registers for this channel to default values.
Pawel Zarembski 0:01f31e923fe2 328 *
Pawel Zarembski 0:01f31e923fe2 329 * @param base eDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 330 * @param channel eDMA channel number.
Pawel Zarembski 0:01f31e923fe2 331 * @note This function must not be called while the channel transfer is ongoing
Pawel Zarembski 0:01f31e923fe2 332 * or it causes unpredictable results.
Pawel Zarembski 0:01f31e923fe2 333 * @note This function enables the auto stop request feature.
Pawel Zarembski 0:01f31e923fe2 334 */
Pawel Zarembski 0:01f31e923fe2 335 void EDMA_ResetChannel(DMA_Type *base, uint32_t channel);
Pawel Zarembski 0:01f31e923fe2 336
Pawel Zarembski 0:01f31e923fe2 337 /*!
Pawel Zarembski 0:01f31e923fe2 338 * @brief Configures the eDMA transfer attribute.
Pawel Zarembski 0:01f31e923fe2 339 *
Pawel Zarembski 0:01f31e923fe2 340 * This function configures the transfer attribute, including source address, destination address,
Pawel Zarembski 0:01f31e923fe2 341 * transfer size, address offset, and so on. It also configures the scatter gather feature if the
Pawel Zarembski 0:01f31e923fe2 342 * user supplies the TCD address.
Pawel Zarembski 0:01f31e923fe2 343 * Example:
Pawel Zarembski 0:01f31e923fe2 344 * @code
Pawel Zarembski 0:01f31e923fe2 345 * edma_transfer_t config;
Pawel Zarembski 0:01f31e923fe2 346 * edma_tcd_t tcd;
Pawel Zarembski 0:01f31e923fe2 347 * config.srcAddr = ..;
Pawel Zarembski 0:01f31e923fe2 348 * config.destAddr = ..;
Pawel Zarembski 0:01f31e923fe2 349 * ...
Pawel Zarembski 0:01f31e923fe2 350 * EDMA_SetTransferConfig(DMA0, channel, &config, &stcd);
Pawel Zarembski 0:01f31e923fe2 351 * @endcode
Pawel Zarembski 0:01f31e923fe2 352 *
Pawel Zarembski 0:01f31e923fe2 353 * @param base eDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 354 * @param channel eDMA channel number.
Pawel Zarembski 0:01f31e923fe2 355 * @param config Pointer to eDMA transfer configuration structure.
Pawel Zarembski 0:01f31e923fe2 356 * @param nextTcd Point to TCD structure. It can be NULL if users
Pawel Zarembski 0:01f31e923fe2 357 * do not want to enable scatter/gather feature.
Pawel Zarembski 0:01f31e923fe2 358 * @note If nextTcd is not NULL, it means scatter gather feature is enabled
Pawel Zarembski 0:01f31e923fe2 359 * and DREQ bit is cleared in the previous transfer configuration, which
Pawel Zarembski 0:01f31e923fe2 360 * is set in the eDMA_ResetChannel.
Pawel Zarembski 0:01f31e923fe2 361 */
Pawel Zarembski 0:01f31e923fe2 362 void EDMA_SetTransferConfig(DMA_Type *base,
Pawel Zarembski 0:01f31e923fe2 363 uint32_t channel,
Pawel Zarembski 0:01f31e923fe2 364 const edma_transfer_config_t *config,
Pawel Zarembski 0:01f31e923fe2 365 edma_tcd_t *nextTcd);
Pawel Zarembski 0:01f31e923fe2 366
Pawel Zarembski 0:01f31e923fe2 367 /*!
Pawel Zarembski 0:01f31e923fe2 368 * @brief Configures the eDMA minor offset feature.
Pawel Zarembski 0:01f31e923fe2 369 *
Pawel Zarembski 0:01f31e923fe2 370 * The minor offset means that the signed-extended value is added to the source address or destination
Pawel Zarembski 0:01f31e923fe2 371 * address after each minor loop.
Pawel Zarembski 0:01f31e923fe2 372 *
Pawel Zarembski 0:01f31e923fe2 373 * @param base eDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 374 * @param channel eDMA channel number.
Pawel Zarembski 0:01f31e923fe2 375 * @param config A pointer to the minor offset configuration structure.
Pawel Zarembski 0:01f31e923fe2 376 */
Pawel Zarembski 0:01f31e923fe2 377 void EDMA_SetMinorOffsetConfig(DMA_Type *base, uint32_t channel, const edma_minor_offset_config_t *config);
Pawel Zarembski 0:01f31e923fe2 378
Pawel Zarembski 0:01f31e923fe2 379 /*!
Pawel Zarembski 0:01f31e923fe2 380 * @brief Configures the eDMA channel preemption feature.
Pawel Zarembski 0:01f31e923fe2 381 *
Pawel Zarembski 0:01f31e923fe2 382 * This function configures the channel preemption attribute and the priority of the channel.
Pawel Zarembski 0:01f31e923fe2 383 *
Pawel Zarembski 0:01f31e923fe2 384 * @param base eDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 385 * @param channel eDMA channel number
Pawel Zarembski 0:01f31e923fe2 386 * @param config A pointer to the channel preemption configuration structure.
Pawel Zarembski 0:01f31e923fe2 387 */
Pawel Zarembski 0:01f31e923fe2 388 static inline void EDMA_SetChannelPreemptionConfig(DMA_Type *base,
Pawel Zarembski 0:01f31e923fe2 389 uint32_t channel,
Pawel Zarembski 0:01f31e923fe2 390 const edma_channel_Preemption_config_t *config)
Pawel Zarembski 0:01f31e923fe2 391 {
Pawel Zarembski 0:01f31e923fe2 392 assert(channel < FSL_FEATURE_EDMA_MODULE_CHANNEL);
Pawel Zarembski 0:01f31e923fe2 393 assert(config != NULL);
Pawel Zarembski 0:01f31e923fe2 394
Pawel Zarembski 0:01f31e923fe2 395 DMA_DCHPRIn(base, channel) =
Pawel Zarembski 0:01f31e923fe2 396 (DMA_DCHPRI0_DPA(!config->enablePreemptAbility) | DMA_DCHPRI0_ECP(config->enableChannelPreemption) |
Pawel Zarembski 0:01f31e923fe2 397 DMA_DCHPRI0_CHPRI(config->channelPriority));
Pawel Zarembski 0:01f31e923fe2 398 }
Pawel Zarembski 0:01f31e923fe2 399
Pawel Zarembski 0:01f31e923fe2 400 /*!
Pawel Zarembski 0:01f31e923fe2 401 * @brief Sets the channel link for the eDMA transfer.
Pawel Zarembski 0:01f31e923fe2 402 *
Pawel Zarembski 0:01f31e923fe2 403 * This function configures either the minor link or the major link mode. The minor link means that the channel link is
Pawel Zarembski 0:01f31e923fe2 404 * triggered every time CITER decreases by 1. The major link means that the channel link is triggered when the CITER is
Pawel Zarembski 0:01f31e923fe2 405 * exhausted.
Pawel Zarembski 0:01f31e923fe2 406 *
Pawel Zarembski 0:01f31e923fe2 407 * @param base eDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 408 * @param channel eDMA channel number.
Pawel Zarembski 0:01f31e923fe2 409 * @param type A channel link type, which can be one of the following:
Pawel Zarembski 0:01f31e923fe2 410 * @arg kEDMA_LinkNone
Pawel Zarembski 0:01f31e923fe2 411 * @arg kEDMA_MinorLink
Pawel Zarembski 0:01f31e923fe2 412 * @arg kEDMA_MajorLink
Pawel Zarembski 0:01f31e923fe2 413 * @param linkedChannel The linked channel number.
Pawel Zarembski 0:01f31e923fe2 414 * @note Users should ensure that DONE flag is cleared before calling this interface, or the configuration is invalid.
Pawel Zarembski 0:01f31e923fe2 415 */
Pawel Zarembski 0:01f31e923fe2 416 void EDMA_SetChannelLink(DMA_Type *base, uint32_t channel, edma_channel_link_type_t type, uint32_t linkedChannel);
Pawel Zarembski 0:01f31e923fe2 417
Pawel Zarembski 0:01f31e923fe2 418 /*!
Pawel Zarembski 0:01f31e923fe2 419 * @brief Sets the bandwidth for the eDMA transfer.
Pawel Zarembski 0:01f31e923fe2 420 *
Pawel Zarembski 0:01f31e923fe2 421 * Because the eDMA processes the minor loop, it continuously generates read/write sequences
Pawel Zarembski 0:01f31e923fe2 422 * until the minor count is exhausted. The bandwidth forces the eDMA to stall after the completion of
Pawel Zarembski 0:01f31e923fe2 423 * each read/write access to control the bus request bandwidth seen by the crossbar switch.
Pawel Zarembski 0:01f31e923fe2 424 *
Pawel Zarembski 0:01f31e923fe2 425 * @param base eDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 426 * @param channel eDMA channel number.
Pawel Zarembski 0:01f31e923fe2 427 * @param bandWidth A bandwidth setting, which can be one of the following:
Pawel Zarembski 0:01f31e923fe2 428 * @arg kEDMABandwidthStallNone
Pawel Zarembski 0:01f31e923fe2 429 * @arg kEDMABandwidthStall4Cycle
Pawel Zarembski 0:01f31e923fe2 430 * @arg kEDMABandwidthStall8Cycle
Pawel Zarembski 0:01f31e923fe2 431 */
Pawel Zarembski 0:01f31e923fe2 432 void EDMA_SetBandWidth(DMA_Type *base, uint32_t channel, edma_bandwidth_t bandWidth);
Pawel Zarembski 0:01f31e923fe2 433
Pawel Zarembski 0:01f31e923fe2 434 /*!
Pawel Zarembski 0:01f31e923fe2 435 * @brief Sets the source modulo and the destination modulo for the eDMA transfer.
Pawel Zarembski 0:01f31e923fe2 436 *
Pawel Zarembski 0:01f31e923fe2 437 * This function defines a specific address range specified to be the value after (SADDR + SOFF)/(DADDR + DOFF)
Pawel Zarembski 0:01f31e923fe2 438 * calculation is performed or the original register value. It provides the ability to implement a circular data
Pawel Zarembski 0:01f31e923fe2 439 * queue easily.
Pawel Zarembski 0:01f31e923fe2 440 *
Pawel Zarembski 0:01f31e923fe2 441 * @param base eDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 442 * @param channel eDMA channel number.
Pawel Zarembski 0:01f31e923fe2 443 * @param srcModulo A source modulo value.
Pawel Zarembski 0:01f31e923fe2 444 * @param destModulo A destination modulo value.
Pawel Zarembski 0:01f31e923fe2 445 */
Pawel Zarembski 0:01f31e923fe2 446 void EDMA_SetModulo(DMA_Type *base, uint32_t channel, edma_modulo_t srcModulo, edma_modulo_t destModulo);
Pawel Zarembski 0:01f31e923fe2 447
Pawel Zarembski 0:01f31e923fe2 448 #if defined(FSL_FEATURE_EDMA_ASYNCHRO_REQUEST_CHANNEL_COUNT) && FSL_FEATURE_EDMA_ASYNCHRO_REQUEST_CHANNEL_COUNT
Pawel Zarembski 0:01f31e923fe2 449 /*!
Pawel Zarembski 0:01f31e923fe2 450 * @brief Enables an async request for the eDMA transfer.
Pawel Zarembski 0:01f31e923fe2 451 *
Pawel Zarembski 0:01f31e923fe2 452 * @param base eDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 453 * @param channel eDMA channel number.
Pawel Zarembski 0:01f31e923fe2 454 * @param enable The command to enable (true) or disable (false).
Pawel Zarembski 0:01f31e923fe2 455 */
Pawel Zarembski 0:01f31e923fe2 456 static inline void EDMA_EnableAsyncRequest(DMA_Type *base, uint32_t channel, bool enable)
Pawel Zarembski 0:01f31e923fe2 457 {
Pawel Zarembski 0:01f31e923fe2 458 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
Pawel Zarembski 0:01f31e923fe2 459
Pawel Zarembski 0:01f31e923fe2 460 base->EARS = (base->EARS & (~(1U << channel))) | ((uint32_t)enable << channel);
Pawel Zarembski 0:01f31e923fe2 461 }
Pawel Zarembski 0:01f31e923fe2 462 #endif /* FSL_FEATURE_EDMA_ASYNCHRO_REQUEST_CHANNEL_COUNT */
Pawel Zarembski 0:01f31e923fe2 463
Pawel Zarembski 0:01f31e923fe2 464 /*!
Pawel Zarembski 0:01f31e923fe2 465 * @brief Enables an auto stop request for the eDMA transfer.
Pawel Zarembski 0:01f31e923fe2 466 *
Pawel Zarembski 0:01f31e923fe2 467 * If enabling the auto stop request, the eDMA hardware automatically disables the hardware channel request.
Pawel Zarembski 0:01f31e923fe2 468 *
Pawel Zarembski 0:01f31e923fe2 469 * @param base eDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 470 * @param channel eDMA channel number.
Pawel Zarembski 0:01f31e923fe2 471 * @param enable The command to enable (true) or disable (false).
Pawel Zarembski 0:01f31e923fe2 472 */
Pawel Zarembski 0:01f31e923fe2 473 static inline void EDMA_EnableAutoStopRequest(DMA_Type *base, uint32_t channel, bool enable)
Pawel Zarembski 0:01f31e923fe2 474 {
Pawel Zarembski 0:01f31e923fe2 475 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
Pawel Zarembski 0:01f31e923fe2 476
Pawel Zarembski 0:01f31e923fe2 477 base->TCD[channel].CSR = (base->TCD[channel].CSR & (~DMA_CSR_DREQ_MASK)) | DMA_CSR_DREQ(enable);
Pawel Zarembski 0:01f31e923fe2 478 }
Pawel Zarembski 0:01f31e923fe2 479
Pawel Zarembski 0:01f31e923fe2 480 /*!
Pawel Zarembski 0:01f31e923fe2 481 * @brief Enables the interrupt source for the eDMA transfer.
Pawel Zarembski 0:01f31e923fe2 482 *
Pawel Zarembski 0:01f31e923fe2 483 * @param base eDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 484 * @param channel eDMA channel number.
Pawel Zarembski 0:01f31e923fe2 485 * @param mask The mask of interrupt source to be set. Users need to use
Pawel Zarembski 0:01f31e923fe2 486 * the defined edma_interrupt_enable_t type.
Pawel Zarembski 0:01f31e923fe2 487 */
Pawel Zarembski 0:01f31e923fe2 488 void EDMA_EnableChannelInterrupts(DMA_Type *base, uint32_t channel, uint32_t mask);
Pawel Zarembski 0:01f31e923fe2 489
Pawel Zarembski 0:01f31e923fe2 490 /*!
Pawel Zarembski 0:01f31e923fe2 491 * @brief Disables the interrupt source for the eDMA transfer.
Pawel Zarembski 0:01f31e923fe2 492 *
Pawel Zarembski 0:01f31e923fe2 493 * @param base eDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 494 * @param channel eDMA channel number.
Pawel Zarembski 0:01f31e923fe2 495 * @param mask The mask of the interrupt source to be set. Use
Pawel Zarembski 0:01f31e923fe2 496 * the defined edma_interrupt_enable_t type.
Pawel Zarembski 0:01f31e923fe2 497 */
Pawel Zarembski 0:01f31e923fe2 498 void EDMA_DisableChannelInterrupts(DMA_Type *base, uint32_t channel, uint32_t mask);
Pawel Zarembski 0:01f31e923fe2 499
Pawel Zarembski 0:01f31e923fe2 500 /* @} */
Pawel Zarembski 0:01f31e923fe2 501 /*!
Pawel Zarembski 0:01f31e923fe2 502 * @name eDMA TCD Operation
Pawel Zarembski 0:01f31e923fe2 503 * @{
Pawel Zarembski 0:01f31e923fe2 504 */
Pawel Zarembski 0:01f31e923fe2 505
Pawel Zarembski 0:01f31e923fe2 506 /*!
Pawel Zarembski 0:01f31e923fe2 507 * @brief Sets all fields to default values for the TCD structure.
Pawel Zarembski 0:01f31e923fe2 508 *
Pawel Zarembski 0:01f31e923fe2 509 * This function sets all fields for this TCD structure to default value.
Pawel Zarembski 0:01f31e923fe2 510 *
Pawel Zarembski 0:01f31e923fe2 511 * @param tcd Pointer to the TCD structure.
Pawel Zarembski 0:01f31e923fe2 512 * @note This function enables the auto stop request feature.
Pawel Zarembski 0:01f31e923fe2 513 */
Pawel Zarembski 0:01f31e923fe2 514 void EDMA_TcdReset(edma_tcd_t *tcd);
Pawel Zarembski 0:01f31e923fe2 515
Pawel Zarembski 0:01f31e923fe2 516 /*!
Pawel Zarembski 0:01f31e923fe2 517 * @brief Configures the eDMA TCD transfer attribute.
Pawel Zarembski 0:01f31e923fe2 518 *
Pawel Zarembski 0:01f31e923fe2 519 * The TCD is a transfer control descriptor. The content of the TCD is the same as the hardware TCD registers.
Pawel Zarembski 0:01f31e923fe2 520 * The STCD is used in the scatter-gather mode.
Pawel Zarembski 0:01f31e923fe2 521 * This function configures the TCD transfer attribute, including source address, destination address,
Pawel Zarembski 0:01f31e923fe2 522 * transfer size, address offset, and so on. It also configures the scatter gather feature if the
Pawel Zarembski 0:01f31e923fe2 523 * user supplies the next TCD address.
Pawel Zarembski 0:01f31e923fe2 524 * Example:
Pawel Zarembski 0:01f31e923fe2 525 * @code
Pawel Zarembski 0:01f31e923fe2 526 * edma_transfer_t config = {
Pawel Zarembski 0:01f31e923fe2 527 * ...
Pawel Zarembski 0:01f31e923fe2 528 * }
Pawel Zarembski 0:01f31e923fe2 529 * edma_tcd_t tcd __aligned(32);
Pawel Zarembski 0:01f31e923fe2 530 * edma_tcd_t nextTcd __aligned(32);
Pawel Zarembski 0:01f31e923fe2 531 * EDMA_TcdSetTransferConfig(&tcd, &config, &nextTcd);
Pawel Zarembski 0:01f31e923fe2 532 * @endcode
Pawel Zarembski 0:01f31e923fe2 533 *
Pawel Zarembski 0:01f31e923fe2 534 * @param tcd Pointer to the TCD structure.
Pawel Zarembski 0:01f31e923fe2 535 * @param config Pointer to eDMA transfer configuration structure.
Pawel Zarembski 0:01f31e923fe2 536 * @param nextTcd Pointer to the next TCD structure. It can be NULL if users
Pawel Zarembski 0:01f31e923fe2 537 * do not want to enable scatter/gather feature.
Pawel Zarembski 0:01f31e923fe2 538 * @note TCD address should be 32 bytes aligned or it causes an eDMA error.
Pawel Zarembski 0:01f31e923fe2 539 * @note If the nextTcd is not NULL, the scatter gather feature is enabled
Pawel Zarembski 0:01f31e923fe2 540 * and DREQ bit is cleared in the previous transfer configuration, which
Pawel Zarembski 0:01f31e923fe2 541 * is set in the EDMA_TcdReset.
Pawel Zarembski 0:01f31e923fe2 542 */
Pawel Zarembski 0:01f31e923fe2 543 void EDMA_TcdSetTransferConfig(edma_tcd_t *tcd, const edma_transfer_config_t *config, edma_tcd_t *nextTcd);
Pawel Zarembski 0:01f31e923fe2 544
Pawel Zarembski 0:01f31e923fe2 545 /*!
Pawel Zarembski 0:01f31e923fe2 546 * @brief Configures the eDMA TCD minor offset feature.
Pawel Zarembski 0:01f31e923fe2 547 *
Pawel Zarembski 0:01f31e923fe2 548 * A minor offset is a signed-extended value added to the source address or a destination
Pawel Zarembski 0:01f31e923fe2 549 * address after each minor loop.
Pawel Zarembski 0:01f31e923fe2 550 *
Pawel Zarembski 0:01f31e923fe2 551 * @param tcd A point to the TCD structure.
Pawel Zarembski 0:01f31e923fe2 552 * @param config A pointer to the minor offset configuration structure.
Pawel Zarembski 0:01f31e923fe2 553 */
Pawel Zarembski 0:01f31e923fe2 554 void EDMA_TcdSetMinorOffsetConfig(edma_tcd_t *tcd, const edma_minor_offset_config_t *config);
Pawel Zarembski 0:01f31e923fe2 555
Pawel Zarembski 0:01f31e923fe2 556 /*!
Pawel Zarembski 0:01f31e923fe2 557 * @brief Sets the channel link for the eDMA TCD.
Pawel Zarembski 0:01f31e923fe2 558 *
Pawel Zarembski 0:01f31e923fe2 559 * This function configures either a minor link or a major link. The minor link means the channel link is
Pawel Zarembski 0:01f31e923fe2 560 * triggered every time CITER decreases by 1. The major link means that the channel link is triggered when the CITER is
Pawel Zarembski 0:01f31e923fe2 561 * exhausted.
Pawel Zarembski 0:01f31e923fe2 562 *
Pawel Zarembski 0:01f31e923fe2 563 * @note Users should ensure that DONE flag is cleared before calling this interface, or the configuration is invalid.
Pawel Zarembski 0:01f31e923fe2 564 * @param tcd Point to the TCD structure.
Pawel Zarembski 0:01f31e923fe2 565 * @param type Channel link type, it can be one of:
Pawel Zarembski 0:01f31e923fe2 566 * @arg kEDMA_LinkNone
Pawel Zarembski 0:01f31e923fe2 567 * @arg kEDMA_MinorLink
Pawel Zarembski 0:01f31e923fe2 568 * @arg kEDMA_MajorLink
Pawel Zarembski 0:01f31e923fe2 569 * @param linkedChannel The linked channel number.
Pawel Zarembski 0:01f31e923fe2 570 */
Pawel Zarembski 0:01f31e923fe2 571 void EDMA_TcdSetChannelLink(edma_tcd_t *tcd, edma_channel_link_type_t type, uint32_t linkedChannel);
Pawel Zarembski 0:01f31e923fe2 572
Pawel Zarembski 0:01f31e923fe2 573 /*!
Pawel Zarembski 0:01f31e923fe2 574 * @brief Sets the bandwidth for the eDMA TCD.
Pawel Zarembski 0:01f31e923fe2 575 *
Pawel Zarembski 0:01f31e923fe2 576 * Because the eDMA processes the minor loop, it continuously generates read/write sequences
Pawel Zarembski 0:01f31e923fe2 577 * until the minor count is exhausted. The bandwidth forces the eDMA to stall after the completion of
Pawel Zarembski 0:01f31e923fe2 578 * each read/write access to control the bus request bandwidth seen by the crossbar switch.
Pawel Zarembski 0:01f31e923fe2 579 * @param tcd A pointer to the TCD structure.
Pawel Zarembski 0:01f31e923fe2 580 * @param bandWidth A bandwidth setting, which can be one of the following:
Pawel Zarembski 0:01f31e923fe2 581 * @arg kEDMABandwidthStallNone
Pawel Zarembski 0:01f31e923fe2 582 * @arg kEDMABandwidthStall4Cycle
Pawel Zarembski 0:01f31e923fe2 583 * @arg kEDMABandwidthStall8Cycle
Pawel Zarembski 0:01f31e923fe2 584 */
Pawel Zarembski 0:01f31e923fe2 585 static inline void EDMA_TcdSetBandWidth(edma_tcd_t *tcd, edma_bandwidth_t bandWidth)
Pawel Zarembski 0:01f31e923fe2 586 {
Pawel Zarembski 0:01f31e923fe2 587 assert(tcd != NULL);
Pawel Zarembski 0:01f31e923fe2 588 assert(((uint32_t)tcd & 0x1FU) == 0);
Pawel Zarembski 0:01f31e923fe2 589
Pawel Zarembski 0:01f31e923fe2 590 tcd->CSR = (tcd->CSR & (~DMA_CSR_BWC_MASK)) | DMA_CSR_BWC(bandWidth);
Pawel Zarembski 0:01f31e923fe2 591 }
Pawel Zarembski 0:01f31e923fe2 592
Pawel Zarembski 0:01f31e923fe2 593 /*!
Pawel Zarembski 0:01f31e923fe2 594 * @brief Sets the source modulo and the destination modulo for the eDMA TCD.
Pawel Zarembski 0:01f31e923fe2 595 *
Pawel Zarembski 0:01f31e923fe2 596 * This function defines a specific address range specified to be the value after (SADDR + SOFF)/(DADDR + DOFF)
Pawel Zarembski 0:01f31e923fe2 597 * calculation is performed or the original register value. It provides the ability to implement a circular data
Pawel Zarembski 0:01f31e923fe2 598 * queue easily.
Pawel Zarembski 0:01f31e923fe2 599 *
Pawel Zarembski 0:01f31e923fe2 600 * @param tcd A pointer to the TCD structure.
Pawel Zarembski 0:01f31e923fe2 601 * @param srcModulo A source modulo value.
Pawel Zarembski 0:01f31e923fe2 602 * @param destModulo A destination modulo value.
Pawel Zarembski 0:01f31e923fe2 603 */
Pawel Zarembski 0:01f31e923fe2 604 void EDMA_TcdSetModulo(edma_tcd_t *tcd, edma_modulo_t srcModulo, edma_modulo_t destModulo);
Pawel Zarembski 0:01f31e923fe2 605
Pawel Zarembski 0:01f31e923fe2 606 /*!
Pawel Zarembski 0:01f31e923fe2 607 * @brief Sets the auto stop request for the eDMA TCD.
Pawel Zarembski 0:01f31e923fe2 608 *
Pawel Zarembski 0:01f31e923fe2 609 * If enabling the auto stop request, the eDMA hardware automatically disables the hardware channel request.
Pawel Zarembski 0:01f31e923fe2 610 *
Pawel Zarembski 0:01f31e923fe2 611 * @param tcd A pointer to the TCD structure.
Pawel Zarembski 0:01f31e923fe2 612 * @param enable The command to enable (true) or disable (false).
Pawel Zarembski 0:01f31e923fe2 613 */
Pawel Zarembski 0:01f31e923fe2 614 static inline void EDMA_TcdEnableAutoStopRequest(edma_tcd_t *tcd, bool enable)
Pawel Zarembski 0:01f31e923fe2 615 {
Pawel Zarembski 0:01f31e923fe2 616 assert(tcd != NULL);
Pawel Zarembski 0:01f31e923fe2 617 assert(((uint32_t)tcd & 0x1FU) == 0);
Pawel Zarembski 0:01f31e923fe2 618
Pawel Zarembski 0:01f31e923fe2 619 tcd->CSR = (tcd->CSR & (~DMA_CSR_DREQ_MASK)) | DMA_CSR_DREQ(enable);
Pawel Zarembski 0:01f31e923fe2 620 }
Pawel Zarembski 0:01f31e923fe2 621
Pawel Zarembski 0:01f31e923fe2 622 /*!
Pawel Zarembski 0:01f31e923fe2 623 * @brief Enables the interrupt source for the eDMA TCD.
Pawel Zarembski 0:01f31e923fe2 624 *
Pawel Zarembski 0:01f31e923fe2 625 * @param tcd Point to the TCD structure.
Pawel Zarembski 0:01f31e923fe2 626 * @param mask The mask of interrupt source to be set. Users need to use
Pawel Zarembski 0:01f31e923fe2 627 * the defined edma_interrupt_enable_t type.
Pawel Zarembski 0:01f31e923fe2 628 */
Pawel Zarembski 0:01f31e923fe2 629 void EDMA_TcdEnableInterrupts(edma_tcd_t *tcd, uint32_t mask);
Pawel Zarembski 0:01f31e923fe2 630
Pawel Zarembski 0:01f31e923fe2 631 /*!
Pawel Zarembski 0:01f31e923fe2 632 * @brief Disables the interrupt source for the eDMA TCD.
Pawel Zarembski 0:01f31e923fe2 633 *
Pawel Zarembski 0:01f31e923fe2 634 * @param tcd Point to the TCD structure.
Pawel Zarembski 0:01f31e923fe2 635 * @param mask The mask of interrupt source to be set. Users need to use
Pawel Zarembski 0:01f31e923fe2 636 * the defined edma_interrupt_enable_t type.
Pawel Zarembski 0:01f31e923fe2 637 */
Pawel Zarembski 0:01f31e923fe2 638 void EDMA_TcdDisableInterrupts(edma_tcd_t *tcd, uint32_t mask);
Pawel Zarembski 0:01f31e923fe2 639
Pawel Zarembski 0:01f31e923fe2 640 /*! @} */
Pawel Zarembski 0:01f31e923fe2 641 /*!
Pawel Zarembski 0:01f31e923fe2 642 * @name eDMA Channel Transfer Operation
Pawel Zarembski 0:01f31e923fe2 643 * @{
Pawel Zarembski 0:01f31e923fe2 644 */
Pawel Zarembski 0:01f31e923fe2 645
Pawel Zarembski 0:01f31e923fe2 646 /*!
Pawel Zarembski 0:01f31e923fe2 647 * @brief Enables the eDMA hardware channel request.
Pawel Zarembski 0:01f31e923fe2 648 *
Pawel Zarembski 0:01f31e923fe2 649 * This function enables the hardware channel request.
Pawel Zarembski 0:01f31e923fe2 650 *
Pawel Zarembski 0:01f31e923fe2 651 * @param base eDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 652 * @param channel eDMA channel number.
Pawel Zarembski 0:01f31e923fe2 653 */
Pawel Zarembski 0:01f31e923fe2 654 static inline void EDMA_EnableChannelRequest(DMA_Type *base, uint32_t channel)
Pawel Zarembski 0:01f31e923fe2 655 {
Pawel Zarembski 0:01f31e923fe2 656 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
Pawel Zarembski 0:01f31e923fe2 657
Pawel Zarembski 0:01f31e923fe2 658 base->SERQ = DMA_SERQ_SERQ(channel);
Pawel Zarembski 0:01f31e923fe2 659 }
Pawel Zarembski 0:01f31e923fe2 660
Pawel Zarembski 0:01f31e923fe2 661 /*!
Pawel Zarembski 0:01f31e923fe2 662 * @brief Disables the eDMA hardware channel request.
Pawel Zarembski 0:01f31e923fe2 663 *
Pawel Zarembski 0:01f31e923fe2 664 * This function disables the hardware channel request.
Pawel Zarembski 0:01f31e923fe2 665 *
Pawel Zarembski 0:01f31e923fe2 666 * @param base eDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 667 * @param channel eDMA channel number.
Pawel Zarembski 0:01f31e923fe2 668 */
Pawel Zarembski 0:01f31e923fe2 669 static inline void EDMA_DisableChannelRequest(DMA_Type *base, uint32_t channel)
Pawel Zarembski 0:01f31e923fe2 670 {
Pawel Zarembski 0:01f31e923fe2 671 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
Pawel Zarembski 0:01f31e923fe2 672
Pawel Zarembski 0:01f31e923fe2 673 base->CERQ = DMA_CERQ_CERQ(channel);
Pawel Zarembski 0:01f31e923fe2 674 }
Pawel Zarembski 0:01f31e923fe2 675
Pawel Zarembski 0:01f31e923fe2 676 /*!
Pawel Zarembski 0:01f31e923fe2 677 * @brief Starts the eDMA transfer by using the software trigger.
Pawel Zarembski 0:01f31e923fe2 678 *
Pawel Zarembski 0:01f31e923fe2 679 * This function starts a minor loop transfer.
Pawel Zarembski 0:01f31e923fe2 680 *
Pawel Zarembski 0:01f31e923fe2 681 * @param base eDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 682 * @param channel eDMA channel number.
Pawel Zarembski 0:01f31e923fe2 683 */
Pawel Zarembski 0:01f31e923fe2 684 static inline void EDMA_TriggerChannelStart(DMA_Type *base, uint32_t channel)
Pawel Zarembski 0:01f31e923fe2 685 {
Pawel Zarembski 0:01f31e923fe2 686 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
Pawel Zarembski 0:01f31e923fe2 687
Pawel Zarembski 0:01f31e923fe2 688 base->SSRT = DMA_SSRT_SSRT(channel);
Pawel Zarembski 0:01f31e923fe2 689 }
Pawel Zarembski 0:01f31e923fe2 690
Pawel Zarembski 0:01f31e923fe2 691 /*! @} */
Pawel Zarembski 0:01f31e923fe2 692 /*!
Pawel Zarembski 0:01f31e923fe2 693 * @name eDMA Channel Status Operation
Pawel Zarembski 0:01f31e923fe2 694 * @{
Pawel Zarembski 0:01f31e923fe2 695 */
Pawel Zarembski 0:01f31e923fe2 696
Pawel Zarembski 0:01f31e923fe2 697 /*!
Pawel Zarembski 0:01f31e923fe2 698 * @brief Gets the remaining major loop count from the eDMA current channel TCD.
Pawel Zarembski 0:01f31e923fe2 699 *
Pawel Zarembski 0:01f31e923fe2 700 * This function checks the TCD (Task Control Descriptor) status for a specified
Pawel Zarembski 0:01f31e923fe2 701 * eDMA channel and returns the number of major loop count that has not finished.
Pawel Zarembski 0:01f31e923fe2 702 *
Pawel Zarembski 0:01f31e923fe2 703 * @param base eDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 704 * @param channel eDMA channel number.
Pawel Zarembski 0:01f31e923fe2 705 * @return Major loop count which has not been transferred yet for the current TCD.
Pawel Zarembski 0:01f31e923fe2 706 * @note 1. This function can only be used to get unfinished major loop count of transfer without
Pawel Zarembski 0:01f31e923fe2 707 * the next TCD, or it might be inaccuracy.
Pawel Zarembski 0:01f31e923fe2 708 * 2. The unfinished/remaining transfer bytes cannot be obtained directly from registers while
Pawel Zarembski 0:01f31e923fe2 709 * the channel is running.
Pawel Zarembski 0:01f31e923fe2 710 * Because to calculate the remaining bytes, the initial NBYTES configured in DMA_TCDn_NBYTES_MLNO
Pawel Zarembski 0:01f31e923fe2 711 * register is needed while the eDMA IP does not support getting it while a channel is active.
Pawel Zarembski 0:01f31e923fe2 712 * In another word, the NBYTES value reading is always the actual (decrementing) NBYTES value the dma_engine
Pawel Zarembski 0:01f31e923fe2 713 * is working with while a channel is running.
Pawel Zarembski 0:01f31e923fe2 714 * Consequently, to get the remaining transfer bytes, a software-saved initial value of NBYTES (for example
Pawel Zarembski 0:01f31e923fe2 715 * copied before enabling the channel) is needed. The formula to calculate it is shown below:
Pawel Zarembski 0:01f31e923fe2 716 * RemainingBytes = RemainingMajorLoopCount * NBYTES(initially configured)
Pawel Zarembski 0:01f31e923fe2 717 */
Pawel Zarembski 0:01f31e923fe2 718 uint32_t EDMA_GetRemainingMajorLoopCount(DMA_Type *base, uint32_t channel);
Pawel Zarembski 0:01f31e923fe2 719
Pawel Zarembski 0:01f31e923fe2 720 /*!
Pawel Zarembski 0:01f31e923fe2 721 * @brief Gets the eDMA channel error status flags.
Pawel Zarembski 0:01f31e923fe2 722 *
Pawel Zarembski 0:01f31e923fe2 723 * @param base eDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 724 * @return The mask of error status flags. Users need to use the
Pawel Zarembski 0:01f31e923fe2 725 * _edma_error_status_flags type to decode the return variables.
Pawel Zarembski 0:01f31e923fe2 726 */
Pawel Zarembski 0:01f31e923fe2 727 static inline uint32_t EDMA_GetErrorStatusFlags(DMA_Type *base)
Pawel Zarembski 0:01f31e923fe2 728 {
Pawel Zarembski 0:01f31e923fe2 729 return base->ES;
Pawel Zarembski 0:01f31e923fe2 730 }
Pawel Zarembski 0:01f31e923fe2 731
Pawel Zarembski 0:01f31e923fe2 732 /*!
Pawel Zarembski 0:01f31e923fe2 733 * @brief Gets the eDMA channel status flags.
Pawel Zarembski 0:01f31e923fe2 734 *
Pawel Zarembski 0:01f31e923fe2 735 * @param base eDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 736 * @param channel eDMA channel number.
Pawel Zarembski 0:01f31e923fe2 737 * @return The mask of channel status flags. Users need to use the
Pawel Zarembski 0:01f31e923fe2 738 * _edma_channel_status_flags type to decode the return variables.
Pawel Zarembski 0:01f31e923fe2 739 */
Pawel Zarembski 0:01f31e923fe2 740 uint32_t EDMA_GetChannelStatusFlags(DMA_Type *base, uint32_t channel);
Pawel Zarembski 0:01f31e923fe2 741
Pawel Zarembski 0:01f31e923fe2 742 /*!
Pawel Zarembski 0:01f31e923fe2 743 * @brief Clears the eDMA channel status flags.
Pawel Zarembski 0:01f31e923fe2 744 *
Pawel Zarembski 0:01f31e923fe2 745 * @param base eDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 746 * @param channel eDMA channel number.
Pawel Zarembski 0:01f31e923fe2 747 * @param mask The mask of channel status to be cleared. Users need to use
Pawel Zarembski 0:01f31e923fe2 748 * the defined _edma_channel_status_flags type.
Pawel Zarembski 0:01f31e923fe2 749 */
Pawel Zarembski 0:01f31e923fe2 750 void EDMA_ClearChannelStatusFlags(DMA_Type *base, uint32_t channel, uint32_t mask);
Pawel Zarembski 0:01f31e923fe2 751
Pawel Zarembski 0:01f31e923fe2 752 /*! @} */
Pawel Zarembski 0:01f31e923fe2 753 /*!
Pawel Zarembski 0:01f31e923fe2 754 * @name eDMA Transactional Operation
Pawel Zarembski 0:01f31e923fe2 755 */
Pawel Zarembski 0:01f31e923fe2 756
Pawel Zarembski 0:01f31e923fe2 757 /*!
Pawel Zarembski 0:01f31e923fe2 758 * @brief Creates the eDMA handle.
Pawel Zarembski 0:01f31e923fe2 759 *
Pawel Zarembski 0:01f31e923fe2 760 * This function is called if using the transactional API for eDMA. This function
Pawel Zarembski 0:01f31e923fe2 761 * initializes the internal state of the eDMA handle.
Pawel Zarembski 0:01f31e923fe2 762 *
Pawel Zarembski 0:01f31e923fe2 763 * @param handle eDMA handle pointer. The eDMA handle stores callback function and
Pawel Zarembski 0:01f31e923fe2 764 * parameters.
Pawel Zarembski 0:01f31e923fe2 765 * @param base eDMA peripheral base address.
Pawel Zarembski 0:01f31e923fe2 766 * @param channel eDMA channel number.
Pawel Zarembski 0:01f31e923fe2 767 */
Pawel Zarembski 0:01f31e923fe2 768 void EDMA_CreateHandle(edma_handle_t *handle, DMA_Type *base, uint32_t channel);
Pawel Zarembski 0:01f31e923fe2 769
Pawel Zarembski 0:01f31e923fe2 770 /*!
Pawel Zarembski 0:01f31e923fe2 771 * @brief Installs the TCDs memory pool into the eDMA handle.
Pawel Zarembski 0:01f31e923fe2 772 *
Pawel Zarembski 0:01f31e923fe2 773 * This function is called after the EDMA_CreateHandle to use scatter/gather feature. This function shall only be used
Pawel Zarembski 0:01f31e923fe2 774 * while users need to use scatter gather mode. Scatter gather mode enables EDMA to load a new transfer control block
Pawel Zarembski 0:01f31e923fe2 775 * (tcd) in hardware, and automatically reconfigure that DMA channel for a new transfer.
Pawel Zarembski 0:01f31e923fe2 776 * Users need to prepare tcd memory and also configure tcds using interface EDMA_SubmitTransfer.
Pawel Zarembski 0:01f31e923fe2 777 *
Pawel Zarembski 0:01f31e923fe2 778 * @param handle eDMA handle pointer.
Pawel Zarembski 0:01f31e923fe2 779 * @param tcdPool A memory pool to store TCDs. It must be 32 bytes aligned.
Pawel Zarembski 0:01f31e923fe2 780 * @param tcdSize The number of TCD slots.
Pawel Zarembski 0:01f31e923fe2 781 */
Pawel Zarembski 0:01f31e923fe2 782 void EDMA_InstallTCDMemory(edma_handle_t *handle, edma_tcd_t *tcdPool, uint32_t tcdSize);
Pawel Zarembski 0:01f31e923fe2 783
Pawel Zarembski 0:01f31e923fe2 784 /*!
Pawel Zarembski 0:01f31e923fe2 785 * @brief Installs a callback function for the eDMA transfer.
Pawel Zarembski 0:01f31e923fe2 786 *
Pawel Zarembski 0:01f31e923fe2 787 * This callback is called in the eDMA IRQ handler. Use the callback to do something after
Pawel Zarembski 0:01f31e923fe2 788 * the current major loop transfer completes. This function will be called every time one tcd finished transfer.
Pawel Zarembski 0:01f31e923fe2 789 *
Pawel Zarembski 0:01f31e923fe2 790 * @param handle eDMA handle pointer.
Pawel Zarembski 0:01f31e923fe2 791 * @param callback eDMA callback function pointer.
Pawel Zarembski 0:01f31e923fe2 792 * @param userData A parameter for the callback function.
Pawel Zarembski 0:01f31e923fe2 793 */
Pawel Zarembski 0:01f31e923fe2 794 void EDMA_SetCallback(edma_handle_t *handle, edma_callback callback, void *userData);
Pawel Zarembski 0:01f31e923fe2 795
Pawel Zarembski 0:01f31e923fe2 796 /*!
Pawel Zarembski 0:01f31e923fe2 797 * @brief Prepares the eDMA transfer structure.
Pawel Zarembski 0:01f31e923fe2 798 *
Pawel Zarembski 0:01f31e923fe2 799 * This function prepares the transfer configuration structure according to the user input.
Pawel Zarembski 0:01f31e923fe2 800 *
Pawel Zarembski 0:01f31e923fe2 801 * @param config The user configuration structure of type edma_transfer_t.
Pawel Zarembski 0:01f31e923fe2 802 * @param srcAddr eDMA transfer source address.
Pawel Zarembski 0:01f31e923fe2 803 * @param srcWidth eDMA transfer source address width(bytes).
Pawel Zarembski 0:01f31e923fe2 804 * @param destAddr eDMA transfer destination address.
Pawel Zarembski 0:01f31e923fe2 805 * @param destWidth eDMA transfer destination address width(bytes).
Pawel Zarembski 0:01f31e923fe2 806 * @param bytesEachRequest eDMA transfer bytes per channel request.
Pawel Zarembski 0:01f31e923fe2 807 * @param transferBytes eDMA transfer bytes to be transferred.
Pawel Zarembski 0:01f31e923fe2 808 * @param type eDMA transfer type.
Pawel Zarembski 0:01f31e923fe2 809 * @note The data address and the data width must be consistent. For example, if the SRC
Pawel Zarembski 0:01f31e923fe2 810 * is 4 bytes, the source address must be 4 bytes aligned, or it results in
Pawel Zarembski 0:01f31e923fe2 811 * source address error (SAE).
Pawel Zarembski 0:01f31e923fe2 812 */
Pawel Zarembski 0:01f31e923fe2 813 void EDMA_PrepareTransfer(edma_transfer_config_t *config,
Pawel Zarembski 0:01f31e923fe2 814 void *srcAddr,
Pawel Zarembski 0:01f31e923fe2 815 uint32_t srcWidth,
Pawel Zarembski 0:01f31e923fe2 816 void *destAddr,
Pawel Zarembski 0:01f31e923fe2 817 uint32_t destWidth,
Pawel Zarembski 0:01f31e923fe2 818 uint32_t bytesEachRequest,
Pawel Zarembski 0:01f31e923fe2 819 uint32_t transferBytes,
Pawel Zarembski 0:01f31e923fe2 820 edma_transfer_type_t type);
Pawel Zarembski 0:01f31e923fe2 821
Pawel Zarembski 0:01f31e923fe2 822 /*!
Pawel Zarembski 0:01f31e923fe2 823 * @brief Submits the eDMA transfer request.
Pawel Zarembski 0:01f31e923fe2 824 *
Pawel Zarembski 0:01f31e923fe2 825 * This function submits the eDMA transfer request according to the transfer configuration structure.
Pawel Zarembski 0:01f31e923fe2 826 * In scatter gather mode, call this function will add a configured tcd to the circular list of tcd pool.
Pawel Zarembski 0:01f31e923fe2 827 * The tcd pools is setup by call function EDMA_InstallTCDMemory before.
Pawel Zarembski 0:01f31e923fe2 828 *
Pawel Zarembski 0:01f31e923fe2 829 * @param handle eDMA handle pointer.
Pawel Zarembski 0:01f31e923fe2 830 * @param config Pointer to eDMA transfer configuration structure.
Pawel Zarembski 0:01f31e923fe2 831 * @retval kStatus_EDMA_Success It means submit transfer request succeed.
Pawel Zarembski 0:01f31e923fe2 832 * @retval kStatus_EDMA_QueueFull It means TCD queue is full. Submit transfer request is not allowed.
Pawel Zarembski 0:01f31e923fe2 833 * @retval kStatus_EDMA_Busy It means the given channel is busy, need to submit request later.
Pawel Zarembski 0:01f31e923fe2 834 */
Pawel Zarembski 0:01f31e923fe2 835 status_t EDMA_SubmitTransfer(edma_handle_t *handle, const edma_transfer_config_t *config);
Pawel Zarembski 0:01f31e923fe2 836
Pawel Zarembski 0:01f31e923fe2 837 /*!
Pawel Zarembski 0:01f31e923fe2 838 * @brief eDMA starts transfer.
Pawel Zarembski 0:01f31e923fe2 839 *
Pawel Zarembski 0:01f31e923fe2 840 * This function enables the channel request. Users can call this function after submitting the transfer request
Pawel Zarembski 0:01f31e923fe2 841 * or before submitting the transfer request.
Pawel Zarembski 0:01f31e923fe2 842 *
Pawel Zarembski 0:01f31e923fe2 843 * @param handle eDMA handle pointer.
Pawel Zarembski 0:01f31e923fe2 844 */
Pawel Zarembski 0:01f31e923fe2 845 void EDMA_StartTransfer(edma_handle_t *handle);
Pawel Zarembski 0:01f31e923fe2 846
Pawel Zarembski 0:01f31e923fe2 847 /*!
Pawel Zarembski 0:01f31e923fe2 848 * @brief eDMA stops transfer.
Pawel Zarembski 0:01f31e923fe2 849 *
Pawel Zarembski 0:01f31e923fe2 850 * This function disables the channel request to pause the transfer. Users can call EDMA_StartTransfer()
Pawel Zarembski 0:01f31e923fe2 851 * again to resume the transfer.
Pawel Zarembski 0:01f31e923fe2 852 *
Pawel Zarembski 0:01f31e923fe2 853 * @param handle eDMA handle pointer.
Pawel Zarembski 0:01f31e923fe2 854 */
Pawel Zarembski 0:01f31e923fe2 855 void EDMA_StopTransfer(edma_handle_t *handle);
Pawel Zarembski 0:01f31e923fe2 856
Pawel Zarembski 0:01f31e923fe2 857 /*!
Pawel Zarembski 0:01f31e923fe2 858 * @brief eDMA aborts transfer.
Pawel Zarembski 0:01f31e923fe2 859 *
Pawel Zarembski 0:01f31e923fe2 860 * This function disables the channel request and clear transfer status bits.
Pawel Zarembski 0:01f31e923fe2 861 * Users can submit another transfer after calling this API.
Pawel Zarembski 0:01f31e923fe2 862 *
Pawel Zarembski 0:01f31e923fe2 863 * @param handle DMA handle pointer.
Pawel Zarembski 0:01f31e923fe2 864 */
Pawel Zarembski 0:01f31e923fe2 865 void EDMA_AbortTransfer(edma_handle_t *handle);
Pawel Zarembski 0:01f31e923fe2 866
Pawel Zarembski 0:01f31e923fe2 867 /*!
Pawel Zarembski 0:01f31e923fe2 868 * @brief Get unused TCD slot number.
Pawel Zarembski 0:01f31e923fe2 869 *
Pawel Zarembski 0:01f31e923fe2 870 * This function gets current tcd index which is run. If the TCD pool pointer is NULL, it will return 0.
Pawel Zarembski 0:01f31e923fe2 871 *
Pawel Zarembski 0:01f31e923fe2 872 * @param handle DMA handle pointer.
Pawel Zarembski 0:01f31e923fe2 873 * @return The unused tcd slot number.
Pawel Zarembski 0:01f31e923fe2 874 */
Pawel Zarembski 0:01f31e923fe2 875 static inline uint32_t EDMA_GetUnusedTCDNumber(edma_handle_t *handle)
Pawel Zarembski 0:01f31e923fe2 876 {
Pawel Zarembski 0:01f31e923fe2 877 return (handle->tcdSize - handle->tcdUsed);
Pawel Zarembski 0:01f31e923fe2 878 }
Pawel Zarembski 0:01f31e923fe2 879
Pawel Zarembski 0:01f31e923fe2 880 /*!
Pawel Zarembski 0:01f31e923fe2 881 * @brief Get the next tcd address.
Pawel Zarembski 0:01f31e923fe2 882 *
Pawel Zarembski 0:01f31e923fe2 883 * This function gets the next tcd address. If this is last TCD, return 0.
Pawel Zarembski 0:01f31e923fe2 884 *
Pawel Zarembski 0:01f31e923fe2 885 * @param handle DMA handle pointer.
Pawel Zarembski 0:01f31e923fe2 886 * @return The next TCD address.
Pawel Zarembski 0:01f31e923fe2 887 */
Pawel Zarembski 0:01f31e923fe2 888 static inline uint32_t EDMA_GetNextTCDAddress(edma_handle_t *handle)
Pawel Zarembski 0:01f31e923fe2 889 {
Pawel Zarembski 0:01f31e923fe2 890 return (handle->base->TCD[handle->channel].DLAST_SGA);
Pawel Zarembski 0:01f31e923fe2 891 }
Pawel Zarembski 0:01f31e923fe2 892
Pawel Zarembski 0:01f31e923fe2 893 /*!
Pawel Zarembski 0:01f31e923fe2 894 * @brief eDMA IRQ handler for the current major loop transfer completion.
Pawel Zarembski 0:01f31e923fe2 895 *
Pawel Zarembski 0:01f31e923fe2 896 * This function clears the channel major interrupt flag and calls
Pawel Zarembski 0:01f31e923fe2 897 * the callback function if it is not NULL.
Pawel Zarembski 0:01f31e923fe2 898 *
Pawel Zarembski 0:01f31e923fe2 899 * Note:
Pawel Zarembski 0:01f31e923fe2 900 * For the case using TCD queue, when the major iteration count is exhausted, additional operations are performed.
Pawel Zarembski 0:01f31e923fe2 901 * These include the final address adjustments and reloading of the BITER field into the CITER.
Pawel Zarembski 0:01f31e923fe2 902 * Assertion of an optional interrupt request also occurs at this time, as does a possible fetch of a new TCD from
Pawel Zarembski 0:01f31e923fe2 903 * memory using the scatter/gather address pointer included in the descriptor (if scatter/gather is enabled).
Pawel Zarembski 0:01f31e923fe2 904 *
Pawel Zarembski 0:01f31e923fe2 905 * For instance, when the time interrupt of TCD[0] happens, the TCD[1] has already been loaded into the eDMA engine.
Pawel Zarembski 0:01f31e923fe2 906 * As sga and sga_index are calculated based on the DLAST_SGA bitfield lies in the TCD_CSR register, the sga_index
Pawel Zarembski 0:01f31e923fe2 907 * in this case should be 2 (DLAST_SGA of TCD[1] stores the address of TCD[2]). Thus, the "tcdUsed" updated should be
Pawel Zarembski 0:01f31e923fe2 908 * (tcdUsed - 2U) which indicates the number of TCDs can be loaded in the memory pool (because TCD[0] and TCD[1] have
Pawel Zarembski 0:01f31e923fe2 909 * been loaded into the eDMA engine at this point already.).
Pawel Zarembski 0:01f31e923fe2 910 *
Pawel Zarembski 0:01f31e923fe2 911 * For the last two continuous ISRs in a scatter/gather process, they both load the last TCD (The last ISR does not
Pawel Zarembski 0:01f31e923fe2 912 * load a new TCD) from the memory pool to the eDMA engine when major loop completes.
Pawel Zarembski 0:01f31e923fe2 913 * Therefore, ensure that the header and tcdUsed updated are identical for them.
Pawel Zarembski 0:01f31e923fe2 914 * tcdUsed are both 0 in this case as no TCD to be loaded.
Pawel Zarembski 0:01f31e923fe2 915 *
Pawel Zarembski 0:01f31e923fe2 916 * See the "eDMA basic data flow" in the eDMA Functional description section of the Reference Manual for
Pawel Zarembski 0:01f31e923fe2 917 * further details.
Pawel Zarembski 0:01f31e923fe2 918 *
Pawel Zarembski 0:01f31e923fe2 919 * @param handle eDMA handle pointer.
Pawel Zarembski 0:01f31e923fe2 920 */
Pawel Zarembski 0:01f31e923fe2 921 void EDMA_HandleIRQ(edma_handle_t *handle);
Pawel Zarembski 0:01f31e923fe2 922
Pawel Zarembski 0:01f31e923fe2 923 /* @} */
Pawel Zarembski 0:01f31e923fe2 924
Pawel Zarembski 0:01f31e923fe2 925 #if defined(__cplusplus)
Pawel Zarembski 0:01f31e923fe2 926 }
Pawel Zarembski 0:01f31e923fe2 927 #endif /* __cplusplus */
Pawel Zarembski 0:01f31e923fe2 928
Pawel Zarembski 0:01f31e923fe2 929 /* @} */
Pawel Zarembski 0:01f31e923fe2 930
Pawel Zarembski 0:01f31e923fe2 931 #endif /*_FSL_EDMA_H_*/