Arrow / Mbed OS DAPLink Reset

Repostiory containing DAPLink source code with Reset Pin workaround for HANI_IOT board.

Upstream: https://github.com/ARMmbed/DAPLink

source/hic_hal/freescale/k26f/RTE_Device.h@0:01f31e923fe2, 2020-04-07 (annotated)

Committer:
Pawel Zarembski
Date:
Tue Apr 07 12:55:42 2020 +0200
Revision:
0:01f31e923fe2
hani: DAPLink with reset workaround

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Pawel Zarembski 0:01f31e923fe2 1 /* -----------------------------------------------------------------------------
Pawel Zarembski 0:01f31e923fe2 2 * Copyright (C) 2013 ARM Limited. All rights reserved.
Pawel Zarembski 0:01f31e923fe2 3 *
Pawel Zarembski 0:01f31e923fe2 4 * $Date: 27. June 2013
Pawel Zarembski 0:01f31e923fe2 5 * $Revision: V1.00
Pawel Zarembski 0:01f31e923fe2 6 *
Pawel Zarembski 0:01f31e923fe2 7 * Project: RTE Device Configuration for NXP Kinetis K20
Pawel Zarembski 0:01f31e923fe2 8 * -------------------------------------------------------------------------- */
Pawel Zarembski 0:01f31e923fe2 9
Pawel Zarembski 0:01f31e923fe2 10 //-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
Pawel Zarembski 0:01f31e923fe2 11
Pawel Zarembski 0:01f31e923fe2 12 #ifndef __RTE_DEVICE_H
Pawel Zarembski 0:01f31e923fe2 13 #define __RTE_DEVICE_H
Pawel Zarembski 0:01f31e923fe2 14
Pawel Zarembski 0:01f31e923fe2 15
Pawel Zarembski 0:01f31e923fe2 16 #define RTE_USART1 1
Pawel Zarembski 0:01f31e923fe2 17 #define RTE_USART1_DMA_EN 0
Pawel Zarembski 0:01f31e923fe2 18
Pawel Zarembski 0:01f31e923fe2 19
Pawel Zarembski 0:01f31e923fe2 20 #define RTE_USART1_DMA_TX_DMA_BASE (DMA0)
Pawel Zarembski 0:01f31e923fe2 21 #define RTE_USART1_DMA_TX_CH (0)
Pawel Zarembski 0:01f31e923fe2 22 #define RTE_USART1_DMA_TX_DMAMUX_BASE (DMAMUX0)
Pawel Zarembski 0:01f31e923fe2 23 #define RTE_USART1_DMA_TX_PERI_SEL (5) // DMAMUX source 5 is UART1 TX
Pawel Zarembski 0:01f31e923fe2 24
Pawel Zarembski 0:01f31e923fe2 25 #define RTE_USART1_DMA_RX_DMA_BASE (DMA0)
Pawel Zarembski 0:01f31e923fe2 26 #define RTE_USART1_DMA_RX_CH (1)
Pawel Zarembski 0:01f31e923fe2 27 #define RTE_USART1_DMA_RX_DMAMUX_BASE (DMAMUX0)
Pawel Zarembski 0:01f31e923fe2 28 #define RTE_USART1_DMA_RX_PERI_SEL (4) // DMAMUX source 4 is UART1 RX
Pawel Zarembski 0:01f31e923fe2 29
Pawel Zarembski 0:01f31e923fe2 30
Pawel Zarembski 0:01f31e923fe2 31 #endif /* __RTE_DEVICE_H */
Pawel Zarembski 0:01f31e923fe2 32