Arrow / Mbed OS DAPLink Reset

Repostiory containing DAPLink source code with Reset Pin workaround for HANI_IOT board.

Upstream: https://github.com/ARMmbed/DAPLink

source/family/freescale/target_reset_k32w_series.c@0:01f31e923fe2, 2020-04-07 (annotated)

Committer:
Pawel Zarembski
Date:
Tue Apr 07 12:55:42 2020 +0200
Revision:
0:01f31e923fe2
hani: DAPLink with reset workaround

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Pawel Zarembski 0:01f31e923fe2 1 /**
Pawel Zarembski 0:01f31e923fe2 2 * @file target_reset_K32W_series.c
Pawel Zarembski 0:01f31e923fe2 3 * @brief Target reset for the Kinetis K32W series
Pawel Zarembski 0:01f31e923fe2 4 *
Pawel Zarembski 0:01f31e923fe2 5 * DAPLink Interface Firmware
Pawel Zarembski 0:01f31e923fe2 6 * Copyright (c) 2016-2019, ARM Limited, All Rights Reserved
Pawel Zarembski 0:01f31e923fe2 7 * SPDX-License-Identifier: Apache-2.0
Pawel Zarembski 0:01f31e923fe2 8 *
Pawel Zarembski 0:01f31e923fe2 9 * Licensed under the Apache License, Version 2.0 (the "License"); you may
Pawel Zarembski 0:01f31e923fe2 10 * not use this file except in compliance with the License.
Pawel Zarembski 0:01f31e923fe2 11 * You may obtain a copy of the License at
Pawel Zarembski 0:01f31e923fe2 12 *
Pawel Zarembski 0:01f31e923fe2 13 * http://www.apache.org/licenses/LICENSE-2.0
Pawel Zarembski 0:01f31e923fe2 14 *
Pawel Zarembski 0:01f31e923fe2 15 * Unless required by applicable law or agreed to in writing, software
Pawel Zarembski 0:01f31e923fe2 16 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
Pawel Zarembski 0:01f31e923fe2 17 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
Pawel Zarembski 0:01f31e923fe2 18 * See the License for the specific language governing permissions and
Pawel Zarembski 0:01f31e923fe2 19 * limitations under the License.
Pawel Zarembski 0:01f31e923fe2 20 */
Pawel Zarembski 0:01f31e923fe2 21
Pawel Zarembski 0:01f31e923fe2 22 #include "swd_host.h"
Pawel Zarembski 0:01f31e923fe2 23 #include "info.h"
Pawel Zarembski 0:01f31e923fe2 24 #include "target_family.h"
Pawel Zarembski 0:01f31e923fe2 25
Pawel Zarembski 0:01f31e923fe2 26 #define MDM_STATUS 0x01000000
Pawel Zarembski 0:01f31e923fe2 27 #define MDM_CTRL 0x01000004
Pawel Zarembski 0:01f31e923fe2 28 #define MDM_IDR 0x010000fc
Pawel Zarembski 0:01f31e923fe2 29 #define MDM_ID 0x001c0040 // K32 series
Pawel Zarembski 0:01f31e923fe2 30
Pawel Zarembski 0:01f31e923fe2 31 #define MDM_STATUS_FLASH_MASS_ERASE_ACKNOWLEDGE (1 << 0)
Pawel Zarembski 0:01f31e923fe2 32 #define MDM_STATUS_FLASH_READY (1 << 1)
Pawel Zarembski 0:01f31e923fe2 33 #define MDM_STATUS_SYSTEM_SECURITY (1 << 2)
Pawel Zarembski 0:01f31e923fe2 34 #define MDM_STATUS_MASS_ERASE_ENABLE (1 << 5)
Pawel Zarembski 0:01f31e923fe2 35
Pawel Zarembski 0:01f31e923fe2 36 #define MDM_CTRL_FLASH_MASS_ERASE_IN_PROGRESS (1 << 0)
Pawel Zarembski 0:01f31e923fe2 37 #define MDM_CTRL_SYSTEM_RESET_REQUEST (1 << 3)
Pawel Zarembski 0:01f31e923fe2 38
Pawel Zarembski 0:01f31e923fe2 39 #define TIMEOUT_COUNT (1000000)
Pawel Zarembski 0:01f31e923fe2 40
Pawel Zarembski 0:01f31e923fe2 41 void target_before_init_debug(void)
Pawel Zarembski 0:01f31e923fe2 42 {
Pawel Zarembski 0:01f31e923fe2 43 swd_set_target_reset(1);
Pawel Zarembski 0:01f31e923fe2 44 }
Pawel Zarembski 0:01f31e923fe2 45
Pawel Zarembski 0:01f31e923fe2 46 uint8_t target_unlock_sequence(void)
Pawel Zarembski 0:01f31e923fe2 47 {
Pawel Zarembski 0:01f31e923fe2 48 uint32_t val;
Pawel Zarembski 0:01f31e923fe2 49 uint32_t timeoutCounter = 0;
Pawel Zarembski 0:01f31e923fe2 50
Pawel Zarembski 0:01f31e923fe2 51 // read the device ID
Pawel Zarembski 0:01f31e923fe2 52 if (!swd_read_ap(MDM_IDR, &val)) {
Pawel Zarembski 0:01f31e923fe2 53 return 0;
Pawel Zarembski 0:01f31e923fe2 54 }
Pawel Zarembski 0:01f31e923fe2 55
Pawel Zarembski 0:01f31e923fe2 56 // verify the result
Pawel Zarembski 0:01f31e923fe2 57 if (val != MDM_ID) {
Pawel Zarembski 0:01f31e923fe2 58 return 0;
Pawel Zarembski 0:01f31e923fe2 59 }
Pawel Zarembski 0:01f31e923fe2 60
Pawel Zarembski 0:01f31e923fe2 61 // Wait until flash is ready.
Pawel Zarembski 0:01f31e923fe2 62 do {
Pawel Zarembski 0:01f31e923fe2 63 if (!swd_read_ap(MDM_STATUS, &val)) {
Pawel Zarembski 0:01f31e923fe2 64 return 0;
Pawel Zarembski 0:01f31e923fe2 65 }
Pawel Zarembski 0:01f31e923fe2 66
Pawel Zarembski 0:01f31e923fe2 67 if (++timeoutCounter > TIMEOUT_COUNT) {
Pawel Zarembski 0:01f31e923fe2 68 return 0;
Pawel Zarembski 0:01f31e923fe2 69 }
Pawel Zarembski 0:01f31e923fe2 70 } while (!(val & MDM_STATUS_FLASH_READY));
Pawel Zarembski 0:01f31e923fe2 71
Pawel Zarembski 0:01f31e923fe2 72 // Check if security is enabled.
Pawel Zarembski 0:01f31e923fe2 73 if (!swd_read_ap(MDM_STATUS, &val)) {
Pawel Zarembski 0:01f31e923fe2 74 swd_set_target_reset(0);
Pawel Zarembski 0:01f31e923fe2 75 return 0;
Pawel Zarembski 0:01f31e923fe2 76 }
Pawel Zarembski 0:01f31e923fe2 77
Pawel Zarembski 0:01f31e923fe2 78 // flash in secured mode
Pawel Zarembski 0:01f31e923fe2 79 if (val & MDM_STATUS_SYSTEM_SECURITY) {
Pawel Zarembski 0:01f31e923fe2 80 // Make sure mass erase is enabled.
Pawel Zarembski 0:01f31e923fe2 81 if (!(val & MDM_STATUS_MASS_ERASE_ENABLE)) {
Pawel Zarembski 0:01f31e923fe2 82 return 0;
Pawel Zarembski 0:01f31e923fe2 83 }
Pawel Zarembski 0:01f31e923fe2 84
Pawel Zarembski 0:01f31e923fe2 85 // hold the device in reset
Pawel Zarembski 0:01f31e923fe2 86 swd_set_target_reset(1);
Pawel Zarembski 0:01f31e923fe2 87
Pawel Zarembski 0:01f31e923fe2 88 // Write the mass-erase enable and system reset request bits.
Pawel Zarembski 0:01f31e923fe2 89 if (!swd_write_ap(MDM_CTRL, (MDM_CTRL_FLASH_MASS_ERASE_IN_PROGRESS | MDM_CTRL_SYSTEM_RESET_REQUEST))) {
Pawel Zarembski 0:01f31e923fe2 90 swd_set_target_reset(0);
Pawel Zarembski 0:01f31e923fe2 91 return 0;
Pawel Zarembski 0:01f31e923fe2 92 }
Pawel Zarembski 0:01f31e923fe2 93
Pawel Zarembski 0:01f31e923fe2 94 // Verify mass erase has started.
Pawel Zarembski 0:01f31e923fe2 95 timeoutCounter = 0;
Pawel Zarembski 0:01f31e923fe2 96 do {
Pawel Zarembski 0:01f31e923fe2 97 // wait until mass erase is started
Pawel Zarembski 0:01f31e923fe2 98 if (!swd_read_ap(MDM_STATUS, &val)) {
Pawel Zarembski 0:01f31e923fe2 99 swd_set_target_reset(0);
Pawel Zarembski 0:01f31e923fe2 100 return 0;
Pawel Zarembski 0:01f31e923fe2 101 }
Pawel Zarembski 0:01f31e923fe2 102
Pawel Zarembski 0:01f31e923fe2 103 if (++timeoutCounter > TIMEOUT_COUNT) {
Pawel Zarembski 0:01f31e923fe2 104 swd_write_ap(MDM_CTRL, 0);
Pawel Zarembski 0:01f31e923fe2 105 swd_set_target_reset(0);
Pawel Zarembski 0:01f31e923fe2 106 return 0;
Pawel Zarembski 0:01f31e923fe2 107 }
Pawel Zarembski 0:01f31e923fe2 108 } while (!(val & MDM_STATUS_FLASH_MASS_ERASE_ACKNOWLEDGE));
Pawel Zarembski 0:01f31e923fe2 109
Pawel Zarembski 0:01f31e923fe2 110 // Wait until mass erase completes.
Pawel Zarembski 0:01f31e923fe2 111 timeoutCounter = 0;
Pawel Zarembski 0:01f31e923fe2 112 do {
Pawel Zarembski 0:01f31e923fe2 113 // keep reading until procedure is complete
Pawel Zarembski 0:01f31e923fe2 114 if (!swd_read_ap(MDM_CTRL, &val)) {
Pawel Zarembski 0:01f31e923fe2 115 swd_set_target_reset(0);
Pawel Zarembski 0:01f31e923fe2 116 return 0;
Pawel Zarembski 0:01f31e923fe2 117 }
Pawel Zarembski 0:01f31e923fe2 118
Pawel Zarembski 0:01f31e923fe2 119 if (++timeoutCounter > TIMEOUT_COUNT) {
Pawel Zarembski 0:01f31e923fe2 120 swd_write_ap(MDM_CTRL, 0);
Pawel Zarembski 0:01f31e923fe2 121 swd_set_target_reset(0);
Pawel Zarembski 0:01f31e923fe2 122 return 0;
Pawel Zarembski 0:01f31e923fe2 123 }
Pawel Zarembski 0:01f31e923fe2 124 } while (val & MDM_CTRL_FLASH_MASS_ERASE_IN_PROGRESS);
Pawel Zarembski 0:01f31e923fe2 125
Pawel Zarembski 0:01f31e923fe2 126 // Confirm the mass erase was successful.
Pawel Zarembski 0:01f31e923fe2 127 if (!swd_read_ap(MDM_STATUS, &val)) {
Pawel Zarembski 0:01f31e923fe2 128 swd_set_target_reset(0);
Pawel Zarembski 0:01f31e923fe2 129 return 0;
Pawel Zarembski 0:01f31e923fe2 130 }
Pawel Zarembski 0:01f31e923fe2 131
Pawel Zarembski 0:01f31e923fe2 132 // Release the device from reset.
Pawel Zarembski 0:01f31e923fe2 133 swd_write_ap(MDM_CTRL, 0);
Pawel Zarembski 0:01f31e923fe2 134 swd_set_target_reset(0);
Pawel Zarembski 0:01f31e923fe2 135
Pawel Zarembski 0:01f31e923fe2 136 if (val & MDM_STATUS_SYSTEM_SECURITY) {
Pawel Zarembski 0:01f31e923fe2 137 return 0;
Pawel Zarembski 0:01f31e923fe2 138 }
Pawel Zarembski 0:01f31e923fe2 139 }
Pawel Zarembski 0:01f31e923fe2 140
Pawel Zarembski 0:01f31e923fe2 141 return 1;
Pawel Zarembski 0:01f31e923fe2 142 }
Pawel Zarembski 0:01f31e923fe2 143
Pawel Zarembski 0:01f31e923fe2 144 const target_family_descriptor_t g_nxp_kinetis_k32w_series = {
Pawel Zarembski 0:01f31e923fe2 145 .family_id = kNXP_KinetisK32W_FamilyID,
Pawel Zarembski 0:01f31e923fe2 146 .default_reset_type = kHardwareReset,
Pawel Zarembski 0:01f31e923fe2 147 .target_before_init_debug = target_before_init_debug,
Pawel Zarembski 0:01f31e923fe2 148 .target_unlock_sequence = target_unlock_sequence,
Pawel Zarembski 0:01f31e923fe2 149 };