Repostiory containing DAPLink source code with Reset Pin workaround for HANI_IOT board.
Upstream: https://github.com/ARMmbed/DAPLink
source/family/arm/musca_b/i2c_gpio.c@0:01f31e923fe2, 2020-04-07 (annotated)
- Committer:
- Pawel Zarembski
- Date:
- Tue Apr 07 12:55:42 2020 +0200
- Revision:
- 0:01f31e923fe2
hani: DAPLink with reset workaround
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Pawel Zarembski |
0:01f31e923fe2 | 1 | /** |
Pawel Zarembski |
0:01f31e923fe2 | 2 | * @file i2c_gpio.c |
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0:01f31e923fe2 | 3 | * @brief I2C GPIO control for musca PCA9537 |
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0:01f31e923fe2 | 4 | * |
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0:01f31e923fe2 | 5 | * DAPLink Interface Firmware |
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0:01f31e923fe2 | 6 | * Copyright (c) 2009-2016, ARM Limited, All Rights Reserved |
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0:01f31e923fe2 | 7 | * SPDX-License-Identifier: Apache-2.0 |
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0:01f31e923fe2 | 8 | * |
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0:01f31e923fe2 | 9 | * Licensed under the Apache License, Version 2.0 (the "License"); you may |
Pawel Zarembski |
0:01f31e923fe2 | 10 | * not use this file except in compliance with the License. |
Pawel Zarembski |
0:01f31e923fe2 | 11 | * You may obtain a copy of the License at |
Pawel Zarembski |
0:01f31e923fe2 | 12 | * |
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0:01f31e923fe2 | 13 | * http://www.apache.org/licenses/LICENSE-2.0 |
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0:01f31e923fe2 | 14 | * |
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0:01f31e923fe2 | 15 | * Unless required by applicable law or agreed to in writing, software |
Pawel Zarembski |
0:01f31e923fe2 | 16 | * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT |
Pawel Zarembski |
0:01f31e923fe2 | 17 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
Pawel Zarembski |
0:01f31e923fe2 | 18 | * See the License for the specific language governing permissions and |
Pawel Zarembski |
0:01f31e923fe2 | 19 | * limitations under the License. |
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0:01f31e923fe2 | 20 | */ |
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0:01f31e923fe2 | 21 | |
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0:01f31e923fe2 | 22 | #include "string.h" |
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0:01f31e923fe2 | 23 | #include "stdio.h" |
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0:01f31e923fe2 | 24 | #include "stdint.h" |
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0:01f31e923fe2 | 25 | |
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0:01f31e923fe2 | 26 | #include "gpio.h" |
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0:01f31e923fe2 | 27 | #include "utils.h" |
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0:01f31e923fe2 | 28 | #include "i2c_gpio.h" |
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0:01f31e923fe2 | 29 | |
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0:01f31e923fe2 | 30 | // Clock registers |
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0:01f31e923fe2 | 31 | #define I2CGPIO_FREQ 6 // Sets OSC Clock SCL frequency |
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0:01f31e923fe2 | 32 | #define I2CGPIO_WR 0 // Write command |
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0:01f31e923fe2 | 33 | #define I2CGPIO_RD 1 // Read command |
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0:01f31e923fe2 | 34 | #define I2CGPIO_ADDR 0x49 // Default slave address for PCA9537 |
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0:01f31e923fe2 | 35 | |
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0:01f31e923fe2 | 36 | /*---------------------------------------------------------------------------- |
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0:01f31e923fe2 | 37 | I2C Address + Wr + A |
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0:01f31e923fe2 | 38 | *----------------------------------------------------------------------------*/ |
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0:01f31e923fe2 | 39 | void i2c_gpio_addr(unsigned int addr, unsigned int read) |
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0:01f31e923fe2 | 40 | { |
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0:01f31e923fe2 | 41 | unsigned int loop, data; |
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0:01f31e923fe2 | 42 | |
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0:01f31e923fe2 | 43 | // Repeated Start condition (if required after Command) |
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0:01f31e923fe2 | 44 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] &= ~PIN_I2C_SCL; |
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0:01f31e923fe2 | 45 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 46 | LPC_GPIO->DIR[PIN_I2C_SDA_PORT] &= ~PIN_I2C_SDA; |
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0:01f31e923fe2 | 47 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 48 | |
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0:01f31e923fe2 | 49 | // Start condition 'S' (DATA > CLK) |
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0:01f31e923fe2 | 50 | LPC_GPIO->DIR[PIN_I2C_SDA_PORT] |= PIN_I2C_SDA; |
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0:01f31e923fe2 | 51 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 52 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] |= PIN_I2C_SCL; |
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0:01f31e923fe2 | 53 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 54 | |
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0:01f31e923fe2 | 55 | // Addr is 7 bits so add Read |
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0:01f31e923fe2 | 56 | data = (addr << 1) & 0xFE; |
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0:01f31e923fe2 | 57 | if (read) |
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0:01f31e923fe2 | 58 | data |= 0x01; |
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0:01f31e923fe2 | 59 | |
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0:01f31e923fe2 | 60 | // Clock out the 8 bits |
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0:01f31e923fe2 | 61 | for (loop = 0; loop < 8; loop++) |
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0:01f31e923fe2 | 62 | { |
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0:01f31e923fe2 | 63 | if (data & (0x80 >> loop)) |
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0:01f31e923fe2 | 64 | { |
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0:01f31e923fe2 | 65 | LPC_GPIO->DIR[PIN_I2C_SDA_PORT] &= ~PIN_I2C_SDA; |
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0:01f31e923fe2 | 66 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 67 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] &= ~PIN_I2C_SCL; |
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0:01f31e923fe2 | 68 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 69 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] |= PIN_I2C_SCL; |
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0:01f31e923fe2 | 70 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 71 | } |
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0:01f31e923fe2 | 72 | else |
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0:01f31e923fe2 | 73 | { |
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0:01f31e923fe2 | 74 | LPC_GPIO->DIR[PIN_I2C_SDA_PORT] |= PIN_I2C_SDA; |
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0:01f31e923fe2 | 75 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 76 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] &= ~PIN_I2C_SCL; |
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0:01f31e923fe2 | 77 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 78 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] |= PIN_I2C_SCL; |
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0:01f31e923fe2 | 79 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 80 | } |
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0:01f31e923fe2 | 81 | } |
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0:01f31e923fe2 | 82 | |
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0:01f31e923fe2 | 83 | // Set data low |
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0:01f31e923fe2 | 84 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 85 | LPC_GPIO->DIR[PIN_I2C_SDA_PORT] |= PIN_I2C_SDA; |
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0:01f31e923fe2 | 86 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 87 | |
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0:01f31e923fe2 | 88 | // Transmission clock 'A' |
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0:01f31e923fe2 | 89 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] &= ~PIN_I2C_SCL; |
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0:01f31e923fe2 | 90 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 91 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] |= PIN_I2C_SCL; |
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0:01f31e923fe2 | 92 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 93 | } |
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0:01f31e923fe2 | 94 | |
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0:01f31e923fe2 | 95 | /*---------------------------------------------------------------------------- |
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0:01f31e923fe2 | 96 | I2C Command + A |
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0:01f31e923fe2 | 97 | *----------------------------------------------------------------------------*/ |
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0:01f31e923fe2 | 98 | void i2c_gpio_cmd(unsigned int cmd) |
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0:01f31e923fe2 | 99 | { |
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0:01f31e923fe2 | 100 | unsigned int loop; |
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0:01f31e923fe2 | 101 | |
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0:01f31e923fe2 | 102 | // Clock out the 8 bits |
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0:01f31e923fe2 | 103 | for (loop = 0; loop < 8; loop++) |
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0:01f31e923fe2 | 104 | { |
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0:01f31e923fe2 | 105 | if (cmd & (0x80 >> loop)) |
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0:01f31e923fe2 | 106 | { |
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0:01f31e923fe2 | 107 | LPC_GPIO->DIR[PIN_I2C_SDA_PORT] &= ~PIN_I2C_SDA; |
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0:01f31e923fe2 | 108 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 109 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] &= ~PIN_I2C_SCL; |
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0:01f31e923fe2 | 110 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 111 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] |= PIN_I2C_SCL; |
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0:01f31e923fe2 | 112 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 113 | } |
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0:01f31e923fe2 | 114 | else |
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0:01f31e923fe2 | 115 | { |
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0:01f31e923fe2 | 116 | LPC_GPIO->DIR[PIN_I2C_SDA_PORT] |= PIN_I2C_SDA; |
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0:01f31e923fe2 | 117 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 118 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] &= ~PIN_I2C_SCL; |
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0:01f31e923fe2 | 119 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 120 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] |= PIN_I2C_SCL; |
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0:01f31e923fe2 | 121 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 122 | } |
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0:01f31e923fe2 | 123 | } |
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0:01f31e923fe2 | 124 | |
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0:01f31e923fe2 | 125 | // Set data low |
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0:01f31e923fe2 | 126 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 127 | LPC_GPIO->DIR[PIN_I2C_SDA_PORT] |= PIN_I2C_SDA; |
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0:01f31e923fe2 | 128 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 129 | |
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0:01f31e923fe2 | 130 | // Transmission clock 'A' |
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0:01f31e923fe2 | 131 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] &= ~PIN_I2C_SCL; |
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0:01f31e923fe2 | 132 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 133 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] |= PIN_I2C_SCL; |
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0:01f31e923fe2 | 134 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 135 | } |
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0:01f31e923fe2 | 136 | |
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0:01f31e923fe2 | 137 | /*---------------------------------------------------------------------------- |
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0:01f31e923fe2 | 138 | I2C Write Data + A + P |
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0:01f31e923fe2 | 139 | *----------------------------------------------------------------------------*/ |
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0:01f31e923fe2 | 140 | void i2c_gpio_write(unsigned int data) |
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0:01f31e923fe2 | 141 | { |
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0:01f31e923fe2 | 142 | unsigned int loop; |
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0:01f31e923fe2 | 143 | |
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0:01f31e923fe2 | 144 | // Clock out the 8 bits |
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0:01f31e923fe2 | 145 | for (loop = 0; loop < 8; loop++) |
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0:01f31e923fe2 | 146 | { |
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0:01f31e923fe2 | 147 | if (data & (0x80 >> loop)) |
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0:01f31e923fe2 | 148 | { |
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0:01f31e923fe2 | 149 | LPC_GPIO->DIR[PIN_I2C_SDA_PORT] &= ~PIN_I2C_SDA; |
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0:01f31e923fe2 | 150 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 151 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] &= ~PIN_I2C_SCL; |
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0:01f31e923fe2 | 152 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 153 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] |= PIN_I2C_SCL; |
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0:01f31e923fe2 | 154 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 155 | } |
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0:01f31e923fe2 | 156 | else |
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0:01f31e923fe2 | 157 | { |
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0:01f31e923fe2 | 158 | LPC_GPIO->DIR[PIN_I2C_SDA_PORT] |= PIN_I2C_SDA; |
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0:01f31e923fe2 | 159 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 160 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] &= ~PIN_I2C_SCL; |
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0:01f31e923fe2 | 161 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 162 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] |= PIN_I2C_SCL; |
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0:01f31e923fe2 | 163 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 164 | } |
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0:01f31e923fe2 | 165 | } |
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0:01f31e923fe2 | 166 | |
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0:01f31e923fe2 | 167 | // Set data low |
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0:01f31e923fe2 | 168 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 169 | LPC_GPIO->DIR[PIN_I2C_SDA_PORT] |= PIN_I2C_SDA; |
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0:01f31e923fe2 | 170 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 171 | |
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0:01f31e923fe2 | 172 | // Transmission clock 'A' |
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0:01f31e923fe2 | 173 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] &= ~PIN_I2C_SCL; |
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0:01f31e923fe2 | 174 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 175 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] |= PIN_I2C_SCL; |
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0:01f31e923fe2 | 176 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 177 | |
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0:01f31e923fe2 | 178 | // Stop condition 'P' |
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0:01f31e923fe2 | 179 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] &= ~PIN_I2C_SCL; |
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0:01f31e923fe2 | 180 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 181 | LPC_GPIO->DIR[PIN_I2C_SDA_PORT] &= ~PIN_I2C_SDA; |
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0:01f31e923fe2 | 182 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 183 | } |
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0:01f31e923fe2 | 184 | |
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0:01f31e923fe2 | 185 | /*---------------------------------------------------------------------------- |
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0:01f31e923fe2 | 186 | I2C Read Data + A + P |
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0:01f31e923fe2 | 187 | *----------------------------------------------------------------------------*/ |
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0:01f31e923fe2 | 188 | void i2c_gpio_read(unsigned int *data, unsigned int ack) |
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0:01f31e923fe2 | 189 | { |
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0:01f31e923fe2 | 190 | unsigned int loop; |
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0:01f31e923fe2 | 191 | |
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0:01f31e923fe2 | 192 | // Set SDA high (O/D) and allow PCA9537 to drive SDA |
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0:01f31e923fe2 | 193 | LPC_GPIO->DIR[PIN_I2C_SDA_PORT] &= ~PIN_I2C_SDA; |
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0:01f31e923fe2 | 194 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 195 | |
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0:01f31e923fe2 | 196 | // Clock in the 8 bits |
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0:01f31e923fe2 | 197 | *data = 0; |
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0:01f31e923fe2 | 198 | for (loop = 0; loop < 8; loop++) |
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0:01f31e923fe2 | 199 | { |
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0:01f31e923fe2 | 200 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] &= ~PIN_I2C_SCL; |
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0:01f31e923fe2 | 201 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 202 | if (LPC_GPIO->DIR[PIN_I2C_SDA_PORT] & PIN_I2C_SDA) |
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0:01f31e923fe2 | 203 | *data &= ~(0x80 >> loop); |
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0:01f31e923fe2 | 204 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] |= PIN_I2C_SCL; |
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0:01f31e923fe2 | 205 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 206 | } |
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0:01f31e923fe2 | 207 | |
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0:01f31e923fe2 | 208 | // Set data for acknowledge |
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0:01f31e923fe2 | 209 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 210 | if (ack) |
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0:01f31e923fe2 | 211 | LPC_GPIO->DIR[PIN_I2C_SDA_PORT] |= PIN_I2C_SDA; |
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0:01f31e923fe2 | 212 | else |
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0:01f31e923fe2 | 213 | LPC_GPIO->DIR[PIN_I2C_SDA_PORT] &= ~PIN_I2C_SDA; |
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0:01f31e923fe2 | 214 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 215 | |
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0:01f31e923fe2 | 216 | // Transmission clock 'A' |
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0:01f31e923fe2 | 217 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] &= ~PIN_I2C_SCL; |
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0:01f31e923fe2 | 218 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 219 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] |= PIN_I2C_SCL; |
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0:01f31e923fe2 | 220 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 221 | |
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0:01f31e923fe2 | 222 | // End of acknowledge |
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0:01f31e923fe2 | 223 | LPC_GPIO->DIR[PIN_I2C_SDA_PORT] |= PIN_I2C_SDA; |
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0:01f31e923fe2 | 224 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 225 | |
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0:01f31e923fe2 | 226 | // Stop condition 'P' |
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0:01f31e923fe2 | 227 | LPC_GPIO->DIR[PIN_I2C_SCL_PORT] &= ~PIN_I2C_SCL; |
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0:01f31e923fe2 | 228 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 229 | LPC_GPIO->DIR[PIN_I2C_SDA_PORT] &= ~PIN_I2C_SDA; |
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0:01f31e923fe2 | 230 | delay_us(I2CGPIO_FREQ); |
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0:01f31e923fe2 | 231 | } |
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0:01f31e923fe2 | 232 | |
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0:01f31e923fe2 | 233 | /*---------------------------------------------------------------------------- |
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0:01f31e923fe2 | 234 | I2C Write byte |
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0:01f31e923fe2 | 235 | *----------------------------------------------------------------------------*/ |
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0:01f31e923fe2 | 236 | void i2c_gpio_wbyte(unsigned int cmd, unsigned int data) |
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0:01f31e923fe2 | 237 | { |
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0:01f31e923fe2 | 238 | // Set slave address write |
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0:01f31e923fe2 | 239 | i2c_gpio_addr(I2CGPIO_ADDR, I2CGPIO_WR); |
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0:01f31e923fe2 | 240 | // Set command |
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0:01f31e923fe2 | 241 | i2c_gpio_cmd(cmd); |
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0:01f31e923fe2 | 242 | // Write the data |
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0:01f31e923fe2 | 243 | i2c_gpio_write(data); |
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0:01f31e923fe2 | 244 | } |
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0:01f31e923fe2 | 245 | |
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0:01f31e923fe2 | 246 | /*---------------------------------------------------------------------------- |
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0:01f31e923fe2 | 247 | I2C Read byte |
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0:01f31e923fe2 | 248 | *----------------------------------------------------------------------------*/ |
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0:01f31e923fe2 | 249 | void i2c_gpio_rbyte(unsigned int cmd, unsigned int *data) |
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0:01f31e923fe2 | 250 | { |
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0:01f31e923fe2 | 251 | // Set slave address write |
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0:01f31e923fe2 | 252 | i2c_gpio_addr(I2CGPIO_ADDR, I2CGPIO_WR); |
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0:01f31e923fe2 | 253 | // Set command |
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0:01f31e923fe2 | 254 | i2c_gpio_cmd(cmd); |
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0:01f31e923fe2 | 255 | |
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0:01f31e923fe2 | 256 | // Set slave address write |
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0:01f31e923fe2 | 257 | i2c_gpio_addr(I2CGPIO_ADDR, I2CGPIO_RD); |
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0:01f31e923fe2 | 258 | // Read the data |
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0:01f31e923fe2 | 259 | i2c_gpio_read(data, 0); |
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0:01f31e923fe2 | 260 | } |
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0:01f31e923fe2 | 261 | |
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0:01f31e923fe2 | 262 | // end of i2c_gpio.c |