Repostiory containing DAPLink source code with Reset Pin workaround for HANI_IOT board.
Upstream: https://github.com/ARMmbed/DAPLink
source/cmsis-core/cmsis_iccarm.h@0:01f31e923fe2, 2020-04-07 (annotated)
- Committer:
- Pawel Zarembski
- Date:
- Tue Apr 07 12:55:42 2020 +0200
- Revision:
- 0:01f31e923fe2
hani: DAPLink with reset workaround
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Pawel Zarembski |
0:01f31e923fe2 | 1 | /**************************************************************************//** |
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0:01f31e923fe2 | 2 | * @file cmsis_iccarm.h |
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0:01f31e923fe2 | 3 | * @brief CMSIS compiler ICCARM (IAR Compiler for Arm) header file |
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0:01f31e923fe2 | 4 | * @version V5.1.1 |
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0:01f31e923fe2 | 5 | * @date 30. July 2019 |
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0:01f31e923fe2 | 6 | ******************************************************************************/ |
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0:01f31e923fe2 | 7 | |
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0:01f31e923fe2 | 8 | //------------------------------------------------------------------------------ |
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0:01f31e923fe2 | 9 | // |
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0:01f31e923fe2 | 10 | // Copyright (c) 2017-2019 IAR Systems |
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0:01f31e923fe2 | 11 | // Copyright (c) 2017-2019 Arm Limited. All rights reserved. |
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0:01f31e923fe2 | 12 | // |
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0:01f31e923fe2 | 13 | // Licensed under the Apache License, Version 2.0 (the "License") |
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0:01f31e923fe2 | 14 | // you may not use this file except in compliance with the License. |
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0:01f31e923fe2 | 15 | // You may obtain a copy of the License at |
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0:01f31e923fe2 | 16 | // http://www.apache.org/licenses/LICENSE-2.0 |
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0:01f31e923fe2 | 17 | // |
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0:01f31e923fe2 | 18 | // Unless required by applicable law or agreed to in writing, software |
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0:01f31e923fe2 | 19 | // distributed under the License is distributed on an "AS IS" BASIS, |
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0:01f31e923fe2 | 20 | // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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0:01f31e923fe2 | 21 | // See the License for the specific language governing permissions and |
Pawel Zarembski |
0:01f31e923fe2 | 22 | // limitations under the License. |
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0:01f31e923fe2 | 23 | // |
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0:01f31e923fe2 | 24 | //------------------------------------------------------------------------------ |
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0:01f31e923fe2 | 25 | |
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0:01f31e923fe2 | 26 | |
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0:01f31e923fe2 | 27 | #ifndef __CMSIS_ICCARM_H__ |
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0:01f31e923fe2 | 28 | #define __CMSIS_ICCARM_H__ |
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0:01f31e923fe2 | 29 | |
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0:01f31e923fe2 | 30 | #ifndef __ICCARM__ |
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0:01f31e923fe2 | 31 | #error This file should only be compiled by ICCARM |
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0:01f31e923fe2 | 32 | #endif |
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0:01f31e923fe2 | 33 | |
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0:01f31e923fe2 | 34 | #pragma system_include |
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0:01f31e923fe2 | 35 | |
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0:01f31e923fe2 | 36 | #define __IAR_FT _Pragma("inline=forced") __intrinsic |
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0:01f31e923fe2 | 37 | |
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0:01f31e923fe2 | 38 | #if (__VER__ >= 8000000) |
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0:01f31e923fe2 | 39 | #define __ICCARM_V8 1 |
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0:01f31e923fe2 | 40 | #else |
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0:01f31e923fe2 | 41 | #define __ICCARM_V8 0 |
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0:01f31e923fe2 | 42 | #endif |
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0:01f31e923fe2 | 43 | |
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0:01f31e923fe2 | 44 | #ifndef __ALIGNED |
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0:01f31e923fe2 | 45 | #if __ICCARM_V8 |
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0:01f31e923fe2 | 46 | #define __ALIGNED(x) __attribute__((aligned(x))) |
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0:01f31e923fe2 | 47 | #elif (__VER__ >= 7080000) |
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0:01f31e923fe2 | 48 | /* Needs IAR language extensions */ |
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0:01f31e923fe2 | 49 | #define __ALIGNED(x) __attribute__((aligned(x))) |
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0:01f31e923fe2 | 50 | #else |
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0:01f31e923fe2 | 51 | #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored. |
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0:01f31e923fe2 | 52 | #define __ALIGNED(x) |
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0:01f31e923fe2 | 53 | #endif |
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0:01f31e923fe2 | 54 | #endif |
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0:01f31e923fe2 | 55 | |
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0:01f31e923fe2 | 56 | |
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0:01f31e923fe2 | 57 | /* Define compiler macros for CPU architecture, used in CMSIS 5. |
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0:01f31e923fe2 | 58 | */ |
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0:01f31e923fe2 | 59 | #if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__ |
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0:01f31e923fe2 | 60 | /* Macros already defined */ |
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0:01f31e923fe2 | 61 | #else |
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0:01f31e923fe2 | 62 | #if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__) |
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0:01f31e923fe2 | 63 | #define __ARM_ARCH_8M_MAIN__ 1 |
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0:01f31e923fe2 | 64 | #elif defined(__ARM8M_BASELINE__) |
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0:01f31e923fe2 | 65 | #define __ARM_ARCH_8M_BASE__ 1 |
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0:01f31e923fe2 | 66 | #elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M' |
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0:01f31e923fe2 | 67 | #if __ARM_ARCH == 6 |
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0:01f31e923fe2 | 68 | #define __ARM_ARCH_6M__ 1 |
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0:01f31e923fe2 | 69 | #elif __ARM_ARCH == 7 |
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0:01f31e923fe2 | 70 | #if __ARM_FEATURE_DSP |
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0:01f31e923fe2 | 71 | #define __ARM_ARCH_7EM__ 1 |
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0:01f31e923fe2 | 72 | #else |
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0:01f31e923fe2 | 73 | #define __ARM_ARCH_7M__ 1 |
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0:01f31e923fe2 | 74 | #endif |
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0:01f31e923fe2 | 75 | #endif /* __ARM_ARCH */ |
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0:01f31e923fe2 | 76 | #endif /* __ARM_ARCH_PROFILE == 'M' */ |
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0:01f31e923fe2 | 77 | #endif |
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0:01f31e923fe2 | 78 | |
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0:01f31e923fe2 | 79 | /* Alternativ core deduction for older ICCARM's */ |
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0:01f31e923fe2 | 80 | #if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \ |
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0:01f31e923fe2 | 81 | !defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__) |
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0:01f31e923fe2 | 82 | #if defined(__ARM6M__) && (__CORE__ == __ARM6M__) |
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0:01f31e923fe2 | 83 | #define __ARM_ARCH_6M__ 1 |
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0:01f31e923fe2 | 84 | #elif defined(__ARM7M__) && (__CORE__ == __ARM7M__) |
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0:01f31e923fe2 | 85 | #define __ARM_ARCH_7M__ 1 |
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0:01f31e923fe2 | 86 | #elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__) |
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0:01f31e923fe2 | 87 | #define __ARM_ARCH_7EM__ 1 |
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0:01f31e923fe2 | 88 | #elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__) |
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0:01f31e923fe2 | 89 | #define __ARM_ARCH_8M_BASE__ 1 |
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0:01f31e923fe2 | 90 | #elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__) |
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0:01f31e923fe2 | 91 | #define __ARM_ARCH_8M_MAIN__ 1 |
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0:01f31e923fe2 | 92 | #elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__) |
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0:01f31e923fe2 | 93 | #define __ARM_ARCH_8M_MAIN__ 1 |
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0:01f31e923fe2 | 94 | #else |
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0:01f31e923fe2 | 95 | #error "Unknown target." |
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0:01f31e923fe2 | 96 | #endif |
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0:01f31e923fe2 | 97 | #endif |
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0:01f31e923fe2 | 98 | |
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0:01f31e923fe2 | 99 | |
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0:01f31e923fe2 | 100 | |
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0:01f31e923fe2 | 101 | #if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1 |
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0:01f31e923fe2 | 102 | #define __IAR_M0_FAMILY 1 |
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0:01f31e923fe2 | 103 | #elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1 |
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0:01f31e923fe2 | 104 | #define __IAR_M0_FAMILY 1 |
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0:01f31e923fe2 | 105 | #else |
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0:01f31e923fe2 | 106 | #define __IAR_M0_FAMILY 0 |
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0:01f31e923fe2 | 107 | #endif |
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0:01f31e923fe2 | 108 | |
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0:01f31e923fe2 | 109 | |
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0:01f31e923fe2 | 110 | #ifndef __ASM |
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0:01f31e923fe2 | 111 | #define __ASM __asm |
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0:01f31e923fe2 | 112 | #endif |
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0:01f31e923fe2 | 113 | |
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0:01f31e923fe2 | 114 | #ifndef __COMPILER_BARRIER |
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0:01f31e923fe2 | 115 | #define __COMPILER_BARRIER() __ASM volatile("":::"memory") |
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0:01f31e923fe2 | 116 | #endif |
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0:01f31e923fe2 | 117 | |
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0:01f31e923fe2 | 118 | #ifndef __INLINE |
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0:01f31e923fe2 | 119 | #define __INLINE inline |
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0:01f31e923fe2 | 120 | #endif |
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0:01f31e923fe2 | 121 | |
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0:01f31e923fe2 | 122 | #ifndef __NO_RETURN |
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0:01f31e923fe2 | 123 | #if __ICCARM_V8 |
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0:01f31e923fe2 | 124 | #define __NO_RETURN __attribute__((__noreturn__)) |
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0:01f31e923fe2 | 125 | #else |
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0:01f31e923fe2 | 126 | #define __NO_RETURN _Pragma("object_attribute=__noreturn") |
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0:01f31e923fe2 | 127 | #endif |
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0:01f31e923fe2 | 128 | #endif |
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0:01f31e923fe2 | 129 | |
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0:01f31e923fe2 | 130 | #ifndef __PACKED |
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0:01f31e923fe2 | 131 | #if __ICCARM_V8 |
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0:01f31e923fe2 | 132 | #define __PACKED __attribute__((packed, aligned(1))) |
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0:01f31e923fe2 | 133 | #else |
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0:01f31e923fe2 | 134 | /* Needs IAR language extensions */ |
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0:01f31e923fe2 | 135 | #define __PACKED __packed |
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0:01f31e923fe2 | 136 | #endif |
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0:01f31e923fe2 | 137 | #endif |
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0:01f31e923fe2 | 138 | |
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0:01f31e923fe2 | 139 | #ifndef __PACKED_STRUCT |
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0:01f31e923fe2 | 140 | #if __ICCARM_V8 |
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0:01f31e923fe2 | 141 | #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) |
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0:01f31e923fe2 | 142 | #else |
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0:01f31e923fe2 | 143 | /* Needs IAR language extensions */ |
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0:01f31e923fe2 | 144 | #define __PACKED_STRUCT __packed struct |
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0:01f31e923fe2 | 145 | #endif |
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0:01f31e923fe2 | 146 | #endif |
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0:01f31e923fe2 | 147 | |
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0:01f31e923fe2 | 148 | #ifndef __PACKED_UNION |
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0:01f31e923fe2 | 149 | #if __ICCARM_V8 |
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0:01f31e923fe2 | 150 | #define __PACKED_UNION union __attribute__((packed, aligned(1))) |
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0:01f31e923fe2 | 151 | #else |
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0:01f31e923fe2 | 152 | /* Needs IAR language extensions */ |
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0:01f31e923fe2 | 153 | #define __PACKED_UNION __packed union |
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0:01f31e923fe2 | 154 | #endif |
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0:01f31e923fe2 | 155 | #endif |
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0:01f31e923fe2 | 156 | |
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0:01f31e923fe2 | 157 | #ifndef __RESTRICT |
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0:01f31e923fe2 | 158 | #if __ICCARM_V8 |
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0:01f31e923fe2 | 159 | #define __RESTRICT __restrict |
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0:01f31e923fe2 | 160 | #else |
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0:01f31e923fe2 | 161 | /* Needs IAR language extensions */ |
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0:01f31e923fe2 | 162 | #define __RESTRICT restrict |
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0:01f31e923fe2 | 163 | #endif |
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0:01f31e923fe2 | 164 | #endif |
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0:01f31e923fe2 | 165 | |
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0:01f31e923fe2 | 166 | #ifndef __STATIC_INLINE |
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0:01f31e923fe2 | 167 | #define __STATIC_INLINE static inline |
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0:01f31e923fe2 | 168 | #endif |
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0:01f31e923fe2 | 169 | |
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0:01f31e923fe2 | 170 | #ifndef __FORCEINLINE |
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0:01f31e923fe2 | 171 | #define __FORCEINLINE _Pragma("inline=forced") |
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0:01f31e923fe2 | 172 | #endif |
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0:01f31e923fe2 | 173 | |
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0:01f31e923fe2 | 174 | #ifndef __STATIC_FORCEINLINE |
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0:01f31e923fe2 | 175 | #define __STATIC_FORCEINLINE __FORCEINLINE __STATIC_INLINE |
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0:01f31e923fe2 | 176 | #endif |
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0:01f31e923fe2 | 177 | |
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0:01f31e923fe2 | 178 | #ifndef __UNALIGNED_UINT16_READ |
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0:01f31e923fe2 | 179 | #pragma language=save |
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0:01f31e923fe2 | 180 | #pragma language=extended |
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0:01f31e923fe2 | 181 | __IAR_FT uint16_t __iar_uint16_read(void const *ptr) |
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0:01f31e923fe2 | 182 | { |
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0:01f31e923fe2 | 183 | return *(__packed uint16_t*)(ptr); |
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0:01f31e923fe2 | 184 | } |
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0:01f31e923fe2 | 185 | #pragma language=restore |
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0:01f31e923fe2 | 186 | #define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR) |
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0:01f31e923fe2 | 187 | #endif |
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0:01f31e923fe2 | 188 | |
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0:01f31e923fe2 | 189 | |
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0:01f31e923fe2 | 190 | #ifndef __UNALIGNED_UINT16_WRITE |
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0:01f31e923fe2 | 191 | #pragma language=save |
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0:01f31e923fe2 | 192 | #pragma language=extended |
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0:01f31e923fe2 | 193 | __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val) |
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0:01f31e923fe2 | 194 | { |
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0:01f31e923fe2 | 195 | *(__packed uint16_t*)(ptr) = val;; |
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0:01f31e923fe2 | 196 | } |
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0:01f31e923fe2 | 197 | #pragma language=restore |
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0:01f31e923fe2 | 198 | #define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL) |
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0:01f31e923fe2 | 199 | #endif |
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0:01f31e923fe2 | 200 | |
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0:01f31e923fe2 | 201 | #ifndef __UNALIGNED_UINT32_READ |
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0:01f31e923fe2 | 202 | #pragma language=save |
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0:01f31e923fe2 | 203 | #pragma language=extended |
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0:01f31e923fe2 | 204 | __IAR_FT uint32_t __iar_uint32_read(void const *ptr) |
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0:01f31e923fe2 | 205 | { |
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0:01f31e923fe2 | 206 | return *(__packed uint32_t*)(ptr); |
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0:01f31e923fe2 | 207 | } |
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0:01f31e923fe2 | 208 | #pragma language=restore |
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0:01f31e923fe2 | 209 | #define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR) |
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0:01f31e923fe2 | 210 | #endif |
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0:01f31e923fe2 | 211 | |
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0:01f31e923fe2 | 212 | #ifndef __UNALIGNED_UINT32_WRITE |
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0:01f31e923fe2 | 213 | #pragma language=save |
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0:01f31e923fe2 | 214 | #pragma language=extended |
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0:01f31e923fe2 | 215 | __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val) |
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0:01f31e923fe2 | 216 | { |
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0:01f31e923fe2 | 217 | *(__packed uint32_t*)(ptr) = val;; |
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0:01f31e923fe2 | 218 | } |
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0:01f31e923fe2 | 219 | #pragma language=restore |
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0:01f31e923fe2 | 220 | #define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL) |
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0:01f31e923fe2 | 221 | #endif |
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0:01f31e923fe2 | 222 | |
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0:01f31e923fe2 | 223 | #ifndef __UNALIGNED_UINT32 /* deprecated */ |
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0:01f31e923fe2 | 224 | #pragma language=save |
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0:01f31e923fe2 | 225 | #pragma language=extended |
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0:01f31e923fe2 | 226 | __packed struct __iar_u32 { uint32_t v; }; |
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0:01f31e923fe2 | 227 | #pragma language=restore |
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0:01f31e923fe2 | 228 | #define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v) |
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0:01f31e923fe2 | 229 | #endif |
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0:01f31e923fe2 | 230 | |
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0:01f31e923fe2 | 231 | #ifndef __USED |
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0:01f31e923fe2 | 232 | #if __ICCARM_V8 |
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0:01f31e923fe2 | 233 | #define __USED __attribute__((used)) |
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0:01f31e923fe2 | 234 | #else |
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0:01f31e923fe2 | 235 | #define __USED _Pragma("__root") |
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0:01f31e923fe2 | 236 | #endif |
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0:01f31e923fe2 | 237 | #endif |
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0:01f31e923fe2 | 238 | |
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0:01f31e923fe2 | 239 | #ifndef __WEAK |
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0:01f31e923fe2 | 240 | #if __ICCARM_V8 |
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0:01f31e923fe2 | 241 | #define __WEAK __attribute__((weak)) |
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0:01f31e923fe2 | 242 | #else |
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0:01f31e923fe2 | 243 | #define __WEAK _Pragma("__weak") |
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0:01f31e923fe2 | 244 | #endif |
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0:01f31e923fe2 | 245 | #endif |
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0:01f31e923fe2 | 246 | |
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0:01f31e923fe2 | 247 | #ifndef __PROGRAM_START |
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0:01f31e923fe2 | 248 | #define __PROGRAM_START __iar_program_start |
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0:01f31e923fe2 | 249 | #endif |
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0:01f31e923fe2 | 250 | |
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0:01f31e923fe2 | 251 | #ifndef __INITIAL_SP |
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0:01f31e923fe2 | 252 | #define __INITIAL_SP CSTACK$$Limit |
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0:01f31e923fe2 | 253 | #endif |
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0:01f31e923fe2 | 254 | |
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0:01f31e923fe2 | 255 | #ifndef __STACK_LIMIT |
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0:01f31e923fe2 | 256 | #define __STACK_LIMIT CSTACK$$Base |
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0:01f31e923fe2 | 257 | #endif |
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0:01f31e923fe2 | 258 | |
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0:01f31e923fe2 | 259 | #ifndef __VECTOR_TABLE |
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0:01f31e923fe2 | 260 | #define __VECTOR_TABLE __vector_table |
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0:01f31e923fe2 | 261 | #endif |
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0:01f31e923fe2 | 262 | |
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0:01f31e923fe2 | 263 | #ifndef __VECTOR_TABLE_ATTRIBUTE |
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0:01f31e923fe2 | 264 | #define __VECTOR_TABLE_ATTRIBUTE @".intvec" |
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0:01f31e923fe2 | 265 | #endif |
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0:01f31e923fe2 | 266 | |
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0:01f31e923fe2 | 267 | #ifndef __ICCARM_INTRINSICS_VERSION__ |
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0:01f31e923fe2 | 268 | #define __ICCARM_INTRINSICS_VERSION__ 0 |
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0:01f31e923fe2 | 269 | #endif |
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0:01f31e923fe2 | 270 | |
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0:01f31e923fe2 | 271 | #if __ICCARM_INTRINSICS_VERSION__ == 2 |
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0:01f31e923fe2 | 272 | |
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0:01f31e923fe2 | 273 | #if defined(__CLZ) |
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0:01f31e923fe2 | 274 | #undef __CLZ |
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0:01f31e923fe2 | 275 | #endif |
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0:01f31e923fe2 | 276 | #if defined(__REVSH) |
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0:01f31e923fe2 | 277 | #undef __REVSH |
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0:01f31e923fe2 | 278 | #endif |
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0:01f31e923fe2 | 279 | #if defined(__RBIT) |
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0:01f31e923fe2 | 280 | #undef __RBIT |
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0:01f31e923fe2 | 281 | #endif |
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0:01f31e923fe2 | 282 | #if defined(__SSAT) |
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0:01f31e923fe2 | 283 | #undef __SSAT |
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0:01f31e923fe2 | 284 | #endif |
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0:01f31e923fe2 | 285 | #if defined(__USAT) |
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0:01f31e923fe2 | 286 | #undef __USAT |
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0:01f31e923fe2 | 287 | #endif |
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0:01f31e923fe2 | 288 | |
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0:01f31e923fe2 | 289 | #include "iccarm_builtin.h" |
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0:01f31e923fe2 | 290 | |
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0:01f31e923fe2 | 291 | #define __disable_fault_irq __iar_builtin_disable_fiq |
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0:01f31e923fe2 | 292 | #define __disable_irq __iar_builtin_disable_interrupt |
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0:01f31e923fe2 | 293 | #define __enable_fault_irq __iar_builtin_enable_fiq |
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0:01f31e923fe2 | 294 | #define __enable_irq __iar_builtin_enable_interrupt |
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0:01f31e923fe2 | 295 | #define __arm_rsr __iar_builtin_rsr |
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0:01f31e923fe2 | 296 | #define __arm_wsr __iar_builtin_wsr |
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0:01f31e923fe2 | 297 | |
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0:01f31e923fe2 | 298 | |
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0:01f31e923fe2 | 299 | #define __get_APSR() (__arm_rsr("APSR")) |
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0:01f31e923fe2 | 300 | #define __get_BASEPRI() (__arm_rsr("BASEPRI")) |
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0:01f31e923fe2 | 301 | #define __get_CONTROL() (__arm_rsr("CONTROL")) |
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0:01f31e923fe2 | 302 | #define __get_FAULTMASK() (__arm_rsr("FAULTMASK")) |
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0:01f31e923fe2 | 303 | |
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0:01f31e923fe2 | 304 | #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ |
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0:01f31e923fe2 | 305 | (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) |
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0:01f31e923fe2 | 306 | #define __get_FPSCR() (__arm_rsr("FPSCR")) |
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0:01f31e923fe2 | 307 | #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) |
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0:01f31e923fe2 | 308 | #else |
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0:01f31e923fe2 | 309 | #define __get_FPSCR() ( 0 ) |
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0:01f31e923fe2 | 310 | #define __set_FPSCR(VALUE) ((void)VALUE) |
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0:01f31e923fe2 | 311 | #endif |
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0:01f31e923fe2 | 312 | |
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0:01f31e923fe2 | 313 | #define __get_IPSR() (__arm_rsr("IPSR")) |
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0:01f31e923fe2 | 314 | #define __get_MSP() (__arm_rsr("MSP")) |
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0:01f31e923fe2 | 315 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
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0:01f31e923fe2 | 316 | (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) |
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0:01f31e923fe2 | 317 | // without main extensions, the non-secure MSPLIM is RAZ/WI |
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0:01f31e923fe2 | 318 | #define __get_MSPLIM() (0U) |
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0:01f31e923fe2 | 319 | #else |
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0:01f31e923fe2 | 320 | #define __get_MSPLIM() (__arm_rsr("MSPLIM")) |
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0:01f31e923fe2 | 321 | #endif |
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0:01f31e923fe2 | 322 | #define __get_PRIMASK() (__arm_rsr("PRIMASK")) |
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0:01f31e923fe2 | 323 | #define __get_PSP() (__arm_rsr("PSP")) |
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0:01f31e923fe2 | 324 | |
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0:01f31e923fe2 | 325 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
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0:01f31e923fe2 | 326 | (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) |
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0:01f31e923fe2 | 327 | // without main extensions, the non-secure PSPLIM is RAZ/WI |
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0:01f31e923fe2 | 328 | #define __get_PSPLIM() (0U) |
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0:01f31e923fe2 | 329 | #else |
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0:01f31e923fe2 | 330 | #define __get_PSPLIM() (__arm_rsr("PSPLIM")) |
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0:01f31e923fe2 | 331 | #endif |
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0:01f31e923fe2 | 332 | |
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0:01f31e923fe2 | 333 | #define __get_xPSR() (__arm_rsr("xPSR")) |
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0:01f31e923fe2 | 334 | |
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0:01f31e923fe2 | 335 | #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE))) |
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0:01f31e923fe2 | 336 | #define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE))) |
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0:01f31e923fe2 | 337 | #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE))) |
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0:01f31e923fe2 | 338 | #define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE))) |
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0:01f31e923fe2 | 339 | #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) |
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0:01f31e923fe2 | 340 | |
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0:01f31e923fe2 | 341 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
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0:01f31e923fe2 | 342 | (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) |
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0:01f31e923fe2 | 343 | // without main extensions, the non-secure MSPLIM is RAZ/WI |
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0:01f31e923fe2 | 344 | #define __set_MSPLIM(VALUE) ((void)(VALUE)) |
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0:01f31e923fe2 | 345 | #else |
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0:01f31e923fe2 | 346 | #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) |
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0:01f31e923fe2 | 347 | #endif |
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0:01f31e923fe2 | 348 | #define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE))) |
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0:01f31e923fe2 | 349 | #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) |
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0:01f31e923fe2 | 350 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
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0:01f31e923fe2 | 351 | (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) |
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0:01f31e923fe2 | 352 | // without main extensions, the non-secure PSPLIM is RAZ/WI |
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0:01f31e923fe2 | 353 | #define __set_PSPLIM(VALUE) ((void)(VALUE)) |
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0:01f31e923fe2 | 354 | #else |
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0:01f31e923fe2 | 355 | #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) |
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0:01f31e923fe2 | 356 | #endif |
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0:01f31e923fe2 | 357 | |
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0:01f31e923fe2 | 358 | #define __TZ_get_CONTROL_NS() (__arm_rsr("CONTROL_NS")) |
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0:01f31e923fe2 | 359 | #define __TZ_set_CONTROL_NS(VALUE) (__arm_wsr("CONTROL_NS", (VALUE))) |
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0:01f31e923fe2 | 360 | #define __TZ_get_PSP_NS() (__arm_rsr("PSP_NS")) |
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0:01f31e923fe2 | 361 | #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE))) |
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0:01f31e923fe2 | 362 | #define __TZ_get_MSP_NS() (__arm_rsr("MSP_NS")) |
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0:01f31e923fe2 | 363 | #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE))) |
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0:01f31e923fe2 | 364 | #define __TZ_get_SP_NS() (__arm_rsr("SP_NS")) |
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0:01f31e923fe2 | 365 | #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) |
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0:01f31e923fe2 | 366 | #define __TZ_get_PRIMASK_NS() (__arm_rsr("PRIMASK_NS")) |
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0:01f31e923fe2 | 367 | #define __TZ_set_PRIMASK_NS(VALUE) (__arm_wsr("PRIMASK_NS", (VALUE))) |
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0:01f31e923fe2 | 368 | #define __TZ_get_BASEPRI_NS() (__arm_rsr("BASEPRI_NS")) |
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0:01f31e923fe2 | 369 | #define __TZ_set_BASEPRI_NS(VALUE) (__arm_wsr("BASEPRI_NS", (VALUE))) |
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0:01f31e923fe2 | 370 | #define __TZ_get_FAULTMASK_NS() (__arm_rsr("FAULTMASK_NS")) |
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0:01f31e923fe2 | 371 | #define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE))) |
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0:01f31e923fe2 | 372 | |
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0:01f31e923fe2 | 373 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
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0:01f31e923fe2 | 374 | (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) |
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0:01f31e923fe2 | 375 | // without main extensions, the non-secure PSPLIM is RAZ/WI |
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0:01f31e923fe2 | 376 | #define __TZ_get_PSPLIM_NS() (0U) |
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0:01f31e923fe2 | 377 | #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) |
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0:01f31e923fe2 | 378 | #else |
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0:01f31e923fe2 | 379 | #define __TZ_get_PSPLIM_NS() (__arm_rsr("PSPLIM_NS")) |
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0:01f31e923fe2 | 380 | #define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE))) |
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0:01f31e923fe2 | 381 | #endif |
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0:01f31e923fe2 | 382 | |
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0:01f31e923fe2 | 383 | #define __TZ_get_MSPLIM_NS() (__arm_rsr("MSPLIM_NS")) |
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0:01f31e923fe2 | 384 | #define __TZ_set_MSPLIM_NS(VALUE) (__arm_wsr("MSPLIM_NS", (VALUE))) |
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0:01f31e923fe2 | 385 | |
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0:01f31e923fe2 | 386 | #define __NOP __iar_builtin_no_operation |
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0:01f31e923fe2 | 387 | |
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0:01f31e923fe2 | 388 | #define __CLZ __iar_builtin_CLZ |
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0:01f31e923fe2 | 389 | #define __CLREX __iar_builtin_CLREX |
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0:01f31e923fe2 | 390 | |
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0:01f31e923fe2 | 391 | #define __DMB __iar_builtin_DMB |
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0:01f31e923fe2 | 392 | #define __DSB __iar_builtin_DSB |
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0:01f31e923fe2 | 393 | #define __ISB __iar_builtin_ISB |
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0:01f31e923fe2 | 394 | |
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0:01f31e923fe2 | 395 | #define __LDREXB __iar_builtin_LDREXB |
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0:01f31e923fe2 | 396 | #define __LDREXH __iar_builtin_LDREXH |
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0:01f31e923fe2 | 397 | #define __LDREXW __iar_builtin_LDREX |
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0:01f31e923fe2 | 398 | |
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0:01f31e923fe2 | 399 | #define __RBIT __iar_builtin_RBIT |
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0:01f31e923fe2 | 400 | #define __REV __iar_builtin_REV |
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0:01f31e923fe2 | 401 | #define __REV16 __iar_builtin_REV16 |
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0:01f31e923fe2 | 402 | |
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0:01f31e923fe2 | 403 | __IAR_FT int16_t __REVSH(int16_t val) |
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0:01f31e923fe2 | 404 | { |
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0:01f31e923fe2 | 405 | return (int16_t) __iar_builtin_REVSH(val); |
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0:01f31e923fe2 | 406 | } |
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0:01f31e923fe2 | 407 | |
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0:01f31e923fe2 | 408 | #define __ROR __iar_builtin_ROR |
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0:01f31e923fe2 | 409 | #define __RRX __iar_builtin_RRX |
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0:01f31e923fe2 | 410 | |
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0:01f31e923fe2 | 411 | #define __SEV __iar_builtin_SEV |
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0:01f31e923fe2 | 412 | |
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0:01f31e923fe2 | 413 | #if !__IAR_M0_FAMILY |
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0:01f31e923fe2 | 414 | #define __SSAT __iar_builtin_SSAT |
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0:01f31e923fe2 | 415 | #endif |
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0:01f31e923fe2 | 416 | |
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0:01f31e923fe2 | 417 | #define __STREXB __iar_builtin_STREXB |
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0:01f31e923fe2 | 418 | #define __STREXH __iar_builtin_STREXH |
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0:01f31e923fe2 | 419 | #define __STREXW __iar_builtin_STREX |
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0:01f31e923fe2 | 420 | |
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0:01f31e923fe2 | 421 | #if !__IAR_M0_FAMILY |
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0:01f31e923fe2 | 422 | #define __USAT __iar_builtin_USAT |
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0:01f31e923fe2 | 423 | #endif |
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0:01f31e923fe2 | 424 | |
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0:01f31e923fe2 | 425 | #define __WFE __iar_builtin_WFE |
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0:01f31e923fe2 | 426 | #define __WFI __iar_builtin_WFI |
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0:01f31e923fe2 | 427 | |
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0:01f31e923fe2 | 428 | #if __ARM_MEDIA__ |
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0:01f31e923fe2 | 429 | #define __SADD8 __iar_builtin_SADD8 |
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0:01f31e923fe2 | 430 | #define __QADD8 __iar_builtin_QADD8 |
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0:01f31e923fe2 | 431 | #define __SHADD8 __iar_builtin_SHADD8 |
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0:01f31e923fe2 | 432 | #define __UADD8 __iar_builtin_UADD8 |
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0:01f31e923fe2 | 433 | #define __UQADD8 __iar_builtin_UQADD8 |
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0:01f31e923fe2 | 434 | #define __UHADD8 __iar_builtin_UHADD8 |
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0:01f31e923fe2 | 435 | #define __SSUB8 __iar_builtin_SSUB8 |
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0:01f31e923fe2 | 436 | #define __QSUB8 __iar_builtin_QSUB8 |
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0:01f31e923fe2 | 437 | #define __SHSUB8 __iar_builtin_SHSUB8 |
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0:01f31e923fe2 | 438 | #define __USUB8 __iar_builtin_USUB8 |
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0:01f31e923fe2 | 439 | #define __UQSUB8 __iar_builtin_UQSUB8 |
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0:01f31e923fe2 | 440 | #define __UHSUB8 __iar_builtin_UHSUB8 |
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0:01f31e923fe2 | 441 | #define __SADD16 __iar_builtin_SADD16 |
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0:01f31e923fe2 | 442 | #define __QADD16 __iar_builtin_QADD16 |
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0:01f31e923fe2 | 443 | #define __SHADD16 __iar_builtin_SHADD16 |
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0:01f31e923fe2 | 444 | #define __UADD16 __iar_builtin_UADD16 |
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0:01f31e923fe2 | 445 | #define __UQADD16 __iar_builtin_UQADD16 |
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0:01f31e923fe2 | 446 | #define __UHADD16 __iar_builtin_UHADD16 |
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0:01f31e923fe2 | 447 | #define __SSUB16 __iar_builtin_SSUB16 |
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0:01f31e923fe2 | 448 | #define __QSUB16 __iar_builtin_QSUB16 |
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0:01f31e923fe2 | 449 | #define __SHSUB16 __iar_builtin_SHSUB16 |
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0:01f31e923fe2 | 450 | #define __USUB16 __iar_builtin_USUB16 |
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0:01f31e923fe2 | 451 | #define __UQSUB16 __iar_builtin_UQSUB16 |
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0:01f31e923fe2 | 452 | #define __UHSUB16 __iar_builtin_UHSUB16 |
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0:01f31e923fe2 | 453 | #define __SASX __iar_builtin_SASX |
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0:01f31e923fe2 | 454 | #define __QASX __iar_builtin_QASX |
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0:01f31e923fe2 | 455 | #define __SHASX __iar_builtin_SHASX |
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0:01f31e923fe2 | 456 | #define __UASX __iar_builtin_UASX |
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0:01f31e923fe2 | 457 | #define __UQASX __iar_builtin_UQASX |
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0:01f31e923fe2 | 458 | #define __UHASX __iar_builtin_UHASX |
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0:01f31e923fe2 | 459 | #define __SSAX __iar_builtin_SSAX |
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0:01f31e923fe2 | 460 | #define __QSAX __iar_builtin_QSAX |
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0:01f31e923fe2 | 461 | #define __SHSAX __iar_builtin_SHSAX |
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0:01f31e923fe2 | 462 | #define __USAX __iar_builtin_USAX |
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0:01f31e923fe2 | 463 | #define __UQSAX __iar_builtin_UQSAX |
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0:01f31e923fe2 | 464 | #define __UHSAX __iar_builtin_UHSAX |
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0:01f31e923fe2 | 465 | #define __USAD8 __iar_builtin_USAD8 |
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0:01f31e923fe2 | 466 | #define __USADA8 __iar_builtin_USADA8 |
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0:01f31e923fe2 | 467 | #define __SSAT16 __iar_builtin_SSAT16 |
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0:01f31e923fe2 | 468 | #define __USAT16 __iar_builtin_USAT16 |
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0:01f31e923fe2 | 469 | #define __UXTB16 __iar_builtin_UXTB16 |
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0:01f31e923fe2 | 470 | #define __UXTAB16 __iar_builtin_UXTAB16 |
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0:01f31e923fe2 | 471 | #define __SXTB16 __iar_builtin_SXTB16 |
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0:01f31e923fe2 | 472 | #define __SXTAB16 __iar_builtin_SXTAB16 |
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0:01f31e923fe2 | 473 | #define __SMUAD __iar_builtin_SMUAD |
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0:01f31e923fe2 | 474 | #define __SMUADX __iar_builtin_SMUADX |
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0:01f31e923fe2 | 475 | #define __SMMLA __iar_builtin_SMMLA |
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0:01f31e923fe2 | 476 | #define __SMLAD __iar_builtin_SMLAD |
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0:01f31e923fe2 | 477 | #define __SMLADX __iar_builtin_SMLADX |
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0:01f31e923fe2 | 478 | #define __SMLALD __iar_builtin_SMLALD |
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0:01f31e923fe2 | 479 | #define __SMLALDX __iar_builtin_SMLALDX |
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0:01f31e923fe2 | 480 | #define __SMUSD __iar_builtin_SMUSD |
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0:01f31e923fe2 | 481 | #define __SMUSDX __iar_builtin_SMUSDX |
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0:01f31e923fe2 | 482 | #define __SMLSD __iar_builtin_SMLSD |
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0:01f31e923fe2 | 483 | #define __SMLSDX __iar_builtin_SMLSDX |
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0:01f31e923fe2 | 484 | #define __SMLSLD __iar_builtin_SMLSLD |
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0:01f31e923fe2 | 485 | #define __SMLSLDX __iar_builtin_SMLSLDX |
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0:01f31e923fe2 | 486 | #define __SEL __iar_builtin_SEL |
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0:01f31e923fe2 | 487 | #define __QADD __iar_builtin_QADD |
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0:01f31e923fe2 | 488 | #define __QSUB __iar_builtin_QSUB |
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0:01f31e923fe2 | 489 | #define __PKHBT __iar_builtin_PKHBT |
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0:01f31e923fe2 | 490 | #define __PKHTB __iar_builtin_PKHTB |
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0:01f31e923fe2 | 491 | #endif |
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0:01f31e923fe2 | 492 | |
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0:01f31e923fe2 | 493 | #else /* __ICCARM_INTRINSICS_VERSION__ == 2 */ |
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0:01f31e923fe2 | 494 | |
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0:01f31e923fe2 | 495 | #if __IAR_M0_FAMILY |
Pawel Zarembski |
0:01f31e923fe2 | 496 | /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */ |
Pawel Zarembski |
0:01f31e923fe2 | 497 | #define __CLZ __cmsis_iar_clz_not_active |
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0:01f31e923fe2 | 498 | #define __SSAT __cmsis_iar_ssat_not_active |
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0:01f31e923fe2 | 499 | #define __USAT __cmsis_iar_usat_not_active |
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0:01f31e923fe2 | 500 | #define __RBIT __cmsis_iar_rbit_not_active |
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0:01f31e923fe2 | 501 | #define __get_APSR __cmsis_iar_get_APSR_not_active |
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0:01f31e923fe2 | 502 | #endif |
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0:01f31e923fe2 | 503 | |
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0:01f31e923fe2 | 504 | |
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0:01f31e923fe2 | 505 | #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ |
Pawel Zarembski |
0:01f31e923fe2 | 506 | (defined (__FPU_USED ) && (__FPU_USED == 1U)) )) |
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0:01f31e923fe2 | 507 | #define __get_FPSCR __cmsis_iar_get_FPSR_not_active |
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0:01f31e923fe2 | 508 | #define __set_FPSCR __cmsis_iar_set_FPSR_not_active |
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0:01f31e923fe2 | 509 | #endif |
Pawel Zarembski |
0:01f31e923fe2 | 510 | |
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0:01f31e923fe2 | 511 | #ifdef __INTRINSICS_INCLUDED |
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0:01f31e923fe2 | 512 | #error intrinsics.h is already included previously! |
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0:01f31e923fe2 | 513 | #endif |
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0:01f31e923fe2 | 514 | |
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0:01f31e923fe2 | 515 | #include <intrinsics.h> |
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0:01f31e923fe2 | 516 | |
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0:01f31e923fe2 | 517 | #if __IAR_M0_FAMILY |
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0:01f31e923fe2 | 518 | /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */ |
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0:01f31e923fe2 | 519 | #undef __CLZ |
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0:01f31e923fe2 | 520 | #undef __SSAT |
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0:01f31e923fe2 | 521 | #undef __USAT |
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0:01f31e923fe2 | 522 | #undef __RBIT |
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0:01f31e923fe2 | 523 | #undef __get_APSR |
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0:01f31e923fe2 | 524 | |
Pawel Zarembski |
0:01f31e923fe2 | 525 | __STATIC_INLINE uint8_t __CLZ(uint32_t data) |
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0:01f31e923fe2 | 526 | { |
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0:01f31e923fe2 | 527 | if (data == 0U) { return 32U; } |
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0:01f31e923fe2 | 528 | |
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0:01f31e923fe2 | 529 | uint32_t count = 0U; |
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0:01f31e923fe2 | 530 | uint32_t mask = 0x80000000U; |
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0:01f31e923fe2 | 531 | |
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0:01f31e923fe2 | 532 | while ((data & mask) == 0U) |
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0:01f31e923fe2 | 533 | { |
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0:01f31e923fe2 | 534 | count += 1U; |
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0:01f31e923fe2 | 535 | mask = mask >> 1U; |
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0:01f31e923fe2 | 536 | } |
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0:01f31e923fe2 | 537 | return count; |
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0:01f31e923fe2 | 538 | } |
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0:01f31e923fe2 | 539 | |
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0:01f31e923fe2 | 540 | __STATIC_INLINE uint32_t __RBIT(uint32_t v) |
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0:01f31e923fe2 | 541 | { |
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0:01f31e923fe2 | 542 | uint8_t sc = 31U; |
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0:01f31e923fe2 | 543 | uint32_t r = v; |
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0:01f31e923fe2 | 544 | for (v >>= 1U; v; v >>= 1U) |
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0:01f31e923fe2 | 545 | { |
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0:01f31e923fe2 | 546 | r <<= 1U; |
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0:01f31e923fe2 | 547 | r |= v & 1U; |
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0:01f31e923fe2 | 548 | sc--; |
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0:01f31e923fe2 | 549 | } |
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0:01f31e923fe2 | 550 | return (r << sc); |
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0:01f31e923fe2 | 551 | } |
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0:01f31e923fe2 | 552 | |
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0:01f31e923fe2 | 553 | __STATIC_INLINE uint32_t __get_APSR(void) |
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0:01f31e923fe2 | 554 | { |
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0:01f31e923fe2 | 555 | uint32_t res; |
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0:01f31e923fe2 | 556 | __asm("MRS %0,APSR" : "=r" (res)); |
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0:01f31e923fe2 | 557 | return res; |
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0:01f31e923fe2 | 558 | } |
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0:01f31e923fe2 | 559 | |
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0:01f31e923fe2 | 560 | #endif |
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0:01f31e923fe2 | 561 | |
Pawel Zarembski |
0:01f31e923fe2 | 562 | #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ |
Pawel Zarembski |
0:01f31e923fe2 | 563 | (defined (__FPU_USED ) && (__FPU_USED == 1U)) )) |
Pawel Zarembski |
0:01f31e923fe2 | 564 | #undef __get_FPSCR |
Pawel Zarembski |
0:01f31e923fe2 | 565 | #undef __set_FPSCR |
Pawel Zarembski |
0:01f31e923fe2 | 566 | #define __get_FPSCR() (0) |
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0:01f31e923fe2 | 567 | #define __set_FPSCR(VALUE) ((void)VALUE) |
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0:01f31e923fe2 | 568 | #endif |
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0:01f31e923fe2 | 569 | |
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0:01f31e923fe2 | 570 | #pragma diag_suppress=Pe940 |
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0:01f31e923fe2 | 571 | #pragma diag_suppress=Pe177 |
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0:01f31e923fe2 | 572 | |
Pawel Zarembski |
0:01f31e923fe2 | 573 | #define __enable_irq __enable_interrupt |
Pawel Zarembski |
0:01f31e923fe2 | 574 | #define __disable_irq __disable_interrupt |
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0:01f31e923fe2 | 575 | #define __NOP __no_operation |
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0:01f31e923fe2 | 576 | |
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0:01f31e923fe2 | 577 | #define __get_xPSR __get_PSR |
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0:01f31e923fe2 | 578 | |
Pawel Zarembski |
0:01f31e923fe2 | 579 | #if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0) |
Pawel Zarembski |
0:01f31e923fe2 | 580 | |
Pawel Zarembski |
0:01f31e923fe2 | 581 | __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr) |
Pawel Zarembski |
0:01f31e923fe2 | 582 | { |
Pawel Zarembski |
0:01f31e923fe2 | 583 | return __LDREX((unsigned long *)ptr); |
Pawel Zarembski |
0:01f31e923fe2 | 584 | } |
Pawel Zarembski |
0:01f31e923fe2 | 585 | |
Pawel Zarembski |
0:01f31e923fe2 | 586 | __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr) |
Pawel Zarembski |
0:01f31e923fe2 | 587 | { |
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0:01f31e923fe2 | 588 | return __STREX(value, (unsigned long *)ptr); |
Pawel Zarembski |
0:01f31e923fe2 | 589 | } |
Pawel Zarembski |
0:01f31e923fe2 | 590 | #endif |
Pawel Zarembski |
0:01f31e923fe2 | 591 | |
Pawel Zarembski |
0:01f31e923fe2 | 592 | |
Pawel Zarembski |
0:01f31e923fe2 | 593 | /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */ |
Pawel Zarembski |
0:01f31e923fe2 | 594 | #if (__CORTEX_M >= 0x03) |
Pawel Zarembski |
0:01f31e923fe2 | 595 | |
Pawel Zarembski |
0:01f31e923fe2 | 596 | __IAR_FT uint32_t __RRX(uint32_t value) |
Pawel Zarembski |
0:01f31e923fe2 | 597 | { |
Pawel Zarembski |
0:01f31e923fe2 | 598 | uint32_t result; |
Pawel Zarembski |
0:01f31e923fe2 | 599 | __ASM volatile("RRX %0, %1" : "=r"(result) : "r" (value)); |
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0:01f31e923fe2 | 600 | return(result); |
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0:01f31e923fe2 | 601 | } |
Pawel Zarembski |
0:01f31e923fe2 | 602 | |
Pawel Zarembski |
0:01f31e923fe2 | 603 | __IAR_FT void __set_BASEPRI_MAX(uint32_t value) |
Pawel Zarembski |
0:01f31e923fe2 | 604 | { |
Pawel Zarembski |
0:01f31e923fe2 | 605 | __asm volatile("MSR BASEPRI_MAX,%0"::"r" (value)); |
Pawel Zarembski |
0:01f31e923fe2 | 606 | } |
Pawel Zarembski |
0:01f31e923fe2 | 607 | |
Pawel Zarembski |
0:01f31e923fe2 | 608 | |
Pawel Zarembski |
0:01f31e923fe2 | 609 | #define __enable_fault_irq __enable_fiq |
Pawel Zarembski |
0:01f31e923fe2 | 610 | #define __disable_fault_irq __disable_fiq |
Pawel Zarembski |
0:01f31e923fe2 | 611 | |
Pawel Zarembski |
0:01f31e923fe2 | 612 | |
Pawel Zarembski |
0:01f31e923fe2 | 613 | #endif /* (__CORTEX_M >= 0x03) */ |
Pawel Zarembski |
0:01f31e923fe2 | 614 | |
Pawel Zarembski |
0:01f31e923fe2 | 615 | __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2) |
Pawel Zarembski |
0:01f31e923fe2 | 616 | { |
Pawel Zarembski |
0:01f31e923fe2 | 617 | return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2)); |
Pawel Zarembski |
0:01f31e923fe2 | 618 | } |
Pawel Zarembski |
0:01f31e923fe2 | 619 | |
Pawel Zarembski |
0:01f31e923fe2 | 620 | #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ |
Pawel Zarembski |
0:01f31e923fe2 | 621 | (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) |
Pawel Zarembski |
0:01f31e923fe2 | 622 | |
Pawel Zarembski |
0:01f31e923fe2 | 623 | __IAR_FT uint32_t __get_MSPLIM(void) |
Pawel Zarembski |
0:01f31e923fe2 | 624 | { |
Pawel Zarembski |
0:01f31e923fe2 | 625 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 626 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
Pawel Zarembski |
0:01f31e923fe2 | 627 | (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) |
Pawel Zarembski |
0:01f31e923fe2 | 628 | // without main extensions, the non-secure MSPLIM is RAZ/WI |
Pawel Zarembski |
0:01f31e923fe2 | 629 | res = 0U; |
Pawel Zarembski |
0:01f31e923fe2 | 630 | #else |
Pawel Zarembski |
0:01f31e923fe2 | 631 | __asm volatile("MRS %0,MSPLIM" : "=r" (res)); |
Pawel Zarembski |
0:01f31e923fe2 | 632 | #endif |
Pawel Zarembski |
0:01f31e923fe2 | 633 | return res; |
Pawel Zarembski |
0:01f31e923fe2 | 634 | } |
Pawel Zarembski |
0:01f31e923fe2 | 635 | |
Pawel Zarembski |
0:01f31e923fe2 | 636 | __IAR_FT void __set_MSPLIM(uint32_t value) |
Pawel Zarembski |
0:01f31e923fe2 | 637 | { |
Pawel Zarembski |
0:01f31e923fe2 | 638 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
Pawel Zarembski |
0:01f31e923fe2 | 639 | (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) |
Pawel Zarembski |
0:01f31e923fe2 | 640 | // without main extensions, the non-secure MSPLIM is RAZ/WI |
Pawel Zarembski |
0:01f31e923fe2 | 641 | (void)value; |
Pawel Zarembski |
0:01f31e923fe2 | 642 | #else |
Pawel Zarembski |
0:01f31e923fe2 | 643 | __asm volatile("MSR MSPLIM,%0" :: "r" (value)); |
Pawel Zarembski |
0:01f31e923fe2 | 644 | #endif |
Pawel Zarembski |
0:01f31e923fe2 | 645 | } |
Pawel Zarembski |
0:01f31e923fe2 | 646 | |
Pawel Zarembski |
0:01f31e923fe2 | 647 | __IAR_FT uint32_t __get_PSPLIM(void) |
Pawel Zarembski |
0:01f31e923fe2 | 648 | { |
Pawel Zarembski |
0:01f31e923fe2 | 649 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 650 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
Pawel Zarembski |
0:01f31e923fe2 | 651 | (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) |
Pawel Zarembski |
0:01f31e923fe2 | 652 | // without main extensions, the non-secure PSPLIM is RAZ/WI |
Pawel Zarembski |
0:01f31e923fe2 | 653 | res = 0U; |
Pawel Zarembski |
0:01f31e923fe2 | 654 | #else |
Pawel Zarembski |
0:01f31e923fe2 | 655 | __asm volatile("MRS %0,PSPLIM" : "=r" (res)); |
Pawel Zarembski |
0:01f31e923fe2 | 656 | #endif |
Pawel Zarembski |
0:01f31e923fe2 | 657 | return res; |
Pawel Zarembski |
0:01f31e923fe2 | 658 | } |
Pawel Zarembski |
0:01f31e923fe2 | 659 | |
Pawel Zarembski |
0:01f31e923fe2 | 660 | __IAR_FT void __set_PSPLIM(uint32_t value) |
Pawel Zarembski |
0:01f31e923fe2 | 661 | { |
Pawel Zarembski |
0:01f31e923fe2 | 662 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
Pawel Zarembski |
0:01f31e923fe2 | 663 | (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) |
Pawel Zarembski |
0:01f31e923fe2 | 664 | // without main extensions, the non-secure PSPLIM is RAZ/WI |
Pawel Zarembski |
0:01f31e923fe2 | 665 | (void)value; |
Pawel Zarembski |
0:01f31e923fe2 | 666 | #else |
Pawel Zarembski |
0:01f31e923fe2 | 667 | __asm volatile("MSR PSPLIM,%0" :: "r" (value)); |
Pawel Zarembski |
0:01f31e923fe2 | 668 | #endif |
Pawel Zarembski |
0:01f31e923fe2 | 669 | } |
Pawel Zarembski |
0:01f31e923fe2 | 670 | |
Pawel Zarembski |
0:01f31e923fe2 | 671 | __IAR_FT uint32_t __TZ_get_CONTROL_NS(void) |
Pawel Zarembski |
0:01f31e923fe2 | 672 | { |
Pawel Zarembski |
0:01f31e923fe2 | 673 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 674 | __asm volatile("MRS %0,CONTROL_NS" : "=r" (res)); |
Pawel Zarembski |
0:01f31e923fe2 | 675 | return res; |
Pawel Zarembski |
0:01f31e923fe2 | 676 | } |
Pawel Zarembski |
0:01f31e923fe2 | 677 | |
Pawel Zarembski |
0:01f31e923fe2 | 678 | __IAR_FT void __TZ_set_CONTROL_NS(uint32_t value) |
Pawel Zarembski |
0:01f31e923fe2 | 679 | { |
Pawel Zarembski |
0:01f31e923fe2 | 680 | __asm volatile("MSR CONTROL_NS,%0" :: "r" (value)); |
Pawel Zarembski |
0:01f31e923fe2 | 681 | } |
Pawel Zarembski |
0:01f31e923fe2 | 682 | |
Pawel Zarembski |
0:01f31e923fe2 | 683 | __IAR_FT uint32_t __TZ_get_PSP_NS(void) |
Pawel Zarembski |
0:01f31e923fe2 | 684 | { |
Pawel Zarembski |
0:01f31e923fe2 | 685 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 686 | __asm volatile("MRS %0,PSP_NS" : "=r" (res)); |
Pawel Zarembski |
0:01f31e923fe2 | 687 | return res; |
Pawel Zarembski |
0:01f31e923fe2 | 688 | } |
Pawel Zarembski |
0:01f31e923fe2 | 689 | |
Pawel Zarembski |
0:01f31e923fe2 | 690 | __IAR_FT void __TZ_set_PSP_NS(uint32_t value) |
Pawel Zarembski |
0:01f31e923fe2 | 691 | { |
Pawel Zarembski |
0:01f31e923fe2 | 692 | __asm volatile("MSR PSP_NS,%0" :: "r" (value)); |
Pawel Zarembski |
0:01f31e923fe2 | 693 | } |
Pawel Zarembski |
0:01f31e923fe2 | 694 | |
Pawel Zarembski |
0:01f31e923fe2 | 695 | __IAR_FT uint32_t __TZ_get_MSP_NS(void) |
Pawel Zarembski |
0:01f31e923fe2 | 696 | { |
Pawel Zarembski |
0:01f31e923fe2 | 697 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 698 | __asm volatile("MRS %0,MSP_NS" : "=r" (res)); |
Pawel Zarembski |
0:01f31e923fe2 | 699 | return res; |
Pawel Zarembski |
0:01f31e923fe2 | 700 | } |
Pawel Zarembski |
0:01f31e923fe2 | 701 | |
Pawel Zarembski |
0:01f31e923fe2 | 702 | __IAR_FT void __TZ_set_MSP_NS(uint32_t value) |
Pawel Zarembski |
0:01f31e923fe2 | 703 | { |
Pawel Zarembski |
0:01f31e923fe2 | 704 | __asm volatile("MSR MSP_NS,%0" :: "r" (value)); |
Pawel Zarembski |
0:01f31e923fe2 | 705 | } |
Pawel Zarembski |
0:01f31e923fe2 | 706 | |
Pawel Zarembski |
0:01f31e923fe2 | 707 | __IAR_FT uint32_t __TZ_get_SP_NS(void) |
Pawel Zarembski |
0:01f31e923fe2 | 708 | { |
Pawel Zarembski |
0:01f31e923fe2 | 709 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 710 | __asm volatile("MRS %0,SP_NS" : "=r" (res)); |
Pawel Zarembski |
0:01f31e923fe2 | 711 | return res; |
Pawel Zarembski |
0:01f31e923fe2 | 712 | } |
Pawel Zarembski |
0:01f31e923fe2 | 713 | __IAR_FT void __TZ_set_SP_NS(uint32_t value) |
Pawel Zarembski |
0:01f31e923fe2 | 714 | { |
Pawel Zarembski |
0:01f31e923fe2 | 715 | __asm volatile("MSR SP_NS,%0" :: "r" (value)); |
Pawel Zarembski |
0:01f31e923fe2 | 716 | } |
Pawel Zarembski |
0:01f31e923fe2 | 717 | |
Pawel Zarembski |
0:01f31e923fe2 | 718 | __IAR_FT uint32_t __TZ_get_PRIMASK_NS(void) |
Pawel Zarembski |
0:01f31e923fe2 | 719 | { |
Pawel Zarembski |
0:01f31e923fe2 | 720 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 721 | __asm volatile("MRS %0,PRIMASK_NS" : "=r" (res)); |
Pawel Zarembski |
0:01f31e923fe2 | 722 | return res; |
Pawel Zarembski |
0:01f31e923fe2 | 723 | } |
Pawel Zarembski |
0:01f31e923fe2 | 724 | |
Pawel Zarembski |
0:01f31e923fe2 | 725 | __IAR_FT void __TZ_set_PRIMASK_NS(uint32_t value) |
Pawel Zarembski |
0:01f31e923fe2 | 726 | { |
Pawel Zarembski |
0:01f31e923fe2 | 727 | __asm volatile("MSR PRIMASK_NS,%0" :: "r" (value)); |
Pawel Zarembski |
0:01f31e923fe2 | 728 | } |
Pawel Zarembski |
0:01f31e923fe2 | 729 | |
Pawel Zarembski |
0:01f31e923fe2 | 730 | __IAR_FT uint32_t __TZ_get_BASEPRI_NS(void) |
Pawel Zarembski |
0:01f31e923fe2 | 731 | { |
Pawel Zarembski |
0:01f31e923fe2 | 732 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 733 | __asm volatile("MRS %0,BASEPRI_NS" : "=r" (res)); |
Pawel Zarembski |
0:01f31e923fe2 | 734 | return res; |
Pawel Zarembski |
0:01f31e923fe2 | 735 | } |
Pawel Zarembski |
0:01f31e923fe2 | 736 | |
Pawel Zarembski |
0:01f31e923fe2 | 737 | __IAR_FT void __TZ_set_BASEPRI_NS(uint32_t value) |
Pawel Zarembski |
0:01f31e923fe2 | 738 | { |
Pawel Zarembski |
0:01f31e923fe2 | 739 | __asm volatile("MSR BASEPRI_NS,%0" :: "r" (value)); |
Pawel Zarembski |
0:01f31e923fe2 | 740 | } |
Pawel Zarembski |
0:01f31e923fe2 | 741 | |
Pawel Zarembski |
0:01f31e923fe2 | 742 | __IAR_FT uint32_t __TZ_get_FAULTMASK_NS(void) |
Pawel Zarembski |
0:01f31e923fe2 | 743 | { |
Pawel Zarembski |
0:01f31e923fe2 | 744 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 745 | __asm volatile("MRS %0,FAULTMASK_NS" : "=r" (res)); |
Pawel Zarembski |
0:01f31e923fe2 | 746 | return res; |
Pawel Zarembski |
0:01f31e923fe2 | 747 | } |
Pawel Zarembski |
0:01f31e923fe2 | 748 | |
Pawel Zarembski |
0:01f31e923fe2 | 749 | __IAR_FT void __TZ_set_FAULTMASK_NS(uint32_t value) |
Pawel Zarembski |
0:01f31e923fe2 | 750 | { |
Pawel Zarembski |
0:01f31e923fe2 | 751 | __asm volatile("MSR FAULTMASK_NS,%0" :: "r" (value)); |
Pawel Zarembski |
0:01f31e923fe2 | 752 | } |
Pawel Zarembski |
0:01f31e923fe2 | 753 | |
Pawel Zarembski |
0:01f31e923fe2 | 754 | __IAR_FT uint32_t __TZ_get_PSPLIM_NS(void) |
Pawel Zarembski |
0:01f31e923fe2 | 755 | { |
Pawel Zarembski |
0:01f31e923fe2 | 756 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 757 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
Pawel Zarembski |
0:01f31e923fe2 | 758 | (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) |
Pawel Zarembski |
0:01f31e923fe2 | 759 | // without main extensions, the non-secure PSPLIM is RAZ/WI |
Pawel Zarembski |
0:01f31e923fe2 | 760 | res = 0U; |
Pawel Zarembski |
0:01f31e923fe2 | 761 | #else |
Pawel Zarembski |
0:01f31e923fe2 | 762 | __asm volatile("MRS %0,PSPLIM_NS" : "=r" (res)); |
Pawel Zarembski |
0:01f31e923fe2 | 763 | #endif |
Pawel Zarembski |
0:01f31e923fe2 | 764 | return res; |
Pawel Zarembski |
0:01f31e923fe2 | 765 | } |
Pawel Zarembski |
0:01f31e923fe2 | 766 | |
Pawel Zarembski |
0:01f31e923fe2 | 767 | __IAR_FT void __TZ_set_PSPLIM_NS(uint32_t value) |
Pawel Zarembski |
0:01f31e923fe2 | 768 | { |
Pawel Zarembski |
0:01f31e923fe2 | 769 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
Pawel Zarembski |
0:01f31e923fe2 | 770 | (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) |
Pawel Zarembski |
0:01f31e923fe2 | 771 | // without main extensions, the non-secure PSPLIM is RAZ/WI |
Pawel Zarembski |
0:01f31e923fe2 | 772 | (void)value; |
Pawel Zarembski |
0:01f31e923fe2 | 773 | #else |
Pawel Zarembski |
0:01f31e923fe2 | 774 | __asm volatile("MSR PSPLIM_NS,%0" :: "r" (value)); |
Pawel Zarembski |
0:01f31e923fe2 | 775 | #endif |
Pawel Zarembski |
0:01f31e923fe2 | 776 | } |
Pawel Zarembski |
0:01f31e923fe2 | 777 | |
Pawel Zarembski |
0:01f31e923fe2 | 778 | __IAR_FT uint32_t __TZ_get_MSPLIM_NS(void) |
Pawel Zarembski |
0:01f31e923fe2 | 779 | { |
Pawel Zarembski |
0:01f31e923fe2 | 780 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 781 | __asm volatile("MRS %0,MSPLIM_NS" : "=r" (res)); |
Pawel Zarembski |
0:01f31e923fe2 | 782 | return res; |
Pawel Zarembski |
0:01f31e923fe2 | 783 | } |
Pawel Zarembski |
0:01f31e923fe2 | 784 | |
Pawel Zarembski |
0:01f31e923fe2 | 785 | __IAR_FT void __TZ_set_MSPLIM_NS(uint32_t value) |
Pawel Zarembski |
0:01f31e923fe2 | 786 | { |
Pawel Zarembski |
0:01f31e923fe2 | 787 | __asm volatile("MSR MSPLIM_NS,%0" :: "r" (value)); |
Pawel Zarembski |
0:01f31e923fe2 | 788 | } |
Pawel Zarembski |
0:01f31e923fe2 | 789 | |
Pawel Zarembski |
0:01f31e923fe2 | 790 | #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */ |
Pawel Zarembski |
0:01f31e923fe2 | 791 | |
Pawel Zarembski |
0:01f31e923fe2 | 792 | #endif /* __ICCARM_INTRINSICS_VERSION__ == 2 */ |
Pawel Zarembski |
0:01f31e923fe2 | 793 | |
Pawel Zarembski |
0:01f31e923fe2 | 794 | #define __BKPT(value) __asm volatile ("BKPT %0" : : "i"(value)) |
Pawel Zarembski |
0:01f31e923fe2 | 795 | |
Pawel Zarembski |
0:01f31e923fe2 | 796 | #if __IAR_M0_FAMILY |
Pawel Zarembski |
0:01f31e923fe2 | 797 | __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat) |
Pawel Zarembski |
0:01f31e923fe2 | 798 | { |
Pawel Zarembski |
0:01f31e923fe2 | 799 | if ((sat >= 1U) && (sat <= 32U)) |
Pawel Zarembski |
0:01f31e923fe2 | 800 | { |
Pawel Zarembski |
0:01f31e923fe2 | 801 | const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); |
Pawel Zarembski |
0:01f31e923fe2 | 802 | const int32_t min = -1 - max ; |
Pawel Zarembski |
0:01f31e923fe2 | 803 | if (val > max) |
Pawel Zarembski |
0:01f31e923fe2 | 804 | { |
Pawel Zarembski |
0:01f31e923fe2 | 805 | return max; |
Pawel Zarembski |
0:01f31e923fe2 | 806 | } |
Pawel Zarembski |
0:01f31e923fe2 | 807 | else if (val < min) |
Pawel Zarembski |
0:01f31e923fe2 | 808 | { |
Pawel Zarembski |
0:01f31e923fe2 | 809 | return min; |
Pawel Zarembski |
0:01f31e923fe2 | 810 | } |
Pawel Zarembski |
0:01f31e923fe2 | 811 | } |
Pawel Zarembski |
0:01f31e923fe2 | 812 | return val; |
Pawel Zarembski |
0:01f31e923fe2 | 813 | } |
Pawel Zarembski |
0:01f31e923fe2 | 814 | |
Pawel Zarembski |
0:01f31e923fe2 | 815 | __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat) |
Pawel Zarembski |
0:01f31e923fe2 | 816 | { |
Pawel Zarembski |
0:01f31e923fe2 | 817 | if (sat <= 31U) |
Pawel Zarembski |
0:01f31e923fe2 | 818 | { |
Pawel Zarembski |
0:01f31e923fe2 | 819 | const uint32_t max = ((1U << sat) - 1U); |
Pawel Zarembski |
0:01f31e923fe2 | 820 | if (val > (int32_t)max) |
Pawel Zarembski |
0:01f31e923fe2 | 821 | { |
Pawel Zarembski |
0:01f31e923fe2 | 822 | return max; |
Pawel Zarembski |
0:01f31e923fe2 | 823 | } |
Pawel Zarembski |
0:01f31e923fe2 | 824 | else if (val < 0) |
Pawel Zarembski |
0:01f31e923fe2 | 825 | { |
Pawel Zarembski |
0:01f31e923fe2 | 826 | return 0U; |
Pawel Zarembski |
0:01f31e923fe2 | 827 | } |
Pawel Zarembski |
0:01f31e923fe2 | 828 | } |
Pawel Zarembski |
0:01f31e923fe2 | 829 | return (uint32_t)val; |
Pawel Zarembski |
0:01f31e923fe2 | 830 | } |
Pawel Zarembski |
0:01f31e923fe2 | 831 | #endif |
Pawel Zarembski |
0:01f31e923fe2 | 832 | |
Pawel Zarembski |
0:01f31e923fe2 | 833 | #if (__CORTEX_M >= 0x03) /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */ |
Pawel Zarembski |
0:01f31e923fe2 | 834 | |
Pawel Zarembski |
0:01f31e923fe2 | 835 | __IAR_FT uint8_t __LDRBT(volatile uint8_t *addr) |
Pawel Zarembski |
0:01f31e923fe2 | 836 | { |
Pawel Zarembski |
0:01f31e923fe2 | 837 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 838 | __ASM volatile ("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory"); |
Pawel Zarembski |
0:01f31e923fe2 | 839 | return ((uint8_t)res); |
Pawel Zarembski |
0:01f31e923fe2 | 840 | } |
Pawel Zarembski |
0:01f31e923fe2 | 841 | |
Pawel Zarembski |
0:01f31e923fe2 | 842 | __IAR_FT uint16_t __LDRHT(volatile uint16_t *addr) |
Pawel Zarembski |
0:01f31e923fe2 | 843 | { |
Pawel Zarembski |
0:01f31e923fe2 | 844 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 845 | __ASM volatile ("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory"); |
Pawel Zarembski |
0:01f31e923fe2 | 846 | return ((uint16_t)res); |
Pawel Zarembski |
0:01f31e923fe2 | 847 | } |
Pawel Zarembski |
0:01f31e923fe2 | 848 | |
Pawel Zarembski |
0:01f31e923fe2 | 849 | __IAR_FT uint32_t __LDRT(volatile uint32_t *addr) |
Pawel Zarembski |
0:01f31e923fe2 | 850 | { |
Pawel Zarembski |
0:01f31e923fe2 | 851 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 852 | __ASM volatile ("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory"); |
Pawel Zarembski |
0:01f31e923fe2 | 853 | return res; |
Pawel Zarembski |
0:01f31e923fe2 | 854 | } |
Pawel Zarembski |
0:01f31e923fe2 | 855 | |
Pawel Zarembski |
0:01f31e923fe2 | 856 | __IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr) |
Pawel Zarembski |
0:01f31e923fe2 | 857 | { |
Pawel Zarembski |
0:01f31e923fe2 | 858 | __ASM volatile ("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory"); |
Pawel Zarembski |
0:01f31e923fe2 | 859 | } |
Pawel Zarembski |
0:01f31e923fe2 | 860 | |
Pawel Zarembski |
0:01f31e923fe2 | 861 | __IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr) |
Pawel Zarembski |
0:01f31e923fe2 | 862 | { |
Pawel Zarembski |
0:01f31e923fe2 | 863 | __ASM volatile ("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory"); |
Pawel Zarembski |
0:01f31e923fe2 | 864 | } |
Pawel Zarembski |
0:01f31e923fe2 | 865 | |
Pawel Zarembski |
0:01f31e923fe2 | 866 | __IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr) |
Pawel Zarembski |
0:01f31e923fe2 | 867 | { |
Pawel Zarembski |
0:01f31e923fe2 | 868 | __ASM volatile ("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory"); |
Pawel Zarembski |
0:01f31e923fe2 | 869 | } |
Pawel Zarembski |
0:01f31e923fe2 | 870 | |
Pawel Zarembski |
0:01f31e923fe2 | 871 | #endif /* (__CORTEX_M >= 0x03) */ |
Pawel Zarembski |
0:01f31e923fe2 | 872 | |
Pawel Zarembski |
0:01f31e923fe2 | 873 | #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ |
Pawel Zarembski |
0:01f31e923fe2 | 874 | (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) |
Pawel Zarembski |
0:01f31e923fe2 | 875 | |
Pawel Zarembski |
0:01f31e923fe2 | 876 | |
Pawel Zarembski |
0:01f31e923fe2 | 877 | __IAR_FT uint8_t __LDAB(volatile uint8_t *ptr) |
Pawel Zarembski |
0:01f31e923fe2 | 878 | { |
Pawel Zarembski |
0:01f31e923fe2 | 879 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 880 | __ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); |
Pawel Zarembski |
0:01f31e923fe2 | 881 | return ((uint8_t)res); |
Pawel Zarembski |
0:01f31e923fe2 | 882 | } |
Pawel Zarembski |
0:01f31e923fe2 | 883 | |
Pawel Zarembski |
0:01f31e923fe2 | 884 | __IAR_FT uint16_t __LDAH(volatile uint16_t *ptr) |
Pawel Zarembski |
0:01f31e923fe2 | 885 | { |
Pawel Zarembski |
0:01f31e923fe2 | 886 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 887 | __ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); |
Pawel Zarembski |
0:01f31e923fe2 | 888 | return ((uint16_t)res); |
Pawel Zarembski |
0:01f31e923fe2 | 889 | } |
Pawel Zarembski |
0:01f31e923fe2 | 890 | |
Pawel Zarembski |
0:01f31e923fe2 | 891 | __IAR_FT uint32_t __LDA(volatile uint32_t *ptr) |
Pawel Zarembski |
0:01f31e923fe2 | 892 | { |
Pawel Zarembski |
0:01f31e923fe2 | 893 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 894 | __ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); |
Pawel Zarembski |
0:01f31e923fe2 | 895 | return res; |
Pawel Zarembski |
0:01f31e923fe2 | 896 | } |
Pawel Zarembski |
0:01f31e923fe2 | 897 | |
Pawel Zarembski |
0:01f31e923fe2 | 898 | __IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr) |
Pawel Zarembski |
0:01f31e923fe2 | 899 | { |
Pawel Zarembski |
0:01f31e923fe2 | 900 | __ASM volatile ("STLB %1, [%0]" :: "r" (ptr), "r" (value) : "memory"); |
Pawel Zarembski |
0:01f31e923fe2 | 901 | } |
Pawel Zarembski |
0:01f31e923fe2 | 902 | |
Pawel Zarembski |
0:01f31e923fe2 | 903 | __IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr) |
Pawel Zarembski |
0:01f31e923fe2 | 904 | { |
Pawel Zarembski |
0:01f31e923fe2 | 905 | __ASM volatile ("STLH %1, [%0]" :: "r" (ptr), "r" (value) : "memory"); |
Pawel Zarembski |
0:01f31e923fe2 | 906 | } |
Pawel Zarembski |
0:01f31e923fe2 | 907 | |
Pawel Zarembski |
0:01f31e923fe2 | 908 | __IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr) |
Pawel Zarembski |
0:01f31e923fe2 | 909 | { |
Pawel Zarembski |
0:01f31e923fe2 | 910 | __ASM volatile ("STL %1, [%0]" :: "r" (ptr), "r" (value) : "memory"); |
Pawel Zarembski |
0:01f31e923fe2 | 911 | } |
Pawel Zarembski |
0:01f31e923fe2 | 912 | |
Pawel Zarembski |
0:01f31e923fe2 | 913 | __IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr) |
Pawel Zarembski |
0:01f31e923fe2 | 914 | { |
Pawel Zarembski |
0:01f31e923fe2 | 915 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 916 | __ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); |
Pawel Zarembski |
0:01f31e923fe2 | 917 | return ((uint8_t)res); |
Pawel Zarembski |
0:01f31e923fe2 | 918 | } |
Pawel Zarembski |
0:01f31e923fe2 | 919 | |
Pawel Zarembski |
0:01f31e923fe2 | 920 | __IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr) |
Pawel Zarembski |
0:01f31e923fe2 | 921 | { |
Pawel Zarembski |
0:01f31e923fe2 | 922 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 923 | __ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); |
Pawel Zarembski |
0:01f31e923fe2 | 924 | return ((uint16_t)res); |
Pawel Zarembski |
0:01f31e923fe2 | 925 | } |
Pawel Zarembski |
0:01f31e923fe2 | 926 | |
Pawel Zarembski |
0:01f31e923fe2 | 927 | __IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr) |
Pawel Zarembski |
0:01f31e923fe2 | 928 | { |
Pawel Zarembski |
0:01f31e923fe2 | 929 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 930 | __ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); |
Pawel Zarembski |
0:01f31e923fe2 | 931 | return res; |
Pawel Zarembski |
0:01f31e923fe2 | 932 | } |
Pawel Zarembski |
0:01f31e923fe2 | 933 | |
Pawel Zarembski |
0:01f31e923fe2 | 934 | __IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr) |
Pawel Zarembski |
0:01f31e923fe2 | 935 | { |
Pawel Zarembski |
0:01f31e923fe2 | 936 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 937 | __ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory"); |
Pawel Zarembski |
0:01f31e923fe2 | 938 | return res; |
Pawel Zarembski |
0:01f31e923fe2 | 939 | } |
Pawel Zarembski |
0:01f31e923fe2 | 940 | |
Pawel Zarembski |
0:01f31e923fe2 | 941 | __IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr) |
Pawel Zarembski |
0:01f31e923fe2 | 942 | { |
Pawel Zarembski |
0:01f31e923fe2 | 943 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 944 | __ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory"); |
Pawel Zarembski |
0:01f31e923fe2 | 945 | return res; |
Pawel Zarembski |
0:01f31e923fe2 | 946 | } |
Pawel Zarembski |
0:01f31e923fe2 | 947 | |
Pawel Zarembski |
0:01f31e923fe2 | 948 | __IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr) |
Pawel Zarembski |
0:01f31e923fe2 | 949 | { |
Pawel Zarembski |
0:01f31e923fe2 | 950 | uint32_t res; |
Pawel Zarembski |
0:01f31e923fe2 | 951 | __ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory"); |
Pawel Zarembski |
0:01f31e923fe2 | 952 | return res; |
Pawel Zarembski |
0:01f31e923fe2 | 953 | } |
Pawel Zarembski |
0:01f31e923fe2 | 954 | |
Pawel Zarembski |
0:01f31e923fe2 | 955 | #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */ |
Pawel Zarembski |
0:01f31e923fe2 | 956 | |
Pawel Zarembski |
0:01f31e923fe2 | 957 | #undef __IAR_FT |
Pawel Zarembski |
0:01f31e923fe2 | 958 | #undef __IAR_M0_FAMILY |
Pawel Zarembski |
0:01f31e923fe2 | 959 | #undef __ICCARM_V8 |
Pawel Zarembski |
0:01f31e923fe2 | 960 | |
Pawel Zarembski |
0:01f31e923fe2 | 961 | #pragma diag_default=Pe940 |
Pawel Zarembski |
0:01f31e923fe2 | 962 | #pragma diag_default=Pe177 |
Pawel Zarembski |
0:01f31e923fe2 | 963 | |
Pawel Zarembski |
0:01f31e923fe2 | 964 | #endif /* __CMSIS_ICCARM_H__ */ |