Arrow / Mbed OS DAPLink Reset

Repostiory containing DAPLink source code with Reset Pin workaround for HANI_IOT board.

Upstream: https://github.com/ARMmbed/DAPLink

source/cmsis-core/cmsis_gcc.h@0:01f31e923fe2, 2020-04-07 (annotated)

Committer:
Pawel Zarembski
Date:
Tue Apr 07 12:55:42 2020 +0200
Revision:
0:01f31e923fe2
hani: DAPLink with reset workaround

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Pawel Zarembski 0:01f31e923fe2 1 /**************************************************************************//**
Pawel Zarembski 0:01f31e923fe2 2 * @file cmsis_gcc.h
Pawel Zarembski 0:01f31e923fe2 3 * @brief CMSIS compiler GCC header file
Pawel Zarembski 0:01f31e923fe2 4 * @version V5.2.1
Pawel Zarembski 0:01f31e923fe2 5 * @date 30. July 2019
Pawel Zarembski 0:01f31e923fe2 6 ******************************************************************************/
Pawel Zarembski 0:01f31e923fe2 7 /*
Pawel Zarembski 0:01f31e923fe2 8 * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
Pawel Zarembski 0:01f31e923fe2 9 *
Pawel Zarembski 0:01f31e923fe2 10 * SPDX-License-Identifier: Apache-2.0
Pawel Zarembski 0:01f31e923fe2 11 *
Pawel Zarembski 0:01f31e923fe2 12 * Licensed under the Apache License, Version 2.0 (the License); you may
Pawel Zarembski 0:01f31e923fe2 13 * not use this file except in compliance with the License.
Pawel Zarembski 0:01f31e923fe2 14 * You may obtain a copy of the License at
Pawel Zarembski 0:01f31e923fe2 15 *
Pawel Zarembski 0:01f31e923fe2 16 * www.apache.org/licenses/LICENSE-2.0
Pawel Zarembski 0:01f31e923fe2 17 *
Pawel Zarembski 0:01f31e923fe2 18 * Unless required by applicable law or agreed to in writing, software
Pawel Zarembski 0:01f31e923fe2 19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
Pawel Zarembski 0:01f31e923fe2 20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
Pawel Zarembski 0:01f31e923fe2 21 * See the License for the specific language governing permissions and
Pawel Zarembski 0:01f31e923fe2 22 * limitations under the License.
Pawel Zarembski 0:01f31e923fe2 23 */
Pawel Zarembski 0:01f31e923fe2 24
Pawel Zarembski 0:01f31e923fe2 25 #ifndef __CMSIS_GCC_H
Pawel Zarembski 0:01f31e923fe2 26 #define __CMSIS_GCC_H
Pawel Zarembski 0:01f31e923fe2 27
Pawel Zarembski 0:01f31e923fe2 28 /* ignore some GCC warnings */
Pawel Zarembski 0:01f31e923fe2 29 #pragma GCC diagnostic push
Pawel Zarembski 0:01f31e923fe2 30 #pragma GCC diagnostic ignored "-Wsign-conversion"
Pawel Zarembski 0:01f31e923fe2 31 #pragma GCC diagnostic ignored "-Wconversion"
Pawel Zarembski 0:01f31e923fe2 32 #pragma GCC diagnostic ignored "-Wunused-parameter"
Pawel Zarembski 0:01f31e923fe2 33
Pawel Zarembski 0:01f31e923fe2 34 /* Fallback for __has_builtin */
Pawel Zarembski 0:01f31e923fe2 35 #ifndef __has_builtin
Pawel Zarembski 0:01f31e923fe2 36 #define __has_builtin(x) (0)
Pawel Zarembski 0:01f31e923fe2 37 #endif
Pawel Zarembski 0:01f31e923fe2 38
Pawel Zarembski 0:01f31e923fe2 39 /* CMSIS compiler specific defines */
Pawel Zarembski 0:01f31e923fe2 40 #ifndef __ASM
Pawel Zarembski 0:01f31e923fe2 41 #define __ASM __asm
Pawel Zarembski 0:01f31e923fe2 42 #endif
Pawel Zarembski 0:01f31e923fe2 43 #ifndef __INLINE
Pawel Zarembski 0:01f31e923fe2 44 #define __INLINE inline
Pawel Zarembski 0:01f31e923fe2 45 #endif
Pawel Zarembski 0:01f31e923fe2 46 #ifndef __STATIC_INLINE
Pawel Zarembski 0:01f31e923fe2 47 #define __STATIC_INLINE static inline
Pawel Zarembski 0:01f31e923fe2 48 #endif
Pawel Zarembski 0:01f31e923fe2 49 #ifndef __STATIC_FORCEINLINE
Pawel Zarembski 0:01f31e923fe2 50 #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
Pawel Zarembski 0:01f31e923fe2 51 #endif
Pawel Zarembski 0:01f31e923fe2 52 #ifndef __NO_RETURN
Pawel Zarembski 0:01f31e923fe2 53 #define __NO_RETURN __attribute__((__noreturn__))
Pawel Zarembski 0:01f31e923fe2 54 #endif
Pawel Zarembski 0:01f31e923fe2 55 #ifndef __USED
Pawel Zarembski 0:01f31e923fe2 56 #define __USED __attribute__((used))
Pawel Zarembski 0:01f31e923fe2 57 #endif
Pawel Zarembski 0:01f31e923fe2 58 #ifndef __WEAK
Pawel Zarembski 0:01f31e923fe2 59 #define __WEAK __attribute__((weak))
Pawel Zarembski 0:01f31e923fe2 60 #endif
Pawel Zarembski 0:01f31e923fe2 61 #ifndef __PACKED
Pawel Zarembski 0:01f31e923fe2 62 #define __PACKED __attribute__((packed, aligned(1)))
Pawel Zarembski 0:01f31e923fe2 63 #endif
Pawel Zarembski 0:01f31e923fe2 64 #ifndef __PACKED_STRUCT
Pawel Zarembski 0:01f31e923fe2 65 #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
Pawel Zarembski 0:01f31e923fe2 66 #endif
Pawel Zarembski 0:01f31e923fe2 67 #ifndef __PACKED_UNION
Pawel Zarembski 0:01f31e923fe2 68 #define __PACKED_UNION union __attribute__((packed, aligned(1)))
Pawel Zarembski 0:01f31e923fe2 69 #endif
Pawel Zarembski 0:01f31e923fe2 70 #ifndef __UNALIGNED_UINT32 /* deprecated */
Pawel Zarembski 0:01f31e923fe2 71 #pragma GCC diagnostic push
Pawel Zarembski 0:01f31e923fe2 72 #pragma GCC diagnostic ignored "-Wpacked"
Pawel Zarembski 0:01f31e923fe2 73 #pragma GCC diagnostic ignored "-Wattributes"
Pawel Zarembski 0:01f31e923fe2 74 struct __attribute__((packed)) T_UINT32 { uint32_t v; };
Pawel Zarembski 0:01f31e923fe2 75 #pragma GCC diagnostic pop
Pawel Zarembski 0:01f31e923fe2 76 #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
Pawel Zarembski 0:01f31e923fe2 77 #endif
Pawel Zarembski 0:01f31e923fe2 78 #ifndef __UNALIGNED_UINT16_WRITE
Pawel Zarembski 0:01f31e923fe2 79 #pragma GCC diagnostic push
Pawel Zarembski 0:01f31e923fe2 80 #pragma GCC diagnostic ignored "-Wpacked"
Pawel Zarembski 0:01f31e923fe2 81 #pragma GCC diagnostic ignored "-Wattributes"
Pawel Zarembski 0:01f31e923fe2 82 __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
Pawel Zarembski 0:01f31e923fe2 83 #pragma GCC diagnostic pop
Pawel Zarembski 0:01f31e923fe2 84 #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
Pawel Zarembski 0:01f31e923fe2 85 #endif
Pawel Zarembski 0:01f31e923fe2 86 #ifndef __UNALIGNED_UINT16_READ
Pawel Zarembski 0:01f31e923fe2 87 #pragma GCC diagnostic push
Pawel Zarembski 0:01f31e923fe2 88 #pragma GCC diagnostic ignored "-Wpacked"
Pawel Zarembski 0:01f31e923fe2 89 #pragma GCC diagnostic ignored "-Wattributes"
Pawel Zarembski 0:01f31e923fe2 90 __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
Pawel Zarembski 0:01f31e923fe2 91 #pragma GCC diagnostic pop
Pawel Zarembski 0:01f31e923fe2 92 #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
Pawel Zarembski 0:01f31e923fe2 93 #endif
Pawel Zarembski 0:01f31e923fe2 94 #ifndef __UNALIGNED_UINT32_WRITE
Pawel Zarembski 0:01f31e923fe2 95 #pragma GCC diagnostic push
Pawel Zarembski 0:01f31e923fe2 96 #pragma GCC diagnostic ignored "-Wpacked"
Pawel Zarembski 0:01f31e923fe2 97 #pragma GCC diagnostic ignored "-Wattributes"
Pawel Zarembski 0:01f31e923fe2 98 __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
Pawel Zarembski 0:01f31e923fe2 99 #pragma GCC diagnostic pop
Pawel Zarembski 0:01f31e923fe2 100 #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
Pawel Zarembski 0:01f31e923fe2 101 #endif
Pawel Zarembski 0:01f31e923fe2 102 #ifndef __UNALIGNED_UINT32_READ
Pawel Zarembski 0:01f31e923fe2 103 #pragma GCC diagnostic push
Pawel Zarembski 0:01f31e923fe2 104 #pragma GCC diagnostic ignored "-Wpacked"
Pawel Zarembski 0:01f31e923fe2 105 #pragma GCC diagnostic ignored "-Wattributes"
Pawel Zarembski 0:01f31e923fe2 106 __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
Pawel Zarembski 0:01f31e923fe2 107 #pragma GCC diagnostic pop
Pawel Zarembski 0:01f31e923fe2 108 #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
Pawel Zarembski 0:01f31e923fe2 109 #endif
Pawel Zarembski 0:01f31e923fe2 110 #ifndef __ALIGNED
Pawel Zarembski 0:01f31e923fe2 111 #define __ALIGNED(x) __attribute__((aligned(x)))
Pawel Zarembski 0:01f31e923fe2 112 #endif
Pawel Zarembski 0:01f31e923fe2 113 #ifndef __RESTRICT
Pawel Zarembski 0:01f31e923fe2 114 #define __RESTRICT __restrict
Pawel Zarembski 0:01f31e923fe2 115 #endif
Pawel Zarembski 0:01f31e923fe2 116 #ifndef __COMPILER_BARRIER
Pawel Zarembski 0:01f31e923fe2 117 #define __COMPILER_BARRIER() __ASM volatile("":::"memory")
Pawel Zarembski 0:01f31e923fe2 118 #endif
Pawel Zarembski 0:01f31e923fe2 119
Pawel Zarembski 0:01f31e923fe2 120 /* ######################### Startup and Lowlevel Init ######################## */
Pawel Zarembski 0:01f31e923fe2 121
Pawel Zarembski 0:01f31e923fe2 122 #ifndef __PROGRAM_START
Pawel Zarembski 0:01f31e923fe2 123
Pawel Zarembski 0:01f31e923fe2 124 /**
Pawel Zarembski 0:01f31e923fe2 125 \brief Initializes data and bss sections
Pawel Zarembski 0:01f31e923fe2 126 \details This default implementations initialized all data and additional bss
Pawel Zarembski 0:01f31e923fe2 127 sections relying on .copy.table and .zero.table specified properly
Pawel Zarembski 0:01f31e923fe2 128 in the used linker script.
Pawel Zarembski 0:01f31e923fe2 129
Pawel Zarembski 0:01f31e923fe2 130 */
Pawel Zarembski 0:01f31e923fe2 131 __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
Pawel Zarembski 0:01f31e923fe2 132 {
Pawel Zarembski 0:01f31e923fe2 133 extern void _start(void) __NO_RETURN;
Pawel Zarembski 0:01f31e923fe2 134
Pawel Zarembski 0:01f31e923fe2 135 typedef struct {
Pawel Zarembski 0:01f31e923fe2 136 uint32_t const* src;
Pawel Zarembski 0:01f31e923fe2 137 uint32_t* dest;
Pawel Zarembski 0:01f31e923fe2 138 uint32_t wlen;
Pawel Zarembski 0:01f31e923fe2 139 } __copy_table_t;
Pawel Zarembski 0:01f31e923fe2 140
Pawel Zarembski 0:01f31e923fe2 141 typedef struct {
Pawel Zarembski 0:01f31e923fe2 142 uint32_t* dest;
Pawel Zarembski 0:01f31e923fe2 143 uint32_t wlen;
Pawel Zarembski 0:01f31e923fe2 144 } __zero_table_t;
Pawel Zarembski 0:01f31e923fe2 145
Pawel Zarembski 0:01f31e923fe2 146 extern const __copy_table_t __copy_table_start__;
Pawel Zarembski 0:01f31e923fe2 147 extern const __copy_table_t __copy_table_end__;
Pawel Zarembski 0:01f31e923fe2 148 extern const __zero_table_t __zero_table_start__;
Pawel Zarembski 0:01f31e923fe2 149 extern const __zero_table_t __zero_table_end__;
Pawel Zarembski 0:01f31e923fe2 150
Pawel Zarembski 0:01f31e923fe2 151 for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable) {
Pawel Zarembski 0:01f31e923fe2 152 for(uint32_t i=0u; i<pTable->wlen; ++i) {
Pawel Zarembski 0:01f31e923fe2 153 pTable->dest[i] = pTable->src[i];
Pawel Zarembski 0:01f31e923fe2 154 }
Pawel Zarembski 0:01f31e923fe2 155 }
Pawel Zarembski 0:01f31e923fe2 156
Pawel Zarembski 0:01f31e923fe2 157 for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable) {
Pawel Zarembski 0:01f31e923fe2 158 for(uint32_t i=0u; i<pTable->wlen; ++i) {
Pawel Zarembski 0:01f31e923fe2 159 pTable->dest[i] = 0u;
Pawel Zarembski 0:01f31e923fe2 160 }
Pawel Zarembski 0:01f31e923fe2 161 }
Pawel Zarembski 0:01f31e923fe2 162
Pawel Zarembski 0:01f31e923fe2 163 _start();
Pawel Zarembski 0:01f31e923fe2 164 }
Pawel Zarembski 0:01f31e923fe2 165
Pawel Zarembski 0:01f31e923fe2 166 #define __PROGRAM_START __cmsis_start
Pawel Zarembski 0:01f31e923fe2 167 #endif
Pawel Zarembski 0:01f31e923fe2 168
Pawel Zarembski 0:01f31e923fe2 169 #ifndef __INITIAL_SP
Pawel Zarembski 0:01f31e923fe2 170 #define __INITIAL_SP __StackTop
Pawel Zarembski 0:01f31e923fe2 171 #endif
Pawel Zarembski 0:01f31e923fe2 172
Pawel Zarembski 0:01f31e923fe2 173 #ifndef __STACK_LIMIT
Pawel Zarembski 0:01f31e923fe2 174 #define __STACK_LIMIT __StackLimit
Pawel Zarembski 0:01f31e923fe2 175 #endif
Pawel Zarembski 0:01f31e923fe2 176
Pawel Zarembski 0:01f31e923fe2 177 #ifndef __VECTOR_TABLE
Pawel Zarembski 0:01f31e923fe2 178 #define __VECTOR_TABLE __Vectors
Pawel Zarembski 0:01f31e923fe2 179 #endif
Pawel Zarembski 0:01f31e923fe2 180
Pawel Zarembski 0:01f31e923fe2 181 #ifndef __VECTOR_TABLE_ATTRIBUTE
Pawel Zarembski 0:01f31e923fe2 182 #define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section(".vectors")))
Pawel Zarembski 0:01f31e923fe2 183 #endif
Pawel Zarembski 0:01f31e923fe2 184
Pawel Zarembski 0:01f31e923fe2 185 /* ########################### Core Function Access ########################### */
Pawel Zarembski 0:01f31e923fe2 186 /** \ingroup CMSIS_Core_FunctionInterface
Pawel Zarembski 0:01f31e923fe2 187 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
Pawel Zarembski 0:01f31e923fe2 188 @{
Pawel Zarembski 0:01f31e923fe2 189 */
Pawel Zarembski 0:01f31e923fe2 190
Pawel Zarembski 0:01f31e923fe2 191 /**
Pawel Zarembski 0:01f31e923fe2 192 \brief Enable IRQ Interrupts
Pawel Zarembski 0:01f31e923fe2 193 \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
Pawel Zarembski 0:01f31e923fe2 194 Can only be executed in Privileged modes.
Pawel Zarembski 0:01f31e923fe2 195 */
Pawel Zarembski 0:01f31e923fe2 196 __STATIC_FORCEINLINE void __enable_irq(void)
Pawel Zarembski 0:01f31e923fe2 197 {
Pawel Zarembski 0:01f31e923fe2 198 __ASM volatile ("cpsie i" : : : "memory");
Pawel Zarembski 0:01f31e923fe2 199 }
Pawel Zarembski 0:01f31e923fe2 200
Pawel Zarembski 0:01f31e923fe2 201
Pawel Zarembski 0:01f31e923fe2 202 /**
Pawel Zarembski 0:01f31e923fe2 203 \brief Disable IRQ Interrupts
Pawel Zarembski 0:01f31e923fe2 204 \details Disables IRQ interrupts by setting the I-bit in the CPSR.
Pawel Zarembski 0:01f31e923fe2 205 Can only be executed in Privileged modes.
Pawel Zarembski 0:01f31e923fe2 206 */
Pawel Zarembski 0:01f31e923fe2 207 __STATIC_FORCEINLINE void __disable_irq(void)
Pawel Zarembski 0:01f31e923fe2 208 {
Pawel Zarembski 0:01f31e923fe2 209 __ASM volatile ("cpsid i" : : : "memory");
Pawel Zarembski 0:01f31e923fe2 210 }
Pawel Zarembski 0:01f31e923fe2 211
Pawel Zarembski 0:01f31e923fe2 212
Pawel Zarembski 0:01f31e923fe2 213 /**
Pawel Zarembski 0:01f31e923fe2 214 \brief Get Control Register
Pawel Zarembski 0:01f31e923fe2 215 \details Returns the content of the Control Register.
Pawel Zarembski 0:01f31e923fe2 216 \return Control Register value
Pawel Zarembski 0:01f31e923fe2 217 */
Pawel Zarembski 0:01f31e923fe2 218 __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
Pawel Zarembski 0:01f31e923fe2 219 {
Pawel Zarembski 0:01f31e923fe2 220 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 221
Pawel Zarembski 0:01f31e923fe2 222 __ASM volatile ("MRS %0, control" : "=r" (result) );
Pawel Zarembski 0:01f31e923fe2 223 return(result);
Pawel Zarembski 0:01f31e923fe2 224 }
Pawel Zarembski 0:01f31e923fe2 225
Pawel Zarembski 0:01f31e923fe2 226
Pawel Zarembski 0:01f31e923fe2 227 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Pawel Zarembski 0:01f31e923fe2 228 /**
Pawel Zarembski 0:01f31e923fe2 229 \brief Get Control Register (non-secure)
Pawel Zarembski 0:01f31e923fe2 230 \details Returns the content of the non-secure Control Register when in secure mode.
Pawel Zarembski 0:01f31e923fe2 231 \return non-secure Control Register value
Pawel Zarembski 0:01f31e923fe2 232 */
Pawel Zarembski 0:01f31e923fe2 233 __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
Pawel Zarembski 0:01f31e923fe2 234 {
Pawel Zarembski 0:01f31e923fe2 235 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 236
Pawel Zarembski 0:01f31e923fe2 237 __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
Pawel Zarembski 0:01f31e923fe2 238 return(result);
Pawel Zarembski 0:01f31e923fe2 239 }
Pawel Zarembski 0:01f31e923fe2 240 #endif
Pawel Zarembski 0:01f31e923fe2 241
Pawel Zarembski 0:01f31e923fe2 242
Pawel Zarembski 0:01f31e923fe2 243 /**
Pawel Zarembski 0:01f31e923fe2 244 \brief Set Control Register
Pawel Zarembski 0:01f31e923fe2 245 \details Writes the given value to the Control Register.
Pawel Zarembski 0:01f31e923fe2 246 \param [in] control Control Register value to set
Pawel Zarembski 0:01f31e923fe2 247 */
Pawel Zarembski 0:01f31e923fe2 248 __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
Pawel Zarembski 0:01f31e923fe2 249 {
Pawel Zarembski 0:01f31e923fe2 250 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
Pawel Zarembski 0:01f31e923fe2 251 }
Pawel Zarembski 0:01f31e923fe2 252
Pawel Zarembski 0:01f31e923fe2 253
Pawel Zarembski 0:01f31e923fe2 254 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Pawel Zarembski 0:01f31e923fe2 255 /**
Pawel Zarembski 0:01f31e923fe2 256 \brief Set Control Register (non-secure)
Pawel Zarembski 0:01f31e923fe2 257 \details Writes the given value to the non-secure Control Register when in secure state.
Pawel Zarembski 0:01f31e923fe2 258 \param [in] control Control Register value to set
Pawel Zarembski 0:01f31e923fe2 259 */
Pawel Zarembski 0:01f31e923fe2 260 __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
Pawel Zarembski 0:01f31e923fe2 261 {
Pawel Zarembski 0:01f31e923fe2 262 __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
Pawel Zarembski 0:01f31e923fe2 263 }
Pawel Zarembski 0:01f31e923fe2 264 #endif
Pawel Zarembski 0:01f31e923fe2 265
Pawel Zarembski 0:01f31e923fe2 266
Pawel Zarembski 0:01f31e923fe2 267 /**
Pawel Zarembski 0:01f31e923fe2 268 \brief Get IPSR Register
Pawel Zarembski 0:01f31e923fe2 269 \details Returns the content of the IPSR Register.
Pawel Zarembski 0:01f31e923fe2 270 \return IPSR Register value
Pawel Zarembski 0:01f31e923fe2 271 */
Pawel Zarembski 0:01f31e923fe2 272 __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
Pawel Zarembski 0:01f31e923fe2 273 {
Pawel Zarembski 0:01f31e923fe2 274 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 275
Pawel Zarembski 0:01f31e923fe2 276 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
Pawel Zarembski 0:01f31e923fe2 277 return(result);
Pawel Zarembski 0:01f31e923fe2 278 }
Pawel Zarembski 0:01f31e923fe2 279
Pawel Zarembski 0:01f31e923fe2 280
Pawel Zarembski 0:01f31e923fe2 281 /**
Pawel Zarembski 0:01f31e923fe2 282 \brief Get APSR Register
Pawel Zarembski 0:01f31e923fe2 283 \details Returns the content of the APSR Register.
Pawel Zarembski 0:01f31e923fe2 284 \return APSR Register value
Pawel Zarembski 0:01f31e923fe2 285 */
Pawel Zarembski 0:01f31e923fe2 286 __STATIC_FORCEINLINE uint32_t __get_APSR(void)
Pawel Zarembski 0:01f31e923fe2 287 {
Pawel Zarembski 0:01f31e923fe2 288 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 289
Pawel Zarembski 0:01f31e923fe2 290 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
Pawel Zarembski 0:01f31e923fe2 291 return(result);
Pawel Zarembski 0:01f31e923fe2 292 }
Pawel Zarembski 0:01f31e923fe2 293
Pawel Zarembski 0:01f31e923fe2 294
Pawel Zarembski 0:01f31e923fe2 295 /**
Pawel Zarembski 0:01f31e923fe2 296 \brief Get xPSR Register
Pawel Zarembski 0:01f31e923fe2 297 \details Returns the content of the xPSR Register.
Pawel Zarembski 0:01f31e923fe2 298 \return xPSR Register value
Pawel Zarembski 0:01f31e923fe2 299 */
Pawel Zarembski 0:01f31e923fe2 300 __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
Pawel Zarembski 0:01f31e923fe2 301 {
Pawel Zarembski 0:01f31e923fe2 302 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 303
Pawel Zarembski 0:01f31e923fe2 304 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
Pawel Zarembski 0:01f31e923fe2 305 return(result);
Pawel Zarembski 0:01f31e923fe2 306 }
Pawel Zarembski 0:01f31e923fe2 307
Pawel Zarembski 0:01f31e923fe2 308
Pawel Zarembski 0:01f31e923fe2 309 /**
Pawel Zarembski 0:01f31e923fe2 310 \brief Get Process Stack Pointer
Pawel Zarembski 0:01f31e923fe2 311 \details Returns the current value of the Process Stack Pointer (PSP).
Pawel Zarembski 0:01f31e923fe2 312 \return PSP Register value
Pawel Zarembski 0:01f31e923fe2 313 */
Pawel Zarembski 0:01f31e923fe2 314 __STATIC_FORCEINLINE uint32_t __get_PSP(void)
Pawel Zarembski 0:01f31e923fe2 315 {
Pawel Zarembski 0:01f31e923fe2 316 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 317
Pawel Zarembski 0:01f31e923fe2 318 __ASM volatile ("MRS %0, psp" : "=r" (result) );
Pawel Zarembski 0:01f31e923fe2 319 return(result);
Pawel Zarembski 0:01f31e923fe2 320 }
Pawel Zarembski 0:01f31e923fe2 321
Pawel Zarembski 0:01f31e923fe2 322
Pawel Zarembski 0:01f31e923fe2 323 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Pawel Zarembski 0:01f31e923fe2 324 /**
Pawel Zarembski 0:01f31e923fe2 325 \brief Get Process Stack Pointer (non-secure)
Pawel Zarembski 0:01f31e923fe2 326 \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
Pawel Zarembski 0:01f31e923fe2 327 \return PSP Register value
Pawel Zarembski 0:01f31e923fe2 328 */
Pawel Zarembski 0:01f31e923fe2 329 __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
Pawel Zarembski 0:01f31e923fe2 330 {
Pawel Zarembski 0:01f31e923fe2 331 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 332
Pawel Zarembski 0:01f31e923fe2 333 __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
Pawel Zarembski 0:01f31e923fe2 334 return(result);
Pawel Zarembski 0:01f31e923fe2 335 }
Pawel Zarembski 0:01f31e923fe2 336 #endif
Pawel Zarembski 0:01f31e923fe2 337
Pawel Zarembski 0:01f31e923fe2 338
Pawel Zarembski 0:01f31e923fe2 339 /**
Pawel Zarembski 0:01f31e923fe2 340 \brief Set Process Stack Pointer
Pawel Zarembski 0:01f31e923fe2 341 \details Assigns the given value to the Process Stack Pointer (PSP).
Pawel Zarembski 0:01f31e923fe2 342 \param [in] topOfProcStack Process Stack Pointer value to set
Pawel Zarembski 0:01f31e923fe2 343 */
Pawel Zarembski 0:01f31e923fe2 344 __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
Pawel Zarembski 0:01f31e923fe2 345 {
Pawel Zarembski 0:01f31e923fe2 346 __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
Pawel Zarembski 0:01f31e923fe2 347 }
Pawel Zarembski 0:01f31e923fe2 348
Pawel Zarembski 0:01f31e923fe2 349
Pawel Zarembski 0:01f31e923fe2 350 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Pawel Zarembski 0:01f31e923fe2 351 /**
Pawel Zarembski 0:01f31e923fe2 352 \brief Set Process Stack Pointer (non-secure)
Pawel Zarembski 0:01f31e923fe2 353 \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
Pawel Zarembski 0:01f31e923fe2 354 \param [in] topOfProcStack Process Stack Pointer value to set
Pawel Zarembski 0:01f31e923fe2 355 */
Pawel Zarembski 0:01f31e923fe2 356 __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
Pawel Zarembski 0:01f31e923fe2 357 {
Pawel Zarembski 0:01f31e923fe2 358 __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
Pawel Zarembski 0:01f31e923fe2 359 }
Pawel Zarembski 0:01f31e923fe2 360 #endif
Pawel Zarembski 0:01f31e923fe2 361
Pawel Zarembski 0:01f31e923fe2 362
Pawel Zarembski 0:01f31e923fe2 363 /**
Pawel Zarembski 0:01f31e923fe2 364 \brief Get Main Stack Pointer
Pawel Zarembski 0:01f31e923fe2 365 \details Returns the current value of the Main Stack Pointer (MSP).
Pawel Zarembski 0:01f31e923fe2 366 \return MSP Register value
Pawel Zarembski 0:01f31e923fe2 367 */
Pawel Zarembski 0:01f31e923fe2 368 __STATIC_FORCEINLINE uint32_t __get_MSP(void)
Pawel Zarembski 0:01f31e923fe2 369 {
Pawel Zarembski 0:01f31e923fe2 370 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 371
Pawel Zarembski 0:01f31e923fe2 372 __ASM volatile ("MRS %0, msp" : "=r" (result) );
Pawel Zarembski 0:01f31e923fe2 373 return(result);
Pawel Zarembski 0:01f31e923fe2 374 }
Pawel Zarembski 0:01f31e923fe2 375
Pawel Zarembski 0:01f31e923fe2 376
Pawel Zarembski 0:01f31e923fe2 377 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Pawel Zarembski 0:01f31e923fe2 378 /**
Pawel Zarembski 0:01f31e923fe2 379 \brief Get Main Stack Pointer (non-secure)
Pawel Zarembski 0:01f31e923fe2 380 \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
Pawel Zarembski 0:01f31e923fe2 381 \return MSP Register value
Pawel Zarembski 0:01f31e923fe2 382 */
Pawel Zarembski 0:01f31e923fe2 383 __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
Pawel Zarembski 0:01f31e923fe2 384 {
Pawel Zarembski 0:01f31e923fe2 385 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 386
Pawel Zarembski 0:01f31e923fe2 387 __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
Pawel Zarembski 0:01f31e923fe2 388 return(result);
Pawel Zarembski 0:01f31e923fe2 389 }
Pawel Zarembski 0:01f31e923fe2 390 #endif
Pawel Zarembski 0:01f31e923fe2 391
Pawel Zarembski 0:01f31e923fe2 392
Pawel Zarembski 0:01f31e923fe2 393 /**
Pawel Zarembski 0:01f31e923fe2 394 \brief Set Main Stack Pointer
Pawel Zarembski 0:01f31e923fe2 395 \details Assigns the given value to the Main Stack Pointer (MSP).
Pawel Zarembski 0:01f31e923fe2 396 \param [in] topOfMainStack Main Stack Pointer value to set
Pawel Zarembski 0:01f31e923fe2 397 */
Pawel Zarembski 0:01f31e923fe2 398 __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
Pawel Zarembski 0:01f31e923fe2 399 {
Pawel Zarembski 0:01f31e923fe2 400 __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
Pawel Zarembski 0:01f31e923fe2 401 }
Pawel Zarembski 0:01f31e923fe2 402
Pawel Zarembski 0:01f31e923fe2 403
Pawel Zarembski 0:01f31e923fe2 404 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Pawel Zarembski 0:01f31e923fe2 405 /**
Pawel Zarembski 0:01f31e923fe2 406 \brief Set Main Stack Pointer (non-secure)
Pawel Zarembski 0:01f31e923fe2 407 \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
Pawel Zarembski 0:01f31e923fe2 408 \param [in] topOfMainStack Main Stack Pointer value to set
Pawel Zarembski 0:01f31e923fe2 409 */
Pawel Zarembski 0:01f31e923fe2 410 __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
Pawel Zarembski 0:01f31e923fe2 411 {
Pawel Zarembski 0:01f31e923fe2 412 __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
Pawel Zarembski 0:01f31e923fe2 413 }
Pawel Zarembski 0:01f31e923fe2 414 #endif
Pawel Zarembski 0:01f31e923fe2 415
Pawel Zarembski 0:01f31e923fe2 416
Pawel Zarembski 0:01f31e923fe2 417 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Pawel Zarembski 0:01f31e923fe2 418 /**
Pawel Zarembski 0:01f31e923fe2 419 \brief Get Stack Pointer (non-secure)
Pawel Zarembski 0:01f31e923fe2 420 \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
Pawel Zarembski 0:01f31e923fe2 421 \return SP Register value
Pawel Zarembski 0:01f31e923fe2 422 */
Pawel Zarembski 0:01f31e923fe2 423 __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
Pawel Zarembski 0:01f31e923fe2 424 {
Pawel Zarembski 0:01f31e923fe2 425 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 426
Pawel Zarembski 0:01f31e923fe2 427 __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
Pawel Zarembski 0:01f31e923fe2 428 return(result);
Pawel Zarembski 0:01f31e923fe2 429 }
Pawel Zarembski 0:01f31e923fe2 430
Pawel Zarembski 0:01f31e923fe2 431
Pawel Zarembski 0:01f31e923fe2 432 /**
Pawel Zarembski 0:01f31e923fe2 433 \brief Set Stack Pointer (non-secure)
Pawel Zarembski 0:01f31e923fe2 434 \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
Pawel Zarembski 0:01f31e923fe2 435 \param [in] topOfStack Stack Pointer value to set
Pawel Zarembski 0:01f31e923fe2 436 */
Pawel Zarembski 0:01f31e923fe2 437 __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
Pawel Zarembski 0:01f31e923fe2 438 {
Pawel Zarembski 0:01f31e923fe2 439 __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
Pawel Zarembski 0:01f31e923fe2 440 }
Pawel Zarembski 0:01f31e923fe2 441 #endif
Pawel Zarembski 0:01f31e923fe2 442
Pawel Zarembski 0:01f31e923fe2 443
Pawel Zarembski 0:01f31e923fe2 444 /**
Pawel Zarembski 0:01f31e923fe2 445 \brief Get Priority Mask
Pawel Zarembski 0:01f31e923fe2 446 \details Returns the current state of the priority mask bit from the Priority Mask Register.
Pawel Zarembski 0:01f31e923fe2 447 \return Priority Mask value
Pawel Zarembski 0:01f31e923fe2 448 */
Pawel Zarembski 0:01f31e923fe2 449 __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
Pawel Zarembski 0:01f31e923fe2 450 {
Pawel Zarembski 0:01f31e923fe2 451 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 452
Pawel Zarembski 0:01f31e923fe2 453 __ASM volatile ("MRS %0, primask" : "=r" (result) );
Pawel Zarembski 0:01f31e923fe2 454 return(result);
Pawel Zarembski 0:01f31e923fe2 455 }
Pawel Zarembski 0:01f31e923fe2 456
Pawel Zarembski 0:01f31e923fe2 457
Pawel Zarembski 0:01f31e923fe2 458 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Pawel Zarembski 0:01f31e923fe2 459 /**
Pawel Zarembski 0:01f31e923fe2 460 \brief Get Priority Mask (non-secure)
Pawel Zarembski 0:01f31e923fe2 461 \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
Pawel Zarembski 0:01f31e923fe2 462 \return Priority Mask value
Pawel Zarembski 0:01f31e923fe2 463 */
Pawel Zarembski 0:01f31e923fe2 464 __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
Pawel Zarembski 0:01f31e923fe2 465 {
Pawel Zarembski 0:01f31e923fe2 466 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 467
Pawel Zarembski 0:01f31e923fe2 468 __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
Pawel Zarembski 0:01f31e923fe2 469 return(result);
Pawel Zarembski 0:01f31e923fe2 470 }
Pawel Zarembski 0:01f31e923fe2 471 #endif
Pawel Zarembski 0:01f31e923fe2 472
Pawel Zarembski 0:01f31e923fe2 473
Pawel Zarembski 0:01f31e923fe2 474 /**
Pawel Zarembski 0:01f31e923fe2 475 \brief Set Priority Mask
Pawel Zarembski 0:01f31e923fe2 476 \details Assigns the given value to the Priority Mask Register.
Pawel Zarembski 0:01f31e923fe2 477 \param [in] priMask Priority Mask
Pawel Zarembski 0:01f31e923fe2 478 */
Pawel Zarembski 0:01f31e923fe2 479 __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
Pawel Zarembski 0:01f31e923fe2 480 {
Pawel Zarembski 0:01f31e923fe2 481 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
Pawel Zarembski 0:01f31e923fe2 482 }
Pawel Zarembski 0:01f31e923fe2 483
Pawel Zarembski 0:01f31e923fe2 484
Pawel Zarembski 0:01f31e923fe2 485 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Pawel Zarembski 0:01f31e923fe2 486 /**
Pawel Zarembski 0:01f31e923fe2 487 \brief Set Priority Mask (non-secure)
Pawel Zarembski 0:01f31e923fe2 488 \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
Pawel Zarembski 0:01f31e923fe2 489 \param [in] priMask Priority Mask
Pawel Zarembski 0:01f31e923fe2 490 */
Pawel Zarembski 0:01f31e923fe2 491 __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
Pawel Zarembski 0:01f31e923fe2 492 {
Pawel Zarembski 0:01f31e923fe2 493 __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
Pawel Zarembski 0:01f31e923fe2 494 }
Pawel Zarembski 0:01f31e923fe2 495 #endif
Pawel Zarembski 0:01f31e923fe2 496
Pawel Zarembski 0:01f31e923fe2 497
Pawel Zarembski 0:01f31e923fe2 498 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 499 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 500 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
Pawel Zarembski 0:01f31e923fe2 501 /**
Pawel Zarembski 0:01f31e923fe2 502 \brief Enable FIQ
Pawel Zarembski 0:01f31e923fe2 503 \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
Pawel Zarembski 0:01f31e923fe2 504 Can only be executed in Privileged modes.
Pawel Zarembski 0:01f31e923fe2 505 */
Pawel Zarembski 0:01f31e923fe2 506 __STATIC_FORCEINLINE void __enable_fault_irq(void)
Pawel Zarembski 0:01f31e923fe2 507 {
Pawel Zarembski 0:01f31e923fe2 508 __ASM volatile ("cpsie f" : : : "memory");
Pawel Zarembski 0:01f31e923fe2 509 }
Pawel Zarembski 0:01f31e923fe2 510
Pawel Zarembski 0:01f31e923fe2 511
Pawel Zarembski 0:01f31e923fe2 512 /**
Pawel Zarembski 0:01f31e923fe2 513 \brief Disable FIQ
Pawel Zarembski 0:01f31e923fe2 514 \details Disables FIQ interrupts by setting the F-bit in the CPSR.
Pawel Zarembski 0:01f31e923fe2 515 Can only be executed in Privileged modes.
Pawel Zarembski 0:01f31e923fe2 516 */
Pawel Zarembski 0:01f31e923fe2 517 __STATIC_FORCEINLINE void __disable_fault_irq(void)
Pawel Zarembski 0:01f31e923fe2 518 {
Pawel Zarembski 0:01f31e923fe2 519 __ASM volatile ("cpsid f" : : : "memory");
Pawel Zarembski 0:01f31e923fe2 520 }
Pawel Zarembski 0:01f31e923fe2 521
Pawel Zarembski 0:01f31e923fe2 522
Pawel Zarembski 0:01f31e923fe2 523 /**
Pawel Zarembski 0:01f31e923fe2 524 \brief Get Base Priority
Pawel Zarembski 0:01f31e923fe2 525 \details Returns the current value of the Base Priority register.
Pawel Zarembski 0:01f31e923fe2 526 \return Base Priority register value
Pawel Zarembski 0:01f31e923fe2 527 */
Pawel Zarembski 0:01f31e923fe2 528 __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
Pawel Zarembski 0:01f31e923fe2 529 {
Pawel Zarembski 0:01f31e923fe2 530 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 531
Pawel Zarembski 0:01f31e923fe2 532 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
Pawel Zarembski 0:01f31e923fe2 533 return(result);
Pawel Zarembski 0:01f31e923fe2 534 }
Pawel Zarembski 0:01f31e923fe2 535
Pawel Zarembski 0:01f31e923fe2 536
Pawel Zarembski 0:01f31e923fe2 537 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Pawel Zarembski 0:01f31e923fe2 538 /**
Pawel Zarembski 0:01f31e923fe2 539 \brief Get Base Priority (non-secure)
Pawel Zarembski 0:01f31e923fe2 540 \details Returns the current value of the non-secure Base Priority register when in secure state.
Pawel Zarembski 0:01f31e923fe2 541 \return Base Priority register value
Pawel Zarembski 0:01f31e923fe2 542 */
Pawel Zarembski 0:01f31e923fe2 543 __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
Pawel Zarembski 0:01f31e923fe2 544 {
Pawel Zarembski 0:01f31e923fe2 545 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 546
Pawel Zarembski 0:01f31e923fe2 547 __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
Pawel Zarembski 0:01f31e923fe2 548 return(result);
Pawel Zarembski 0:01f31e923fe2 549 }
Pawel Zarembski 0:01f31e923fe2 550 #endif
Pawel Zarembski 0:01f31e923fe2 551
Pawel Zarembski 0:01f31e923fe2 552
Pawel Zarembski 0:01f31e923fe2 553 /**
Pawel Zarembski 0:01f31e923fe2 554 \brief Set Base Priority
Pawel Zarembski 0:01f31e923fe2 555 \details Assigns the given value to the Base Priority register.
Pawel Zarembski 0:01f31e923fe2 556 \param [in] basePri Base Priority value to set
Pawel Zarembski 0:01f31e923fe2 557 */
Pawel Zarembski 0:01f31e923fe2 558 __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
Pawel Zarembski 0:01f31e923fe2 559 {
Pawel Zarembski 0:01f31e923fe2 560 __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
Pawel Zarembski 0:01f31e923fe2 561 }
Pawel Zarembski 0:01f31e923fe2 562
Pawel Zarembski 0:01f31e923fe2 563
Pawel Zarembski 0:01f31e923fe2 564 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Pawel Zarembski 0:01f31e923fe2 565 /**
Pawel Zarembski 0:01f31e923fe2 566 \brief Set Base Priority (non-secure)
Pawel Zarembski 0:01f31e923fe2 567 \details Assigns the given value to the non-secure Base Priority register when in secure state.
Pawel Zarembski 0:01f31e923fe2 568 \param [in] basePri Base Priority value to set
Pawel Zarembski 0:01f31e923fe2 569 */
Pawel Zarembski 0:01f31e923fe2 570 __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
Pawel Zarembski 0:01f31e923fe2 571 {
Pawel Zarembski 0:01f31e923fe2 572 __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
Pawel Zarembski 0:01f31e923fe2 573 }
Pawel Zarembski 0:01f31e923fe2 574 #endif
Pawel Zarembski 0:01f31e923fe2 575
Pawel Zarembski 0:01f31e923fe2 576
Pawel Zarembski 0:01f31e923fe2 577 /**
Pawel Zarembski 0:01f31e923fe2 578 \brief Set Base Priority with condition
Pawel Zarembski 0:01f31e923fe2 579 \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Pawel Zarembski 0:01f31e923fe2 580 or the new value increases the BASEPRI priority level.
Pawel Zarembski 0:01f31e923fe2 581 \param [in] basePri Base Priority value to set
Pawel Zarembski 0:01f31e923fe2 582 */
Pawel Zarembski 0:01f31e923fe2 583 __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
Pawel Zarembski 0:01f31e923fe2 584 {
Pawel Zarembski 0:01f31e923fe2 585 __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
Pawel Zarembski 0:01f31e923fe2 586 }
Pawel Zarembski 0:01f31e923fe2 587
Pawel Zarembski 0:01f31e923fe2 588
Pawel Zarembski 0:01f31e923fe2 589 /**
Pawel Zarembski 0:01f31e923fe2 590 \brief Get Fault Mask
Pawel Zarembski 0:01f31e923fe2 591 \details Returns the current value of the Fault Mask register.
Pawel Zarembski 0:01f31e923fe2 592 \return Fault Mask register value
Pawel Zarembski 0:01f31e923fe2 593 */
Pawel Zarembski 0:01f31e923fe2 594 __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
Pawel Zarembski 0:01f31e923fe2 595 {
Pawel Zarembski 0:01f31e923fe2 596 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 597
Pawel Zarembski 0:01f31e923fe2 598 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
Pawel Zarembski 0:01f31e923fe2 599 return(result);
Pawel Zarembski 0:01f31e923fe2 600 }
Pawel Zarembski 0:01f31e923fe2 601
Pawel Zarembski 0:01f31e923fe2 602
Pawel Zarembski 0:01f31e923fe2 603 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Pawel Zarembski 0:01f31e923fe2 604 /**
Pawel Zarembski 0:01f31e923fe2 605 \brief Get Fault Mask (non-secure)
Pawel Zarembski 0:01f31e923fe2 606 \details Returns the current value of the non-secure Fault Mask register when in secure state.
Pawel Zarembski 0:01f31e923fe2 607 \return Fault Mask register value
Pawel Zarembski 0:01f31e923fe2 608 */
Pawel Zarembski 0:01f31e923fe2 609 __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
Pawel Zarembski 0:01f31e923fe2 610 {
Pawel Zarembski 0:01f31e923fe2 611 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 612
Pawel Zarembski 0:01f31e923fe2 613 __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
Pawel Zarembski 0:01f31e923fe2 614 return(result);
Pawel Zarembski 0:01f31e923fe2 615 }
Pawel Zarembski 0:01f31e923fe2 616 #endif
Pawel Zarembski 0:01f31e923fe2 617
Pawel Zarembski 0:01f31e923fe2 618
Pawel Zarembski 0:01f31e923fe2 619 /**
Pawel Zarembski 0:01f31e923fe2 620 \brief Set Fault Mask
Pawel Zarembski 0:01f31e923fe2 621 \details Assigns the given value to the Fault Mask register.
Pawel Zarembski 0:01f31e923fe2 622 \param [in] faultMask Fault Mask value to set
Pawel Zarembski 0:01f31e923fe2 623 */
Pawel Zarembski 0:01f31e923fe2 624 __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
Pawel Zarembski 0:01f31e923fe2 625 {
Pawel Zarembski 0:01f31e923fe2 626 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
Pawel Zarembski 0:01f31e923fe2 627 }
Pawel Zarembski 0:01f31e923fe2 628
Pawel Zarembski 0:01f31e923fe2 629
Pawel Zarembski 0:01f31e923fe2 630 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Pawel Zarembski 0:01f31e923fe2 631 /**
Pawel Zarembski 0:01f31e923fe2 632 \brief Set Fault Mask (non-secure)
Pawel Zarembski 0:01f31e923fe2 633 \details Assigns the given value to the non-secure Fault Mask register when in secure state.
Pawel Zarembski 0:01f31e923fe2 634 \param [in] faultMask Fault Mask value to set
Pawel Zarembski 0:01f31e923fe2 635 */
Pawel Zarembski 0:01f31e923fe2 636 __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
Pawel Zarembski 0:01f31e923fe2 637 {
Pawel Zarembski 0:01f31e923fe2 638 __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
Pawel Zarembski 0:01f31e923fe2 639 }
Pawel Zarembski 0:01f31e923fe2 640 #endif
Pawel Zarembski 0:01f31e923fe2 641
Pawel Zarembski 0:01f31e923fe2 642 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 643 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 644 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
Pawel Zarembski 0:01f31e923fe2 645
Pawel Zarembski 0:01f31e923fe2 646
Pawel Zarembski 0:01f31e923fe2 647 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 648 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
Pawel Zarembski 0:01f31e923fe2 649
Pawel Zarembski 0:01f31e923fe2 650 /**
Pawel Zarembski 0:01f31e923fe2 651 \brief Get Process Stack Pointer Limit
Pawel Zarembski 0:01f31e923fe2 652 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Pawel Zarembski 0:01f31e923fe2 653 Stack Pointer Limit register hence zero is returned always in non-secure
Pawel Zarembski 0:01f31e923fe2 654 mode.
Pawel Zarembski 0:01f31e923fe2 655
Pawel Zarembski 0:01f31e923fe2 656 \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
Pawel Zarembski 0:01f31e923fe2 657 \return PSPLIM Register value
Pawel Zarembski 0:01f31e923fe2 658 */
Pawel Zarembski 0:01f31e923fe2 659 __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
Pawel Zarembski 0:01f31e923fe2 660 {
Pawel Zarembski 0:01f31e923fe2 661 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Pawel Zarembski 0:01f31e923fe2 662 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
Pawel Zarembski 0:01f31e923fe2 663 // without main extensions, the non-secure PSPLIM is RAZ/WI
Pawel Zarembski 0:01f31e923fe2 664 return 0U;
Pawel Zarembski 0:01f31e923fe2 665 #else
Pawel Zarembski 0:01f31e923fe2 666 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 667 __ASM volatile ("MRS %0, psplim" : "=r" (result) );
Pawel Zarembski 0:01f31e923fe2 668 return result;
Pawel Zarembski 0:01f31e923fe2 669 #endif
Pawel Zarembski 0:01f31e923fe2 670 }
Pawel Zarembski 0:01f31e923fe2 671
Pawel Zarembski 0:01f31e923fe2 672 #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
Pawel Zarembski 0:01f31e923fe2 673 /**
Pawel Zarembski 0:01f31e923fe2 674 \brief Get Process Stack Pointer Limit (non-secure)
Pawel Zarembski 0:01f31e923fe2 675 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Pawel Zarembski 0:01f31e923fe2 676 Stack Pointer Limit register hence zero is returned always.
Pawel Zarembski 0:01f31e923fe2 677
Pawel Zarembski 0:01f31e923fe2 678 \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
Pawel Zarembski 0:01f31e923fe2 679 \return PSPLIM Register value
Pawel Zarembski 0:01f31e923fe2 680 */
Pawel Zarembski 0:01f31e923fe2 681 __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
Pawel Zarembski 0:01f31e923fe2 682 {
Pawel Zarembski 0:01f31e923fe2 683 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
Pawel Zarembski 0:01f31e923fe2 684 // without main extensions, the non-secure PSPLIM is RAZ/WI
Pawel Zarembski 0:01f31e923fe2 685 return 0U;
Pawel Zarembski 0:01f31e923fe2 686 #else
Pawel Zarembski 0:01f31e923fe2 687 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 688 __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
Pawel Zarembski 0:01f31e923fe2 689 return result;
Pawel Zarembski 0:01f31e923fe2 690 #endif
Pawel Zarembski 0:01f31e923fe2 691 }
Pawel Zarembski 0:01f31e923fe2 692 #endif
Pawel Zarembski 0:01f31e923fe2 693
Pawel Zarembski 0:01f31e923fe2 694
Pawel Zarembski 0:01f31e923fe2 695 /**
Pawel Zarembski 0:01f31e923fe2 696 \brief Set Process Stack Pointer Limit
Pawel Zarembski 0:01f31e923fe2 697 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Pawel Zarembski 0:01f31e923fe2 698 Stack Pointer Limit register hence the write is silently ignored in non-secure
Pawel Zarembski 0:01f31e923fe2 699 mode.
Pawel Zarembski 0:01f31e923fe2 700
Pawel Zarembski 0:01f31e923fe2 701 \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
Pawel Zarembski 0:01f31e923fe2 702 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
Pawel Zarembski 0:01f31e923fe2 703 */
Pawel Zarembski 0:01f31e923fe2 704 __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
Pawel Zarembski 0:01f31e923fe2 705 {
Pawel Zarembski 0:01f31e923fe2 706 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Pawel Zarembski 0:01f31e923fe2 707 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
Pawel Zarembski 0:01f31e923fe2 708 // without main extensions, the non-secure PSPLIM is RAZ/WI
Pawel Zarembski 0:01f31e923fe2 709 (void)ProcStackPtrLimit;
Pawel Zarembski 0:01f31e923fe2 710 #else
Pawel Zarembski 0:01f31e923fe2 711 __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
Pawel Zarembski 0:01f31e923fe2 712 #endif
Pawel Zarembski 0:01f31e923fe2 713 }
Pawel Zarembski 0:01f31e923fe2 714
Pawel Zarembski 0:01f31e923fe2 715
Pawel Zarembski 0:01f31e923fe2 716 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Pawel Zarembski 0:01f31e923fe2 717 /**
Pawel Zarembski 0:01f31e923fe2 718 \brief Set Process Stack Pointer (non-secure)
Pawel Zarembski 0:01f31e923fe2 719 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Pawel Zarembski 0:01f31e923fe2 720 Stack Pointer Limit register hence the write is silently ignored.
Pawel Zarembski 0:01f31e923fe2 721
Pawel Zarembski 0:01f31e923fe2 722 \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
Pawel Zarembski 0:01f31e923fe2 723 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
Pawel Zarembski 0:01f31e923fe2 724 */
Pawel Zarembski 0:01f31e923fe2 725 __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
Pawel Zarembski 0:01f31e923fe2 726 {
Pawel Zarembski 0:01f31e923fe2 727 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
Pawel Zarembski 0:01f31e923fe2 728 // without main extensions, the non-secure PSPLIM is RAZ/WI
Pawel Zarembski 0:01f31e923fe2 729 (void)ProcStackPtrLimit;
Pawel Zarembski 0:01f31e923fe2 730 #else
Pawel Zarembski 0:01f31e923fe2 731 __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
Pawel Zarembski 0:01f31e923fe2 732 #endif
Pawel Zarembski 0:01f31e923fe2 733 }
Pawel Zarembski 0:01f31e923fe2 734 #endif
Pawel Zarembski 0:01f31e923fe2 735
Pawel Zarembski 0:01f31e923fe2 736
Pawel Zarembski 0:01f31e923fe2 737 /**
Pawel Zarembski 0:01f31e923fe2 738 \brief Get Main Stack Pointer Limit
Pawel Zarembski 0:01f31e923fe2 739 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Pawel Zarembski 0:01f31e923fe2 740 Stack Pointer Limit register hence zero is returned always in non-secure
Pawel Zarembski 0:01f31e923fe2 741 mode.
Pawel Zarembski 0:01f31e923fe2 742
Pawel Zarembski 0:01f31e923fe2 743 \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
Pawel Zarembski 0:01f31e923fe2 744 \return MSPLIM Register value
Pawel Zarembski 0:01f31e923fe2 745 */
Pawel Zarembski 0:01f31e923fe2 746 __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
Pawel Zarembski 0:01f31e923fe2 747 {
Pawel Zarembski 0:01f31e923fe2 748 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Pawel Zarembski 0:01f31e923fe2 749 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
Pawel Zarembski 0:01f31e923fe2 750 // without main extensions, the non-secure MSPLIM is RAZ/WI
Pawel Zarembski 0:01f31e923fe2 751 return 0U;
Pawel Zarembski 0:01f31e923fe2 752 #else
Pawel Zarembski 0:01f31e923fe2 753 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 754 __ASM volatile ("MRS %0, msplim" : "=r" (result) );
Pawel Zarembski 0:01f31e923fe2 755 return result;
Pawel Zarembski 0:01f31e923fe2 756 #endif
Pawel Zarembski 0:01f31e923fe2 757 }
Pawel Zarembski 0:01f31e923fe2 758
Pawel Zarembski 0:01f31e923fe2 759
Pawel Zarembski 0:01f31e923fe2 760 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Pawel Zarembski 0:01f31e923fe2 761 /**
Pawel Zarembski 0:01f31e923fe2 762 \brief Get Main Stack Pointer Limit (non-secure)
Pawel Zarembski 0:01f31e923fe2 763 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Pawel Zarembski 0:01f31e923fe2 764 Stack Pointer Limit register hence zero is returned always.
Pawel Zarembski 0:01f31e923fe2 765
Pawel Zarembski 0:01f31e923fe2 766 \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
Pawel Zarembski 0:01f31e923fe2 767 \return MSPLIM Register value
Pawel Zarembski 0:01f31e923fe2 768 */
Pawel Zarembski 0:01f31e923fe2 769 __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
Pawel Zarembski 0:01f31e923fe2 770 {
Pawel Zarembski 0:01f31e923fe2 771 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
Pawel Zarembski 0:01f31e923fe2 772 // without main extensions, the non-secure MSPLIM is RAZ/WI
Pawel Zarembski 0:01f31e923fe2 773 return 0U;
Pawel Zarembski 0:01f31e923fe2 774 #else
Pawel Zarembski 0:01f31e923fe2 775 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 776 __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
Pawel Zarembski 0:01f31e923fe2 777 return result;
Pawel Zarembski 0:01f31e923fe2 778 #endif
Pawel Zarembski 0:01f31e923fe2 779 }
Pawel Zarembski 0:01f31e923fe2 780 #endif
Pawel Zarembski 0:01f31e923fe2 781
Pawel Zarembski 0:01f31e923fe2 782
Pawel Zarembski 0:01f31e923fe2 783 /**
Pawel Zarembski 0:01f31e923fe2 784 \brief Set Main Stack Pointer Limit
Pawel Zarembski 0:01f31e923fe2 785 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Pawel Zarembski 0:01f31e923fe2 786 Stack Pointer Limit register hence the write is silently ignored in non-secure
Pawel Zarembski 0:01f31e923fe2 787 mode.
Pawel Zarembski 0:01f31e923fe2 788
Pawel Zarembski 0:01f31e923fe2 789 \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
Pawel Zarembski 0:01f31e923fe2 790 \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
Pawel Zarembski 0:01f31e923fe2 791 */
Pawel Zarembski 0:01f31e923fe2 792 __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
Pawel Zarembski 0:01f31e923fe2 793 {
Pawel Zarembski 0:01f31e923fe2 794 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
Pawel Zarembski 0:01f31e923fe2 795 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
Pawel Zarembski 0:01f31e923fe2 796 // without main extensions, the non-secure MSPLIM is RAZ/WI
Pawel Zarembski 0:01f31e923fe2 797 (void)MainStackPtrLimit;
Pawel Zarembski 0:01f31e923fe2 798 #else
Pawel Zarembski 0:01f31e923fe2 799 __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
Pawel Zarembski 0:01f31e923fe2 800 #endif
Pawel Zarembski 0:01f31e923fe2 801 }
Pawel Zarembski 0:01f31e923fe2 802
Pawel Zarembski 0:01f31e923fe2 803
Pawel Zarembski 0:01f31e923fe2 804 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
Pawel Zarembski 0:01f31e923fe2 805 /**
Pawel Zarembski 0:01f31e923fe2 806 \brief Set Main Stack Pointer Limit (non-secure)
Pawel Zarembski 0:01f31e923fe2 807 Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Pawel Zarembski 0:01f31e923fe2 808 Stack Pointer Limit register hence the write is silently ignored.
Pawel Zarembski 0:01f31e923fe2 809
Pawel Zarembski 0:01f31e923fe2 810 \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
Pawel Zarembski 0:01f31e923fe2 811 \param [in] MainStackPtrLimit Main Stack Pointer value to set
Pawel Zarembski 0:01f31e923fe2 812 */
Pawel Zarembski 0:01f31e923fe2 813 __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
Pawel Zarembski 0:01f31e923fe2 814 {
Pawel Zarembski 0:01f31e923fe2 815 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
Pawel Zarembski 0:01f31e923fe2 816 // without main extensions, the non-secure MSPLIM is RAZ/WI
Pawel Zarembski 0:01f31e923fe2 817 (void)MainStackPtrLimit;
Pawel Zarembski 0:01f31e923fe2 818 #else
Pawel Zarembski 0:01f31e923fe2 819 __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
Pawel Zarembski 0:01f31e923fe2 820 #endif
Pawel Zarembski 0:01f31e923fe2 821 }
Pawel Zarembski 0:01f31e923fe2 822 #endif
Pawel Zarembski 0:01f31e923fe2 823
Pawel Zarembski 0:01f31e923fe2 824 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 825 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
Pawel Zarembski 0:01f31e923fe2 826
Pawel Zarembski 0:01f31e923fe2 827
Pawel Zarembski 0:01f31e923fe2 828 /**
Pawel Zarembski 0:01f31e923fe2 829 \brief Get FPSCR
Pawel Zarembski 0:01f31e923fe2 830 \details Returns the current value of the Floating Point Status/Control register.
Pawel Zarembski 0:01f31e923fe2 831 \return Floating Point Status/Control register value
Pawel Zarembski 0:01f31e923fe2 832 */
Pawel Zarembski 0:01f31e923fe2 833 __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
Pawel Zarembski 0:01f31e923fe2 834 {
Pawel Zarembski 0:01f31e923fe2 835 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
Pawel Zarembski 0:01f31e923fe2 836 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
Pawel Zarembski 0:01f31e923fe2 837 #if __has_builtin(__builtin_arm_get_fpscr)
Pawel Zarembski 0:01f31e923fe2 838 // Re-enable using built-in when GCC has been fixed
Pawel Zarembski 0:01f31e923fe2 839 // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
Pawel Zarembski 0:01f31e923fe2 840 /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
Pawel Zarembski 0:01f31e923fe2 841 return __builtin_arm_get_fpscr();
Pawel Zarembski 0:01f31e923fe2 842 #else
Pawel Zarembski 0:01f31e923fe2 843 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 844
Pawel Zarembski 0:01f31e923fe2 845 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
Pawel Zarembski 0:01f31e923fe2 846 return(result);
Pawel Zarembski 0:01f31e923fe2 847 #endif
Pawel Zarembski 0:01f31e923fe2 848 #else
Pawel Zarembski 0:01f31e923fe2 849 return(0U);
Pawel Zarembski 0:01f31e923fe2 850 #endif
Pawel Zarembski 0:01f31e923fe2 851 }
Pawel Zarembski 0:01f31e923fe2 852
Pawel Zarembski 0:01f31e923fe2 853
Pawel Zarembski 0:01f31e923fe2 854 /**
Pawel Zarembski 0:01f31e923fe2 855 \brief Set FPSCR
Pawel Zarembski 0:01f31e923fe2 856 \details Assigns the given value to the Floating Point Status/Control register.
Pawel Zarembski 0:01f31e923fe2 857 \param [in] fpscr Floating Point Status/Control value to set
Pawel Zarembski 0:01f31e923fe2 858 */
Pawel Zarembski 0:01f31e923fe2 859 __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
Pawel Zarembski 0:01f31e923fe2 860 {
Pawel Zarembski 0:01f31e923fe2 861 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
Pawel Zarembski 0:01f31e923fe2 862 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
Pawel Zarembski 0:01f31e923fe2 863 #if __has_builtin(__builtin_arm_set_fpscr)
Pawel Zarembski 0:01f31e923fe2 864 // Re-enable using built-in when GCC has been fixed
Pawel Zarembski 0:01f31e923fe2 865 // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
Pawel Zarembski 0:01f31e923fe2 866 /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
Pawel Zarembski 0:01f31e923fe2 867 __builtin_arm_set_fpscr(fpscr);
Pawel Zarembski 0:01f31e923fe2 868 #else
Pawel Zarembski 0:01f31e923fe2 869 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
Pawel Zarembski 0:01f31e923fe2 870 #endif
Pawel Zarembski 0:01f31e923fe2 871 #else
Pawel Zarembski 0:01f31e923fe2 872 (void)fpscr;
Pawel Zarembski 0:01f31e923fe2 873 #endif
Pawel Zarembski 0:01f31e923fe2 874 }
Pawel Zarembski 0:01f31e923fe2 875
Pawel Zarembski 0:01f31e923fe2 876
Pawel Zarembski 0:01f31e923fe2 877 /*@} end of CMSIS_Core_RegAccFunctions */
Pawel Zarembski 0:01f31e923fe2 878
Pawel Zarembski 0:01f31e923fe2 879
Pawel Zarembski 0:01f31e923fe2 880 /* ########################## Core Instruction Access ######################### */
Pawel Zarembski 0:01f31e923fe2 881 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Pawel Zarembski 0:01f31e923fe2 882 Access to dedicated instructions
Pawel Zarembski 0:01f31e923fe2 883 @{
Pawel Zarembski 0:01f31e923fe2 884 */
Pawel Zarembski 0:01f31e923fe2 885
Pawel Zarembski 0:01f31e923fe2 886 /* Define macros for porting to both thumb1 and thumb2.
Pawel Zarembski 0:01f31e923fe2 887 * For thumb1, use low register (r0-r7), specified by constraint "l"
Pawel Zarembski 0:01f31e923fe2 888 * Otherwise, use general registers, specified by constraint "r" */
Pawel Zarembski 0:01f31e923fe2 889 #if defined (__thumb__) && !defined (__thumb2__)
Pawel Zarembski 0:01f31e923fe2 890 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
Pawel Zarembski 0:01f31e923fe2 891 #define __CMSIS_GCC_RW_REG(r) "+l" (r)
Pawel Zarembski 0:01f31e923fe2 892 #define __CMSIS_GCC_USE_REG(r) "l" (r)
Pawel Zarembski 0:01f31e923fe2 893 #else
Pawel Zarembski 0:01f31e923fe2 894 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
Pawel Zarembski 0:01f31e923fe2 895 #define __CMSIS_GCC_RW_REG(r) "+r" (r)
Pawel Zarembski 0:01f31e923fe2 896 #define __CMSIS_GCC_USE_REG(r) "r" (r)
Pawel Zarembski 0:01f31e923fe2 897 #endif
Pawel Zarembski 0:01f31e923fe2 898
Pawel Zarembski 0:01f31e923fe2 899 /**
Pawel Zarembski 0:01f31e923fe2 900 \brief No Operation
Pawel Zarembski 0:01f31e923fe2 901 \details No Operation does nothing. This instruction can be used for code alignment purposes.
Pawel Zarembski 0:01f31e923fe2 902 */
Pawel Zarembski 0:01f31e923fe2 903 #define __NOP() __ASM volatile ("nop")
Pawel Zarembski 0:01f31e923fe2 904
Pawel Zarembski 0:01f31e923fe2 905 /**
Pawel Zarembski 0:01f31e923fe2 906 \brief Wait For Interrupt
Pawel Zarembski 0:01f31e923fe2 907 \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
Pawel Zarembski 0:01f31e923fe2 908 */
Pawel Zarembski 0:01f31e923fe2 909 #define __WFI() __ASM volatile ("wfi":::"memory")
Pawel Zarembski 0:01f31e923fe2 910
Pawel Zarembski 0:01f31e923fe2 911
Pawel Zarembski 0:01f31e923fe2 912 /**
Pawel Zarembski 0:01f31e923fe2 913 \brief Wait For Event
Pawel Zarembski 0:01f31e923fe2 914 \details Wait For Event is a hint instruction that permits the processor to enter
Pawel Zarembski 0:01f31e923fe2 915 a low-power state until one of a number of events occurs.
Pawel Zarembski 0:01f31e923fe2 916 */
Pawel Zarembski 0:01f31e923fe2 917 #define __WFE() __ASM volatile ("wfe":::"memory")
Pawel Zarembski 0:01f31e923fe2 918
Pawel Zarembski 0:01f31e923fe2 919
Pawel Zarembski 0:01f31e923fe2 920 /**
Pawel Zarembski 0:01f31e923fe2 921 \brief Send Event
Pawel Zarembski 0:01f31e923fe2 922 \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
Pawel Zarembski 0:01f31e923fe2 923 */
Pawel Zarembski 0:01f31e923fe2 924 #define __SEV() __ASM volatile ("sev")
Pawel Zarembski 0:01f31e923fe2 925
Pawel Zarembski 0:01f31e923fe2 926
Pawel Zarembski 0:01f31e923fe2 927 /**
Pawel Zarembski 0:01f31e923fe2 928 \brief Instruction Synchronization Barrier
Pawel Zarembski 0:01f31e923fe2 929 \details Instruction Synchronization Barrier flushes the pipeline in the processor,
Pawel Zarembski 0:01f31e923fe2 930 so that all instructions following the ISB are fetched from cache or memory,
Pawel Zarembski 0:01f31e923fe2 931 after the instruction has been completed.
Pawel Zarembski 0:01f31e923fe2 932 */
Pawel Zarembski 0:01f31e923fe2 933 __STATIC_FORCEINLINE void __ISB(void)
Pawel Zarembski 0:01f31e923fe2 934 {
Pawel Zarembski 0:01f31e923fe2 935 __ASM volatile ("isb 0xF":::"memory");
Pawel Zarembski 0:01f31e923fe2 936 }
Pawel Zarembski 0:01f31e923fe2 937
Pawel Zarembski 0:01f31e923fe2 938
Pawel Zarembski 0:01f31e923fe2 939 /**
Pawel Zarembski 0:01f31e923fe2 940 \brief Data Synchronization Barrier
Pawel Zarembski 0:01f31e923fe2 941 \details Acts as a special kind of Data Memory Barrier.
Pawel Zarembski 0:01f31e923fe2 942 It completes when all explicit memory accesses before this instruction complete.
Pawel Zarembski 0:01f31e923fe2 943 */
Pawel Zarembski 0:01f31e923fe2 944 __STATIC_FORCEINLINE void __DSB(void)
Pawel Zarembski 0:01f31e923fe2 945 {
Pawel Zarembski 0:01f31e923fe2 946 __ASM volatile ("dsb 0xF":::"memory");
Pawel Zarembski 0:01f31e923fe2 947 }
Pawel Zarembski 0:01f31e923fe2 948
Pawel Zarembski 0:01f31e923fe2 949
Pawel Zarembski 0:01f31e923fe2 950 /**
Pawel Zarembski 0:01f31e923fe2 951 \brief Data Memory Barrier
Pawel Zarembski 0:01f31e923fe2 952 \details Ensures the apparent order of the explicit memory operations before
Pawel Zarembski 0:01f31e923fe2 953 and after the instruction, without ensuring their completion.
Pawel Zarembski 0:01f31e923fe2 954 */
Pawel Zarembski 0:01f31e923fe2 955 __STATIC_FORCEINLINE void __DMB(void)
Pawel Zarembski 0:01f31e923fe2 956 {
Pawel Zarembski 0:01f31e923fe2 957 __ASM volatile ("dmb 0xF":::"memory");
Pawel Zarembski 0:01f31e923fe2 958 }
Pawel Zarembski 0:01f31e923fe2 959
Pawel Zarembski 0:01f31e923fe2 960
Pawel Zarembski 0:01f31e923fe2 961 /**
Pawel Zarembski 0:01f31e923fe2 962 \brief Reverse byte order (32 bit)
Pawel Zarembski 0:01f31e923fe2 963 \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
Pawel Zarembski 0:01f31e923fe2 964 \param [in] value Value to reverse
Pawel Zarembski 0:01f31e923fe2 965 \return Reversed value
Pawel Zarembski 0:01f31e923fe2 966 */
Pawel Zarembski 0:01f31e923fe2 967 __STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
Pawel Zarembski 0:01f31e923fe2 968 {
Pawel Zarembski 0:01f31e923fe2 969 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
Pawel Zarembski 0:01f31e923fe2 970 return __builtin_bswap32(value);
Pawel Zarembski 0:01f31e923fe2 971 #else
Pawel Zarembski 0:01f31e923fe2 972 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 973
Pawel Zarembski 0:01f31e923fe2 974 __ASM ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Pawel Zarembski 0:01f31e923fe2 975 return result;
Pawel Zarembski 0:01f31e923fe2 976 #endif
Pawel Zarembski 0:01f31e923fe2 977 }
Pawel Zarembski 0:01f31e923fe2 978
Pawel Zarembski 0:01f31e923fe2 979
Pawel Zarembski 0:01f31e923fe2 980 /**
Pawel Zarembski 0:01f31e923fe2 981 \brief Reverse byte order (16 bit)
Pawel Zarembski 0:01f31e923fe2 982 \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
Pawel Zarembski 0:01f31e923fe2 983 \param [in] value Value to reverse
Pawel Zarembski 0:01f31e923fe2 984 \return Reversed value
Pawel Zarembski 0:01f31e923fe2 985 */
Pawel Zarembski 0:01f31e923fe2 986 __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
Pawel Zarembski 0:01f31e923fe2 987 {
Pawel Zarembski 0:01f31e923fe2 988 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 989
Pawel Zarembski 0:01f31e923fe2 990 __ASM ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Pawel Zarembski 0:01f31e923fe2 991 return result;
Pawel Zarembski 0:01f31e923fe2 992 }
Pawel Zarembski 0:01f31e923fe2 993
Pawel Zarembski 0:01f31e923fe2 994
Pawel Zarembski 0:01f31e923fe2 995 /**
Pawel Zarembski 0:01f31e923fe2 996 \brief Reverse byte order (16 bit)
Pawel Zarembski 0:01f31e923fe2 997 \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
Pawel Zarembski 0:01f31e923fe2 998 \param [in] value Value to reverse
Pawel Zarembski 0:01f31e923fe2 999 \return Reversed value
Pawel Zarembski 0:01f31e923fe2 1000 */
Pawel Zarembski 0:01f31e923fe2 1001 __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
Pawel Zarembski 0:01f31e923fe2 1002 {
Pawel Zarembski 0:01f31e923fe2 1003 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Pawel Zarembski 0:01f31e923fe2 1004 return (int16_t)__builtin_bswap16(value);
Pawel Zarembski 0:01f31e923fe2 1005 #else
Pawel Zarembski 0:01f31e923fe2 1006 int16_t result;
Pawel Zarembski 0:01f31e923fe2 1007
Pawel Zarembski 0:01f31e923fe2 1008 __ASM ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Pawel Zarembski 0:01f31e923fe2 1009 return result;
Pawel Zarembski 0:01f31e923fe2 1010 #endif
Pawel Zarembski 0:01f31e923fe2 1011 }
Pawel Zarembski 0:01f31e923fe2 1012
Pawel Zarembski 0:01f31e923fe2 1013
Pawel Zarembski 0:01f31e923fe2 1014 /**
Pawel Zarembski 0:01f31e923fe2 1015 \brief Rotate Right in unsigned value (32 bit)
Pawel Zarembski 0:01f31e923fe2 1016 \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
Pawel Zarembski 0:01f31e923fe2 1017 \param [in] op1 Value to rotate
Pawel Zarembski 0:01f31e923fe2 1018 \param [in] op2 Number of Bits to rotate
Pawel Zarembski 0:01f31e923fe2 1019 \return Rotated value
Pawel Zarembski 0:01f31e923fe2 1020 */
Pawel Zarembski 0:01f31e923fe2 1021 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1022 {
Pawel Zarembski 0:01f31e923fe2 1023 op2 %= 32U;
Pawel Zarembski 0:01f31e923fe2 1024 if (op2 == 0U)
Pawel Zarembski 0:01f31e923fe2 1025 {
Pawel Zarembski 0:01f31e923fe2 1026 return op1;
Pawel Zarembski 0:01f31e923fe2 1027 }
Pawel Zarembski 0:01f31e923fe2 1028 return (op1 >> op2) | (op1 << (32U - op2));
Pawel Zarembski 0:01f31e923fe2 1029 }
Pawel Zarembski 0:01f31e923fe2 1030
Pawel Zarembski 0:01f31e923fe2 1031
Pawel Zarembski 0:01f31e923fe2 1032 /**
Pawel Zarembski 0:01f31e923fe2 1033 \brief Breakpoint
Pawel Zarembski 0:01f31e923fe2 1034 \details Causes the processor to enter Debug state.
Pawel Zarembski 0:01f31e923fe2 1035 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
Pawel Zarembski 0:01f31e923fe2 1036 \param [in] value is ignored by the processor.
Pawel Zarembski 0:01f31e923fe2 1037 If required, a debugger can use it to store additional information about the breakpoint.
Pawel Zarembski 0:01f31e923fe2 1038 */
Pawel Zarembski 0:01f31e923fe2 1039 #define __BKPT(value) __ASM volatile ("bkpt "#value)
Pawel Zarembski 0:01f31e923fe2 1040
Pawel Zarembski 0:01f31e923fe2 1041
Pawel Zarembski 0:01f31e923fe2 1042 /**
Pawel Zarembski 0:01f31e923fe2 1043 \brief Reverse bit order of value
Pawel Zarembski 0:01f31e923fe2 1044 \details Reverses the bit order of the given value.
Pawel Zarembski 0:01f31e923fe2 1045 \param [in] value Value to reverse
Pawel Zarembski 0:01f31e923fe2 1046 \return Reversed value
Pawel Zarembski 0:01f31e923fe2 1047 */
Pawel Zarembski 0:01f31e923fe2 1048 __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
Pawel Zarembski 0:01f31e923fe2 1049 {
Pawel Zarembski 0:01f31e923fe2 1050 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1051
Pawel Zarembski 0:01f31e923fe2 1052 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 1053 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 1054 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
Pawel Zarembski 0:01f31e923fe2 1055 __ASM ("rbit %0, %1" : "=r" (result) : "r" (value) );
Pawel Zarembski 0:01f31e923fe2 1056 #else
Pawel Zarembski 0:01f31e923fe2 1057 uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
Pawel Zarembski 0:01f31e923fe2 1058
Pawel Zarembski 0:01f31e923fe2 1059 result = value; /* r will be reversed bits of v; first get LSB of v */
Pawel Zarembski 0:01f31e923fe2 1060 for (value >>= 1U; value != 0U; value >>= 1U)
Pawel Zarembski 0:01f31e923fe2 1061 {
Pawel Zarembski 0:01f31e923fe2 1062 result <<= 1U;
Pawel Zarembski 0:01f31e923fe2 1063 result |= value & 1U;
Pawel Zarembski 0:01f31e923fe2 1064 s--;
Pawel Zarembski 0:01f31e923fe2 1065 }
Pawel Zarembski 0:01f31e923fe2 1066 result <<= s; /* shift when v's highest bits are zero */
Pawel Zarembski 0:01f31e923fe2 1067 #endif
Pawel Zarembski 0:01f31e923fe2 1068 return result;
Pawel Zarembski 0:01f31e923fe2 1069 }
Pawel Zarembski 0:01f31e923fe2 1070
Pawel Zarembski 0:01f31e923fe2 1071
Pawel Zarembski 0:01f31e923fe2 1072 /**
Pawel Zarembski 0:01f31e923fe2 1073 \brief Count leading zeros
Pawel Zarembski 0:01f31e923fe2 1074 \details Counts the number of leading zeros of a data value.
Pawel Zarembski 0:01f31e923fe2 1075 \param [in] value Value to count the leading zeros
Pawel Zarembski 0:01f31e923fe2 1076 \return number of leading zeros in value
Pawel Zarembski 0:01f31e923fe2 1077 */
Pawel Zarembski 0:01f31e923fe2 1078 __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
Pawel Zarembski 0:01f31e923fe2 1079 {
Pawel Zarembski 0:01f31e923fe2 1080 /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
Pawel Zarembski 0:01f31e923fe2 1081 __builtin_clz(0) is undefined behaviour, so handle this case specially.
Pawel Zarembski 0:01f31e923fe2 1082 This guarantees ARM-compatible results if happening to compile on a non-ARM
Pawel Zarembski 0:01f31e923fe2 1083 target, and ensures the compiler doesn't decide to activate any
Pawel Zarembski 0:01f31e923fe2 1084 optimisations using the logic "value was passed to __builtin_clz, so it
Pawel Zarembski 0:01f31e923fe2 1085 is non-zero".
Pawel Zarembski 0:01f31e923fe2 1086 ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a
Pawel Zarembski 0:01f31e923fe2 1087 single CLZ instruction.
Pawel Zarembski 0:01f31e923fe2 1088 */
Pawel Zarembski 0:01f31e923fe2 1089 if (value == 0U)
Pawel Zarembski 0:01f31e923fe2 1090 {
Pawel Zarembski 0:01f31e923fe2 1091 return 32U;
Pawel Zarembski 0:01f31e923fe2 1092 }
Pawel Zarembski 0:01f31e923fe2 1093 return __builtin_clz(value);
Pawel Zarembski 0:01f31e923fe2 1094 }
Pawel Zarembski 0:01f31e923fe2 1095
Pawel Zarembski 0:01f31e923fe2 1096
Pawel Zarembski 0:01f31e923fe2 1097 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 1098 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 1099 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 1100 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
Pawel Zarembski 0:01f31e923fe2 1101 /**
Pawel Zarembski 0:01f31e923fe2 1102 \brief LDR Exclusive (8 bit)
Pawel Zarembski 0:01f31e923fe2 1103 \details Executes a exclusive LDR instruction for 8 bit value.
Pawel Zarembski 0:01f31e923fe2 1104 \param [in] ptr Pointer to data
Pawel Zarembski 0:01f31e923fe2 1105 \return value of type uint8_t at (*ptr)
Pawel Zarembski 0:01f31e923fe2 1106 */
Pawel Zarembski 0:01f31e923fe2 1107 __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
Pawel Zarembski 0:01f31e923fe2 1108 {
Pawel Zarembski 0:01f31e923fe2 1109 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1110
Pawel Zarembski 0:01f31e923fe2 1111 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Pawel Zarembski 0:01f31e923fe2 1112 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
Pawel Zarembski 0:01f31e923fe2 1113 #else
Pawel Zarembski 0:01f31e923fe2 1114 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
Pawel Zarembski 0:01f31e923fe2 1115 accepted by assembler. So has to use following less efficient pattern.
Pawel Zarembski 0:01f31e923fe2 1116 */
Pawel Zarembski 0:01f31e923fe2 1117 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
Pawel Zarembski 0:01f31e923fe2 1118 #endif
Pawel Zarembski 0:01f31e923fe2 1119 return ((uint8_t) result); /* Add explicit type cast here */
Pawel Zarembski 0:01f31e923fe2 1120 }
Pawel Zarembski 0:01f31e923fe2 1121
Pawel Zarembski 0:01f31e923fe2 1122
Pawel Zarembski 0:01f31e923fe2 1123 /**
Pawel Zarembski 0:01f31e923fe2 1124 \brief LDR Exclusive (16 bit)
Pawel Zarembski 0:01f31e923fe2 1125 \details Executes a exclusive LDR instruction for 16 bit values.
Pawel Zarembski 0:01f31e923fe2 1126 \param [in] ptr Pointer to data
Pawel Zarembski 0:01f31e923fe2 1127 \return value of type uint16_t at (*ptr)
Pawel Zarembski 0:01f31e923fe2 1128 */
Pawel Zarembski 0:01f31e923fe2 1129 __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
Pawel Zarembski 0:01f31e923fe2 1130 {
Pawel Zarembski 0:01f31e923fe2 1131 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1132
Pawel Zarembski 0:01f31e923fe2 1133 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Pawel Zarembski 0:01f31e923fe2 1134 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
Pawel Zarembski 0:01f31e923fe2 1135 #else
Pawel Zarembski 0:01f31e923fe2 1136 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
Pawel Zarembski 0:01f31e923fe2 1137 accepted by assembler. So has to use following less efficient pattern.
Pawel Zarembski 0:01f31e923fe2 1138 */
Pawel Zarembski 0:01f31e923fe2 1139 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
Pawel Zarembski 0:01f31e923fe2 1140 #endif
Pawel Zarembski 0:01f31e923fe2 1141 return ((uint16_t) result); /* Add explicit type cast here */
Pawel Zarembski 0:01f31e923fe2 1142 }
Pawel Zarembski 0:01f31e923fe2 1143
Pawel Zarembski 0:01f31e923fe2 1144
Pawel Zarembski 0:01f31e923fe2 1145 /**
Pawel Zarembski 0:01f31e923fe2 1146 \brief LDR Exclusive (32 bit)
Pawel Zarembski 0:01f31e923fe2 1147 \details Executes a exclusive LDR instruction for 32 bit values.
Pawel Zarembski 0:01f31e923fe2 1148 \param [in] ptr Pointer to data
Pawel Zarembski 0:01f31e923fe2 1149 \return value of type uint32_t at (*ptr)
Pawel Zarembski 0:01f31e923fe2 1150 */
Pawel Zarembski 0:01f31e923fe2 1151 __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
Pawel Zarembski 0:01f31e923fe2 1152 {
Pawel Zarembski 0:01f31e923fe2 1153 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1154
Pawel Zarembski 0:01f31e923fe2 1155 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
Pawel Zarembski 0:01f31e923fe2 1156 return(result);
Pawel Zarembski 0:01f31e923fe2 1157 }
Pawel Zarembski 0:01f31e923fe2 1158
Pawel Zarembski 0:01f31e923fe2 1159
Pawel Zarembski 0:01f31e923fe2 1160 /**
Pawel Zarembski 0:01f31e923fe2 1161 \brief STR Exclusive (8 bit)
Pawel Zarembski 0:01f31e923fe2 1162 \details Executes a exclusive STR instruction for 8 bit values.
Pawel Zarembski 0:01f31e923fe2 1163 \param [in] value Value to store
Pawel Zarembski 0:01f31e923fe2 1164 \param [in] ptr Pointer to location
Pawel Zarembski 0:01f31e923fe2 1165 \return 0 Function succeeded
Pawel Zarembski 0:01f31e923fe2 1166 \return 1 Function failed
Pawel Zarembski 0:01f31e923fe2 1167 */
Pawel Zarembski 0:01f31e923fe2 1168 __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
Pawel Zarembski 0:01f31e923fe2 1169 {
Pawel Zarembski 0:01f31e923fe2 1170 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1171
Pawel Zarembski 0:01f31e923fe2 1172 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
Pawel Zarembski 0:01f31e923fe2 1173 return(result);
Pawel Zarembski 0:01f31e923fe2 1174 }
Pawel Zarembski 0:01f31e923fe2 1175
Pawel Zarembski 0:01f31e923fe2 1176
Pawel Zarembski 0:01f31e923fe2 1177 /**
Pawel Zarembski 0:01f31e923fe2 1178 \brief STR Exclusive (16 bit)
Pawel Zarembski 0:01f31e923fe2 1179 \details Executes a exclusive STR instruction for 16 bit values.
Pawel Zarembski 0:01f31e923fe2 1180 \param [in] value Value to store
Pawel Zarembski 0:01f31e923fe2 1181 \param [in] ptr Pointer to location
Pawel Zarembski 0:01f31e923fe2 1182 \return 0 Function succeeded
Pawel Zarembski 0:01f31e923fe2 1183 \return 1 Function failed
Pawel Zarembski 0:01f31e923fe2 1184 */
Pawel Zarembski 0:01f31e923fe2 1185 __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
Pawel Zarembski 0:01f31e923fe2 1186 {
Pawel Zarembski 0:01f31e923fe2 1187 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1188
Pawel Zarembski 0:01f31e923fe2 1189 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
Pawel Zarembski 0:01f31e923fe2 1190 return(result);
Pawel Zarembski 0:01f31e923fe2 1191 }
Pawel Zarembski 0:01f31e923fe2 1192
Pawel Zarembski 0:01f31e923fe2 1193
Pawel Zarembski 0:01f31e923fe2 1194 /**
Pawel Zarembski 0:01f31e923fe2 1195 \brief STR Exclusive (32 bit)
Pawel Zarembski 0:01f31e923fe2 1196 \details Executes a exclusive STR instruction for 32 bit values.
Pawel Zarembski 0:01f31e923fe2 1197 \param [in] value Value to store
Pawel Zarembski 0:01f31e923fe2 1198 \param [in] ptr Pointer to location
Pawel Zarembski 0:01f31e923fe2 1199 \return 0 Function succeeded
Pawel Zarembski 0:01f31e923fe2 1200 \return 1 Function failed
Pawel Zarembski 0:01f31e923fe2 1201 */
Pawel Zarembski 0:01f31e923fe2 1202 __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
Pawel Zarembski 0:01f31e923fe2 1203 {
Pawel Zarembski 0:01f31e923fe2 1204 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1205
Pawel Zarembski 0:01f31e923fe2 1206 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
Pawel Zarembski 0:01f31e923fe2 1207 return(result);
Pawel Zarembski 0:01f31e923fe2 1208 }
Pawel Zarembski 0:01f31e923fe2 1209
Pawel Zarembski 0:01f31e923fe2 1210
Pawel Zarembski 0:01f31e923fe2 1211 /**
Pawel Zarembski 0:01f31e923fe2 1212 \brief Remove the exclusive lock
Pawel Zarembski 0:01f31e923fe2 1213 \details Removes the exclusive lock which is created by LDREX.
Pawel Zarembski 0:01f31e923fe2 1214 */
Pawel Zarembski 0:01f31e923fe2 1215 __STATIC_FORCEINLINE void __CLREX(void)
Pawel Zarembski 0:01f31e923fe2 1216 {
Pawel Zarembski 0:01f31e923fe2 1217 __ASM volatile ("clrex" ::: "memory");
Pawel Zarembski 0:01f31e923fe2 1218 }
Pawel Zarembski 0:01f31e923fe2 1219
Pawel Zarembski 0:01f31e923fe2 1220 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 1221 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 1222 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 1223 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
Pawel Zarembski 0:01f31e923fe2 1224
Pawel Zarembski 0:01f31e923fe2 1225
Pawel Zarembski 0:01f31e923fe2 1226 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 1227 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 1228 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
Pawel Zarembski 0:01f31e923fe2 1229 /**
Pawel Zarembski 0:01f31e923fe2 1230 \brief Signed Saturate
Pawel Zarembski 0:01f31e923fe2 1231 \details Saturates a signed value.
Pawel Zarembski 0:01f31e923fe2 1232 \param [in] ARG1 Value to be saturated
Pawel Zarembski 0:01f31e923fe2 1233 \param [in] ARG2 Bit position to saturate to (1..32)
Pawel Zarembski 0:01f31e923fe2 1234 \return Saturated value
Pawel Zarembski 0:01f31e923fe2 1235 */
Pawel Zarembski 0:01f31e923fe2 1236 #define __SSAT(ARG1, ARG2) \
Pawel Zarembski 0:01f31e923fe2 1237 __extension__ \
Pawel Zarembski 0:01f31e923fe2 1238 ({ \
Pawel Zarembski 0:01f31e923fe2 1239 int32_t __RES, __ARG1 = (ARG1); \
Pawel Zarembski 0:01f31e923fe2 1240 __ASM volatile ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) : "cc" ); \
Pawel Zarembski 0:01f31e923fe2 1241 __RES; \
Pawel Zarembski 0:01f31e923fe2 1242 })
Pawel Zarembski 0:01f31e923fe2 1243
Pawel Zarembski 0:01f31e923fe2 1244
Pawel Zarembski 0:01f31e923fe2 1245 /**
Pawel Zarembski 0:01f31e923fe2 1246 \brief Unsigned Saturate
Pawel Zarembski 0:01f31e923fe2 1247 \details Saturates an unsigned value.
Pawel Zarembski 0:01f31e923fe2 1248 \param [in] ARG1 Value to be saturated
Pawel Zarembski 0:01f31e923fe2 1249 \param [in] ARG2 Bit position to saturate to (0..31)
Pawel Zarembski 0:01f31e923fe2 1250 \return Saturated value
Pawel Zarembski 0:01f31e923fe2 1251 */
Pawel Zarembski 0:01f31e923fe2 1252 #define __USAT(ARG1, ARG2) \
Pawel Zarembski 0:01f31e923fe2 1253 __extension__ \
Pawel Zarembski 0:01f31e923fe2 1254 ({ \
Pawel Zarembski 0:01f31e923fe2 1255 uint32_t __RES, __ARG1 = (ARG1); \
Pawel Zarembski 0:01f31e923fe2 1256 __ASM volatile ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) : "cc" ); \
Pawel Zarembski 0:01f31e923fe2 1257 __RES; \
Pawel Zarembski 0:01f31e923fe2 1258 })
Pawel Zarembski 0:01f31e923fe2 1259
Pawel Zarembski 0:01f31e923fe2 1260
Pawel Zarembski 0:01f31e923fe2 1261 /**
Pawel Zarembski 0:01f31e923fe2 1262 \brief Rotate Right with Extend (32 bit)
Pawel Zarembski 0:01f31e923fe2 1263 \details Moves each bit of a bitstring right by one bit.
Pawel Zarembski 0:01f31e923fe2 1264 The carry input is shifted in at the left end of the bitstring.
Pawel Zarembski 0:01f31e923fe2 1265 \param [in] value Value to rotate
Pawel Zarembski 0:01f31e923fe2 1266 \return Rotated value
Pawel Zarembski 0:01f31e923fe2 1267 */
Pawel Zarembski 0:01f31e923fe2 1268 __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
Pawel Zarembski 0:01f31e923fe2 1269 {
Pawel Zarembski 0:01f31e923fe2 1270 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1271
Pawel Zarembski 0:01f31e923fe2 1272 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Pawel Zarembski 0:01f31e923fe2 1273 return(result);
Pawel Zarembski 0:01f31e923fe2 1274 }
Pawel Zarembski 0:01f31e923fe2 1275
Pawel Zarembski 0:01f31e923fe2 1276
Pawel Zarembski 0:01f31e923fe2 1277 /**
Pawel Zarembski 0:01f31e923fe2 1278 \brief LDRT Unprivileged (8 bit)
Pawel Zarembski 0:01f31e923fe2 1279 \details Executes a Unprivileged LDRT instruction for 8 bit value.
Pawel Zarembski 0:01f31e923fe2 1280 \param [in] ptr Pointer to data
Pawel Zarembski 0:01f31e923fe2 1281 \return value of type uint8_t at (*ptr)
Pawel Zarembski 0:01f31e923fe2 1282 */
Pawel Zarembski 0:01f31e923fe2 1283 __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
Pawel Zarembski 0:01f31e923fe2 1284 {
Pawel Zarembski 0:01f31e923fe2 1285 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1286
Pawel Zarembski 0:01f31e923fe2 1287 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Pawel Zarembski 0:01f31e923fe2 1288 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
Pawel Zarembski 0:01f31e923fe2 1289 #else
Pawel Zarembski 0:01f31e923fe2 1290 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
Pawel Zarembski 0:01f31e923fe2 1291 accepted by assembler. So has to use following less efficient pattern.
Pawel Zarembski 0:01f31e923fe2 1292 */
Pawel Zarembski 0:01f31e923fe2 1293 __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
Pawel Zarembski 0:01f31e923fe2 1294 #endif
Pawel Zarembski 0:01f31e923fe2 1295 return ((uint8_t) result); /* Add explicit type cast here */
Pawel Zarembski 0:01f31e923fe2 1296 }
Pawel Zarembski 0:01f31e923fe2 1297
Pawel Zarembski 0:01f31e923fe2 1298
Pawel Zarembski 0:01f31e923fe2 1299 /**
Pawel Zarembski 0:01f31e923fe2 1300 \brief LDRT Unprivileged (16 bit)
Pawel Zarembski 0:01f31e923fe2 1301 \details Executes a Unprivileged LDRT instruction for 16 bit values.
Pawel Zarembski 0:01f31e923fe2 1302 \param [in] ptr Pointer to data
Pawel Zarembski 0:01f31e923fe2 1303 \return value of type uint16_t at (*ptr)
Pawel Zarembski 0:01f31e923fe2 1304 */
Pawel Zarembski 0:01f31e923fe2 1305 __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
Pawel Zarembski 0:01f31e923fe2 1306 {
Pawel Zarembski 0:01f31e923fe2 1307 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1308
Pawel Zarembski 0:01f31e923fe2 1309 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Pawel Zarembski 0:01f31e923fe2 1310 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
Pawel Zarembski 0:01f31e923fe2 1311 #else
Pawel Zarembski 0:01f31e923fe2 1312 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
Pawel Zarembski 0:01f31e923fe2 1313 accepted by assembler. So has to use following less efficient pattern.
Pawel Zarembski 0:01f31e923fe2 1314 */
Pawel Zarembski 0:01f31e923fe2 1315 __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
Pawel Zarembski 0:01f31e923fe2 1316 #endif
Pawel Zarembski 0:01f31e923fe2 1317 return ((uint16_t) result); /* Add explicit type cast here */
Pawel Zarembski 0:01f31e923fe2 1318 }
Pawel Zarembski 0:01f31e923fe2 1319
Pawel Zarembski 0:01f31e923fe2 1320
Pawel Zarembski 0:01f31e923fe2 1321 /**
Pawel Zarembski 0:01f31e923fe2 1322 \brief LDRT Unprivileged (32 bit)
Pawel Zarembski 0:01f31e923fe2 1323 \details Executes a Unprivileged LDRT instruction for 32 bit values.
Pawel Zarembski 0:01f31e923fe2 1324 \param [in] ptr Pointer to data
Pawel Zarembski 0:01f31e923fe2 1325 \return value of type uint32_t at (*ptr)
Pawel Zarembski 0:01f31e923fe2 1326 */
Pawel Zarembski 0:01f31e923fe2 1327 __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
Pawel Zarembski 0:01f31e923fe2 1328 {
Pawel Zarembski 0:01f31e923fe2 1329 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1330
Pawel Zarembski 0:01f31e923fe2 1331 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
Pawel Zarembski 0:01f31e923fe2 1332 return(result);
Pawel Zarembski 0:01f31e923fe2 1333 }
Pawel Zarembski 0:01f31e923fe2 1334
Pawel Zarembski 0:01f31e923fe2 1335
Pawel Zarembski 0:01f31e923fe2 1336 /**
Pawel Zarembski 0:01f31e923fe2 1337 \brief STRT Unprivileged (8 bit)
Pawel Zarembski 0:01f31e923fe2 1338 \details Executes a Unprivileged STRT instruction for 8 bit values.
Pawel Zarembski 0:01f31e923fe2 1339 \param [in] value Value to store
Pawel Zarembski 0:01f31e923fe2 1340 \param [in] ptr Pointer to location
Pawel Zarembski 0:01f31e923fe2 1341 */
Pawel Zarembski 0:01f31e923fe2 1342 __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
Pawel Zarembski 0:01f31e923fe2 1343 {
Pawel Zarembski 0:01f31e923fe2 1344 __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
Pawel Zarembski 0:01f31e923fe2 1345 }
Pawel Zarembski 0:01f31e923fe2 1346
Pawel Zarembski 0:01f31e923fe2 1347
Pawel Zarembski 0:01f31e923fe2 1348 /**
Pawel Zarembski 0:01f31e923fe2 1349 \brief STRT Unprivileged (16 bit)
Pawel Zarembski 0:01f31e923fe2 1350 \details Executes a Unprivileged STRT instruction for 16 bit values.
Pawel Zarembski 0:01f31e923fe2 1351 \param [in] value Value to store
Pawel Zarembski 0:01f31e923fe2 1352 \param [in] ptr Pointer to location
Pawel Zarembski 0:01f31e923fe2 1353 */
Pawel Zarembski 0:01f31e923fe2 1354 __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
Pawel Zarembski 0:01f31e923fe2 1355 {
Pawel Zarembski 0:01f31e923fe2 1356 __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
Pawel Zarembski 0:01f31e923fe2 1357 }
Pawel Zarembski 0:01f31e923fe2 1358
Pawel Zarembski 0:01f31e923fe2 1359
Pawel Zarembski 0:01f31e923fe2 1360 /**
Pawel Zarembski 0:01f31e923fe2 1361 \brief STRT Unprivileged (32 bit)
Pawel Zarembski 0:01f31e923fe2 1362 \details Executes a Unprivileged STRT instruction for 32 bit values.
Pawel Zarembski 0:01f31e923fe2 1363 \param [in] value Value to store
Pawel Zarembski 0:01f31e923fe2 1364 \param [in] ptr Pointer to location
Pawel Zarembski 0:01f31e923fe2 1365 */
Pawel Zarembski 0:01f31e923fe2 1366 __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
Pawel Zarembski 0:01f31e923fe2 1367 {
Pawel Zarembski 0:01f31e923fe2 1368 __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
Pawel Zarembski 0:01f31e923fe2 1369 }
Pawel Zarembski 0:01f31e923fe2 1370
Pawel Zarembski 0:01f31e923fe2 1371 #else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 1372 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 1373 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
Pawel Zarembski 0:01f31e923fe2 1374
Pawel Zarembski 0:01f31e923fe2 1375 /**
Pawel Zarembski 0:01f31e923fe2 1376 \brief Signed Saturate
Pawel Zarembski 0:01f31e923fe2 1377 \details Saturates a signed value.
Pawel Zarembski 0:01f31e923fe2 1378 \param [in] value Value to be saturated
Pawel Zarembski 0:01f31e923fe2 1379 \param [in] sat Bit position to saturate to (1..32)
Pawel Zarembski 0:01f31e923fe2 1380 \return Saturated value
Pawel Zarembski 0:01f31e923fe2 1381 */
Pawel Zarembski 0:01f31e923fe2 1382 __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
Pawel Zarembski 0:01f31e923fe2 1383 {
Pawel Zarembski 0:01f31e923fe2 1384 if ((sat >= 1U) && (sat <= 32U))
Pawel Zarembski 0:01f31e923fe2 1385 {
Pawel Zarembski 0:01f31e923fe2 1386 const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
Pawel Zarembski 0:01f31e923fe2 1387 const int32_t min = -1 - max ;
Pawel Zarembski 0:01f31e923fe2 1388 if (val > max)
Pawel Zarembski 0:01f31e923fe2 1389 {
Pawel Zarembski 0:01f31e923fe2 1390 return max;
Pawel Zarembski 0:01f31e923fe2 1391 }
Pawel Zarembski 0:01f31e923fe2 1392 else if (val < min)
Pawel Zarembski 0:01f31e923fe2 1393 {
Pawel Zarembski 0:01f31e923fe2 1394 return min;
Pawel Zarembski 0:01f31e923fe2 1395 }
Pawel Zarembski 0:01f31e923fe2 1396 }
Pawel Zarembski 0:01f31e923fe2 1397 return val;
Pawel Zarembski 0:01f31e923fe2 1398 }
Pawel Zarembski 0:01f31e923fe2 1399
Pawel Zarembski 0:01f31e923fe2 1400 /**
Pawel Zarembski 0:01f31e923fe2 1401 \brief Unsigned Saturate
Pawel Zarembski 0:01f31e923fe2 1402 \details Saturates an unsigned value.
Pawel Zarembski 0:01f31e923fe2 1403 \param [in] value Value to be saturated
Pawel Zarembski 0:01f31e923fe2 1404 \param [in] sat Bit position to saturate to (0..31)
Pawel Zarembski 0:01f31e923fe2 1405 \return Saturated value
Pawel Zarembski 0:01f31e923fe2 1406 */
Pawel Zarembski 0:01f31e923fe2 1407 __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
Pawel Zarembski 0:01f31e923fe2 1408 {
Pawel Zarembski 0:01f31e923fe2 1409 if (sat <= 31U)
Pawel Zarembski 0:01f31e923fe2 1410 {
Pawel Zarembski 0:01f31e923fe2 1411 const uint32_t max = ((1U << sat) - 1U);
Pawel Zarembski 0:01f31e923fe2 1412 if (val > (int32_t)max)
Pawel Zarembski 0:01f31e923fe2 1413 {
Pawel Zarembski 0:01f31e923fe2 1414 return max;
Pawel Zarembski 0:01f31e923fe2 1415 }
Pawel Zarembski 0:01f31e923fe2 1416 else if (val < 0)
Pawel Zarembski 0:01f31e923fe2 1417 {
Pawel Zarembski 0:01f31e923fe2 1418 return 0U;
Pawel Zarembski 0:01f31e923fe2 1419 }
Pawel Zarembski 0:01f31e923fe2 1420 }
Pawel Zarembski 0:01f31e923fe2 1421 return (uint32_t)val;
Pawel Zarembski 0:01f31e923fe2 1422 }
Pawel Zarembski 0:01f31e923fe2 1423
Pawel Zarembski 0:01f31e923fe2 1424 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 1425 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 1426 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
Pawel Zarembski 0:01f31e923fe2 1427
Pawel Zarembski 0:01f31e923fe2 1428
Pawel Zarembski 0:01f31e923fe2 1429 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 1430 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
Pawel Zarembski 0:01f31e923fe2 1431 /**
Pawel Zarembski 0:01f31e923fe2 1432 \brief Load-Acquire (8 bit)
Pawel Zarembski 0:01f31e923fe2 1433 \details Executes a LDAB instruction for 8 bit value.
Pawel Zarembski 0:01f31e923fe2 1434 \param [in] ptr Pointer to data
Pawel Zarembski 0:01f31e923fe2 1435 \return value of type uint8_t at (*ptr)
Pawel Zarembski 0:01f31e923fe2 1436 */
Pawel Zarembski 0:01f31e923fe2 1437 __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
Pawel Zarembski 0:01f31e923fe2 1438 {
Pawel Zarembski 0:01f31e923fe2 1439 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1440
Pawel Zarembski 0:01f31e923fe2 1441 __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
Pawel Zarembski 0:01f31e923fe2 1442 return ((uint8_t) result);
Pawel Zarembski 0:01f31e923fe2 1443 }
Pawel Zarembski 0:01f31e923fe2 1444
Pawel Zarembski 0:01f31e923fe2 1445
Pawel Zarembski 0:01f31e923fe2 1446 /**
Pawel Zarembski 0:01f31e923fe2 1447 \brief Load-Acquire (16 bit)
Pawel Zarembski 0:01f31e923fe2 1448 \details Executes a LDAH instruction for 16 bit values.
Pawel Zarembski 0:01f31e923fe2 1449 \param [in] ptr Pointer to data
Pawel Zarembski 0:01f31e923fe2 1450 \return value of type uint16_t at (*ptr)
Pawel Zarembski 0:01f31e923fe2 1451 */
Pawel Zarembski 0:01f31e923fe2 1452 __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
Pawel Zarembski 0:01f31e923fe2 1453 {
Pawel Zarembski 0:01f31e923fe2 1454 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1455
Pawel Zarembski 0:01f31e923fe2 1456 __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
Pawel Zarembski 0:01f31e923fe2 1457 return ((uint16_t) result);
Pawel Zarembski 0:01f31e923fe2 1458 }
Pawel Zarembski 0:01f31e923fe2 1459
Pawel Zarembski 0:01f31e923fe2 1460
Pawel Zarembski 0:01f31e923fe2 1461 /**
Pawel Zarembski 0:01f31e923fe2 1462 \brief Load-Acquire (32 bit)
Pawel Zarembski 0:01f31e923fe2 1463 \details Executes a LDA instruction for 32 bit values.
Pawel Zarembski 0:01f31e923fe2 1464 \param [in] ptr Pointer to data
Pawel Zarembski 0:01f31e923fe2 1465 \return value of type uint32_t at (*ptr)
Pawel Zarembski 0:01f31e923fe2 1466 */
Pawel Zarembski 0:01f31e923fe2 1467 __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
Pawel Zarembski 0:01f31e923fe2 1468 {
Pawel Zarembski 0:01f31e923fe2 1469 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1470
Pawel Zarembski 0:01f31e923fe2 1471 __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
Pawel Zarembski 0:01f31e923fe2 1472 return(result);
Pawel Zarembski 0:01f31e923fe2 1473 }
Pawel Zarembski 0:01f31e923fe2 1474
Pawel Zarembski 0:01f31e923fe2 1475
Pawel Zarembski 0:01f31e923fe2 1476 /**
Pawel Zarembski 0:01f31e923fe2 1477 \brief Store-Release (8 bit)
Pawel Zarembski 0:01f31e923fe2 1478 \details Executes a STLB instruction for 8 bit values.
Pawel Zarembski 0:01f31e923fe2 1479 \param [in] value Value to store
Pawel Zarembski 0:01f31e923fe2 1480 \param [in] ptr Pointer to location
Pawel Zarembski 0:01f31e923fe2 1481 */
Pawel Zarembski 0:01f31e923fe2 1482 __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
Pawel Zarembski 0:01f31e923fe2 1483 {
Pawel Zarembski 0:01f31e923fe2 1484 __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
Pawel Zarembski 0:01f31e923fe2 1485 }
Pawel Zarembski 0:01f31e923fe2 1486
Pawel Zarembski 0:01f31e923fe2 1487
Pawel Zarembski 0:01f31e923fe2 1488 /**
Pawel Zarembski 0:01f31e923fe2 1489 \brief Store-Release (16 bit)
Pawel Zarembski 0:01f31e923fe2 1490 \details Executes a STLH instruction for 16 bit values.
Pawel Zarembski 0:01f31e923fe2 1491 \param [in] value Value to store
Pawel Zarembski 0:01f31e923fe2 1492 \param [in] ptr Pointer to location
Pawel Zarembski 0:01f31e923fe2 1493 */
Pawel Zarembski 0:01f31e923fe2 1494 __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
Pawel Zarembski 0:01f31e923fe2 1495 {
Pawel Zarembski 0:01f31e923fe2 1496 __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
Pawel Zarembski 0:01f31e923fe2 1497 }
Pawel Zarembski 0:01f31e923fe2 1498
Pawel Zarembski 0:01f31e923fe2 1499
Pawel Zarembski 0:01f31e923fe2 1500 /**
Pawel Zarembski 0:01f31e923fe2 1501 \brief Store-Release (32 bit)
Pawel Zarembski 0:01f31e923fe2 1502 \details Executes a STL instruction for 32 bit values.
Pawel Zarembski 0:01f31e923fe2 1503 \param [in] value Value to store
Pawel Zarembski 0:01f31e923fe2 1504 \param [in] ptr Pointer to location
Pawel Zarembski 0:01f31e923fe2 1505 */
Pawel Zarembski 0:01f31e923fe2 1506 __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
Pawel Zarembski 0:01f31e923fe2 1507 {
Pawel Zarembski 0:01f31e923fe2 1508 __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
Pawel Zarembski 0:01f31e923fe2 1509 }
Pawel Zarembski 0:01f31e923fe2 1510
Pawel Zarembski 0:01f31e923fe2 1511
Pawel Zarembski 0:01f31e923fe2 1512 /**
Pawel Zarembski 0:01f31e923fe2 1513 \brief Load-Acquire Exclusive (8 bit)
Pawel Zarembski 0:01f31e923fe2 1514 \details Executes a LDAB exclusive instruction for 8 bit value.
Pawel Zarembski 0:01f31e923fe2 1515 \param [in] ptr Pointer to data
Pawel Zarembski 0:01f31e923fe2 1516 \return value of type uint8_t at (*ptr)
Pawel Zarembski 0:01f31e923fe2 1517 */
Pawel Zarembski 0:01f31e923fe2 1518 __STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
Pawel Zarembski 0:01f31e923fe2 1519 {
Pawel Zarembski 0:01f31e923fe2 1520 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1521
Pawel Zarembski 0:01f31e923fe2 1522 __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
Pawel Zarembski 0:01f31e923fe2 1523 return ((uint8_t) result);
Pawel Zarembski 0:01f31e923fe2 1524 }
Pawel Zarembski 0:01f31e923fe2 1525
Pawel Zarembski 0:01f31e923fe2 1526
Pawel Zarembski 0:01f31e923fe2 1527 /**
Pawel Zarembski 0:01f31e923fe2 1528 \brief Load-Acquire Exclusive (16 bit)
Pawel Zarembski 0:01f31e923fe2 1529 \details Executes a LDAH exclusive instruction for 16 bit values.
Pawel Zarembski 0:01f31e923fe2 1530 \param [in] ptr Pointer to data
Pawel Zarembski 0:01f31e923fe2 1531 \return value of type uint16_t at (*ptr)
Pawel Zarembski 0:01f31e923fe2 1532 */
Pawel Zarembski 0:01f31e923fe2 1533 __STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
Pawel Zarembski 0:01f31e923fe2 1534 {
Pawel Zarembski 0:01f31e923fe2 1535 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1536
Pawel Zarembski 0:01f31e923fe2 1537 __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
Pawel Zarembski 0:01f31e923fe2 1538 return ((uint16_t) result);
Pawel Zarembski 0:01f31e923fe2 1539 }
Pawel Zarembski 0:01f31e923fe2 1540
Pawel Zarembski 0:01f31e923fe2 1541
Pawel Zarembski 0:01f31e923fe2 1542 /**
Pawel Zarembski 0:01f31e923fe2 1543 \brief Load-Acquire Exclusive (32 bit)
Pawel Zarembski 0:01f31e923fe2 1544 \details Executes a LDA exclusive instruction for 32 bit values.
Pawel Zarembski 0:01f31e923fe2 1545 \param [in] ptr Pointer to data
Pawel Zarembski 0:01f31e923fe2 1546 \return value of type uint32_t at (*ptr)
Pawel Zarembski 0:01f31e923fe2 1547 */
Pawel Zarembski 0:01f31e923fe2 1548 __STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr)
Pawel Zarembski 0:01f31e923fe2 1549 {
Pawel Zarembski 0:01f31e923fe2 1550 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1551
Pawel Zarembski 0:01f31e923fe2 1552 __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
Pawel Zarembski 0:01f31e923fe2 1553 return(result);
Pawel Zarembski 0:01f31e923fe2 1554 }
Pawel Zarembski 0:01f31e923fe2 1555
Pawel Zarembski 0:01f31e923fe2 1556
Pawel Zarembski 0:01f31e923fe2 1557 /**
Pawel Zarembski 0:01f31e923fe2 1558 \brief Store-Release Exclusive (8 bit)
Pawel Zarembski 0:01f31e923fe2 1559 \details Executes a STLB exclusive instruction for 8 bit values.
Pawel Zarembski 0:01f31e923fe2 1560 \param [in] value Value to store
Pawel Zarembski 0:01f31e923fe2 1561 \param [in] ptr Pointer to location
Pawel Zarembski 0:01f31e923fe2 1562 \return 0 Function succeeded
Pawel Zarembski 0:01f31e923fe2 1563 \return 1 Function failed
Pawel Zarembski 0:01f31e923fe2 1564 */
Pawel Zarembski 0:01f31e923fe2 1565 __STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
Pawel Zarembski 0:01f31e923fe2 1566 {
Pawel Zarembski 0:01f31e923fe2 1567 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1568
Pawel Zarembski 0:01f31e923fe2 1569 __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
Pawel Zarembski 0:01f31e923fe2 1570 return(result);
Pawel Zarembski 0:01f31e923fe2 1571 }
Pawel Zarembski 0:01f31e923fe2 1572
Pawel Zarembski 0:01f31e923fe2 1573
Pawel Zarembski 0:01f31e923fe2 1574 /**
Pawel Zarembski 0:01f31e923fe2 1575 \brief Store-Release Exclusive (16 bit)
Pawel Zarembski 0:01f31e923fe2 1576 \details Executes a STLH exclusive instruction for 16 bit values.
Pawel Zarembski 0:01f31e923fe2 1577 \param [in] value Value to store
Pawel Zarembski 0:01f31e923fe2 1578 \param [in] ptr Pointer to location
Pawel Zarembski 0:01f31e923fe2 1579 \return 0 Function succeeded
Pawel Zarembski 0:01f31e923fe2 1580 \return 1 Function failed
Pawel Zarembski 0:01f31e923fe2 1581 */
Pawel Zarembski 0:01f31e923fe2 1582 __STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
Pawel Zarembski 0:01f31e923fe2 1583 {
Pawel Zarembski 0:01f31e923fe2 1584 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1585
Pawel Zarembski 0:01f31e923fe2 1586 __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
Pawel Zarembski 0:01f31e923fe2 1587 return(result);
Pawel Zarembski 0:01f31e923fe2 1588 }
Pawel Zarembski 0:01f31e923fe2 1589
Pawel Zarembski 0:01f31e923fe2 1590
Pawel Zarembski 0:01f31e923fe2 1591 /**
Pawel Zarembski 0:01f31e923fe2 1592 \brief Store-Release Exclusive (32 bit)
Pawel Zarembski 0:01f31e923fe2 1593 \details Executes a STL exclusive instruction for 32 bit values.
Pawel Zarembski 0:01f31e923fe2 1594 \param [in] value Value to store
Pawel Zarembski 0:01f31e923fe2 1595 \param [in] ptr Pointer to location
Pawel Zarembski 0:01f31e923fe2 1596 \return 0 Function succeeded
Pawel Zarembski 0:01f31e923fe2 1597 \return 1 Function failed
Pawel Zarembski 0:01f31e923fe2 1598 */
Pawel Zarembski 0:01f31e923fe2 1599 __STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
Pawel Zarembski 0:01f31e923fe2 1600 {
Pawel Zarembski 0:01f31e923fe2 1601 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1602
Pawel Zarembski 0:01f31e923fe2 1603 __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
Pawel Zarembski 0:01f31e923fe2 1604 return(result);
Pawel Zarembski 0:01f31e923fe2 1605 }
Pawel Zarembski 0:01f31e923fe2 1606
Pawel Zarembski 0:01f31e923fe2 1607 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
Pawel Zarembski 0:01f31e923fe2 1608 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
Pawel Zarembski 0:01f31e923fe2 1609
Pawel Zarembski 0:01f31e923fe2 1610 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
Pawel Zarembski 0:01f31e923fe2 1611
Pawel Zarembski 0:01f31e923fe2 1612
Pawel Zarembski 0:01f31e923fe2 1613 /* ################### Compiler specific Intrinsics ########################### */
Pawel Zarembski 0:01f31e923fe2 1614 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
Pawel Zarembski 0:01f31e923fe2 1615 Access to dedicated SIMD instructions
Pawel Zarembski 0:01f31e923fe2 1616 @{
Pawel Zarembski 0:01f31e923fe2 1617 */
Pawel Zarembski 0:01f31e923fe2 1618
Pawel Zarembski 0:01f31e923fe2 1619 #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
Pawel Zarembski 0:01f31e923fe2 1620
Pawel Zarembski 0:01f31e923fe2 1621 __STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1622 {
Pawel Zarembski 0:01f31e923fe2 1623 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1624
Pawel Zarembski 0:01f31e923fe2 1625 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1626 return(result);
Pawel Zarembski 0:01f31e923fe2 1627 }
Pawel Zarembski 0:01f31e923fe2 1628
Pawel Zarembski 0:01f31e923fe2 1629 __STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1630 {
Pawel Zarembski 0:01f31e923fe2 1631 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1632
Pawel Zarembski 0:01f31e923fe2 1633 __ASM ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1634 return(result);
Pawel Zarembski 0:01f31e923fe2 1635 }
Pawel Zarembski 0:01f31e923fe2 1636
Pawel Zarembski 0:01f31e923fe2 1637 __STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1638 {
Pawel Zarembski 0:01f31e923fe2 1639 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1640
Pawel Zarembski 0:01f31e923fe2 1641 __ASM ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1642 return(result);
Pawel Zarembski 0:01f31e923fe2 1643 }
Pawel Zarembski 0:01f31e923fe2 1644
Pawel Zarembski 0:01f31e923fe2 1645 __STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1646 {
Pawel Zarembski 0:01f31e923fe2 1647 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1648
Pawel Zarembski 0:01f31e923fe2 1649 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1650 return(result);
Pawel Zarembski 0:01f31e923fe2 1651 }
Pawel Zarembski 0:01f31e923fe2 1652
Pawel Zarembski 0:01f31e923fe2 1653 __STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1654 {
Pawel Zarembski 0:01f31e923fe2 1655 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1656
Pawel Zarembski 0:01f31e923fe2 1657 __ASM ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1658 return(result);
Pawel Zarembski 0:01f31e923fe2 1659 }
Pawel Zarembski 0:01f31e923fe2 1660
Pawel Zarembski 0:01f31e923fe2 1661 __STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1662 {
Pawel Zarembski 0:01f31e923fe2 1663 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1664
Pawel Zarembski 0:01f31e923fe2 1665 __ASM ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1666 return(result);
Pawel Zarembski 0:01f31e923fe2 1667 }
Pawel Zarembski 0:01f31e923fe2 1668
Pawel Zarembski 0:01f31e923fe2 1669
Pawel Zarembski 0:01f31e923fe2 1670 __STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1671 {
Pawel Zarembski 0:01f31e923fe2 1672 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1673
Pawel Zarembski 0:01f31e923fe2 1674 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1675 return(result);
Pawel Zarembski 0:01f31e923fe2 1676 }
Pawel Zarembski 0:01f31e923fe2 1677
Pawel Zarembski 0:01f31e923fe2 1678 __STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1679 {
Pawel Zarembski 0:01f31e923fe2 1680 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1681
Pawel Zarembski 0:01f31e923fe2 1682 __ASM ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1683 return(result);
Pawel Zarembski 0:01f31e923fe2 1684 }
Pawel Zarembski 0:01f31e923fe2 1685
Pawel Zarembski 0:01f31e923fe2 1686 __STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1687 {
Pawel Zarembski 0:01f31e923fe2 1688 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1689
Pawel Zarembski 0:01f31e923fe2 1690 __ASM ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1691 return(result);
Pawel Zarembski 0:01f31e923fe2 1692 }
Pawel Zarembski 0:01f31e923fe2 1693
Pawel Zarembski 0:01f31e923fe2 1694 __STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1695 {
Pawel Zarembski 0:01f31e923fe2 1696 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1697
Pawel Zarembski 0:01f31e923fe2 1698 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1699 return(result);
Pawel Zarembski 0:01f31e923fe2 1700 }
Pawel Zarembski 0:01f31e923fe2 1701
Pawel Zarembski 0:01f31e923fe2 1702 __STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1703 {
Pawel Zarembski 0:01f31e923fe2 1704 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1705
Pawel Zarembski 0:01f31e923fe2 1706 __ASM ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1707 return(result);
Pawel Zarembski 0:01f31e923fe2 1708 }
Pawel Zarembski 0:01f31e923fe2 1709
Pawel Zarembski 0:01f31e923fe2 1710 __STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1711 {
Pawel Zarembski 0:01f31e923fe2 1712 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1713
Pawel Zarembski 0:01f31e923fe2 1714 __ASM ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1715 return(result);
Pawel Zarembski 0:01f31e923fe2 1716 }
Pawel Zarembski 0:01f31e923fe2 1717
Pawel Zarembski 0:01f31e923fe2 1718
Pawel Zarembski 0:01f31e923fe2 1719 __STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1720 {
Pawel Zarembski 0:01f31e923fe2 1721 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1722
Pawel Zarembski 0:01f31e923fe2 1723 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1724 return(result);
Pawel Zarembski 0:01f31e923fe2 1725 }
Pawel Zarembski 0:01f31e923fe2 1726
Pawel Zarembski 0:01f31e923fe2 1727 __STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1728 {
Pawel Zarembski 0:01f31e923fe2 1729 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1730
Pawel Zarembski 0:01f31e923fe2 1731 __ASM ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1732 return(result);
Pawel Zarembski 0:01f31e923fe2 1733 }
Pawel Zarembski 0:01f31e923fe2 1734
Pawel Zarembski 0:01f31e923fe2 1735 __STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1736 {
Pawel Zarembski 0:01f31e923fe2 1737 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1738
Pawel Zarembski 0:01f31e923fe2 1739 __ASM ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1740 return(result);
Pawel Zarembski 0:01f31e923fe2 1741 }
Pawel Zarembski 0:01f31e923fe2 1742
Pawel Zarembski 0:01f31e923fe2 1743 __STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1744 {
Pawel Zarembski 0:01f31e923fe2 1745 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1746
Pawel Zarembski 0:01f31e923fe2 1747 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1748 return(result);
Pawel Zarembski 0:01f31e923fe2 1749 }
Pawel Zarembski 0:01f31e923fe2 1750
Pawel Zarembski 0:01f31e923fe2 1751 __STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1752 {
Pawel Zarembski 0:01f31e923fe2 1753 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1754
Pawel Zarembski 0:01f31e923fe2 1755 __ASM ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1756 return(result);
Pawel Zarembski 0:01f31e923fe2 1757 }
Pawel Zarembski 0:01f31e923fe2 1758
Pawel Zarembski 0:01f31e923fe2 1759 __STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1760 {
Pawel Zarembski 0:01f31e923fe2 1761 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1762
Pawel Zarembski 0:01f31e923fe2 1763 __ASM ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1764 return(result);
Pawel Zarembski 0:01f31e923fe2 1765 }
Pawel Zarembski 0:01f31e923fe2 1766
Pawel Zarembski 0:01f31e923fe2 1767 __STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1768 {
Pawel Zarembski 0:01f31e923fe2 1769 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1770
Pawel Zarembski 0:01f31e923fe2 1771 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1772 return(result);
Pawel Zarembski 0:01f31e923fe2 1773 }
Pawel Zarembski 0:01f31e923fe2 1774
Pawel Zarembski 0:01f31e923fe2 1775 __STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1776 {
Pawel Zarembski 0:01f31e923fe2 1777 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1778
Pawel Zarembski 0:01f31e923fe2 1779 __ASM ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1780 return(result);
Pawel Zarembski 0:01f31e923fe2 1781 }
Pawel Zarembski 0:01f31e923fe2 1782
Pawel Zarembski 0:01f31e923fe2 1783 __STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1784 {
Pawel Zarembski 0:01f31e923fe2 1785 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1786
Pawel Zarembski 0:01f31e923fe2 1787 __ASM ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1788 return(result);
Pawel Zarembski 0:01f31e923fe2 1789 }
Pawel Zarembski 0:01f31e923fe2 1790
Pawel Zarembski 0:01f31e923fe2 1791 __STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1792 {
Pawel Zarembski 0:01f31e923fe2 1793 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1794
Pawel Zarembski 0:01f31e923fe2 1795 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1796 return(result);
Pawel Zarembski 0:01f31e923fe2 1797 }
Pawel Zarembski 0:01f31e923fe2 1798
Pawel Zarembski 0:01f31e923fe2 1799 __STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1800 {
Pawel Zarembski 0:01f31e923fe2 1801 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1802
Pawel Zarembski 0:01f31e923fe2 1803 __ASM ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1804 return(result);
Pawel Zarembski 0:01f31e923fe2 1805 }
Pawel Zarembski 0:01f31e923fe2 1806
Pawel Zarembski 0:01f31e923fe2 1807 __STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1808 {
Pawel Zarembski 0:01f31e923fe2 1809 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1810
Pawel Zarembski 0:01f31e923fe2 1811 __ASM ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1812 return(result);
Pawel Zarembski 0:01f31e923fe2 1813 }
Pawel Zarembski 0:01f31e923fe2 1814
Pawel Zarembski 0:01f31e923fe2 1815 __STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1816 {
Pawel Zarembski 0:01f31e923fe2 1817 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1818
Pawel Zarembski 0:01f31e923fe2 1819 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1820 return(result);
Pawel Zarembski 0:01f31e923fe2 1821 }
Pawel Zarembski 0:01f31e923fe2 1822
Pawel Zarembski 0:01f31e923fe2 1823 __STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1824 {
Pawel Zarembski 0:01f31e923fe2 1825 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1826
Pawel Zarembski 0:01f31e923fe2 1827 __ASM ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1828 return(result);
Pawel Zarembski 0:01f31e923fe2 1829 }
Pawel Zarembski 0:01f31e923fe2 1830
Pawel Zarembski 0:01f31e923fe2 1831 __STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1832 {
Pawel Zarembski 0:01f31e923fe2 1833 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1834
Pawel Zarembski 0:01f31e923fe2 1835 __ASM ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1836 return(result);
Pawel Zarembski 0:01f31e923fe2 1837 }
Pawel Zarembski 0:01f31e923fe2 1838
Pawel Zarembski 0:01f31e923fe2 1839 __STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1840 {
Pawel Zarembski 0:01f31e923fe2 1841 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1842
Pawel Zarembski 0:01f31e923fe2 1843 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1844 return(result);
Pawel Zarembski 0:01f31e923fe2 1845 }
Pawel Zarembski 0:01f31e923fe2 1846
Pawel Zarembski 0:01f31e923fe2 1847 __STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1848 {
Pawel Zarembski 0:01f31e923fe2 1849 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1850
Pawel Zarembski 0:01f31e923fe2 1851 __ASM ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1852 return(result);
Pawel Zarembski 0:01f31e923fe2 1853 }
Pawel Zarembski 0:01f31e923fe2 1854
Pawel Zarembski 0:01f31e923fe2 1855 __STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1856 {
Pawel Zarembski 0:01f31e923fe2 1857 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1858
Pawel Zarembski 0:01f31e923fe2 1859 __ASM ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1860 return(result);
Pawel Zarembski 0:01f31e923fe2 1861 }
Pawel Zarembski 0:01f31e923fe2 1862
Pawel Zarembski 0:01f31e923fe2 1863 __STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1864 {
Pawel Zarembski 0:01f31e923fe2 1865 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1866
Pawel Zarembski 0:01f31e923fe2 1867 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1868 return(result);
Pawel Zarembski 0:01f31e923fe2 1869 }
Pawel Zarembski 0:01f31e923fe2 1870
Pawel Zarembski 0:01f31e923fe2 1871 __STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1872 {
Pawel Zarembski 0:01f31e923fe2 1873 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1874
Pawel Zarembski 0:01f31e923fe2 1875 __ASM ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1876 return(result);
Pawel Zarembski 0:01f31e923fe2 1877 }
Pawel Zarembski 0:01f31e923fe2 1878
Pawel Zarembski 0:01f31e923fe2 1879 __STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1880 {
Pawel Zarembski 0:01f31e923fe2 1881 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1882
Pawel Zarembski 0:01f31e923fe2 1883 __ASM ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1884 return(result);
Pawel Zarembski 0:01f31e923fe2 1885 }
Pawel Zarembski 0:01f31e923fe2 1886
Pawel Zarembski 0:01f31e923fe2 1887 __STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1888 {
Pawel Zarembski 0:01f31e923fe2 1889 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1890
Pawel Zarembski 0:01f31e923fe2 1891 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1892 return(result);
Pawel Zarembski 0:01f31e923fe2 1893 }
Pawel Zarembski 0:01f31e923fe2 1894
Pawel Zarembski 0:01f31e923fe2 1895 __STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1896 {
Pawel Zarembski 0:01f31e923fe2 1897 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1898
Pawel Zarembski 0:01f31e923fe2 1899 __ASM ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1900 return(result);
Pawel Zarembski 0:01f31e923fe2 1901 }
Pawel Zarembski 0:01f31e923fe2 1902
Pawel Zarembski 0:01f31e923fe2 1903 __STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1904 {
Pawel Zarembski 0:01f31e923fe2 1905 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1906
Pawel Zarembski 0:01f31e923fe2 1907 __ASM ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1908 return(result);
Pawel Zarembski 0:01f31e923fe2 1909 }
Pawel Zarembski 0:01f31e923fe2 1910
Pawel Zarembski 0:01f31e923fe2 1911 __STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1912 {
Pawel Zarembski 0:01f31e923fe2 1913 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1914
Pawel Zarembski 0:01f31e923fe2 1915 __ASM ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1916 return(result);
Pawel Zarembski 0:01f31e923fe2 1917 }
Pawel Zarembski 0:01f31e923fe2 1918
Pawel Zarembski 0:01f31e923fe2 1919 __STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
Pawel Zarembski 0:01f31e923fe2 1920 {
Pawel Zarembski 0:01f31e923fe2 1921 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1922
Pawel Zarembski 0:01f31e923fe2 1923 __ASM ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
Pawel Zarembski 0:01f31e923fe2 1924 return(result);
Pawel Zarembski 0:01f31e923fe2 1925 }
Pawel Zarembski 0:01f31e923fe2 1926
Pawel Zarembski 0:01f31e923fe2 1927 #define __SSAT16(ARG1, ARG2) \
Pawel Zarembski 0:01f31e923fe2 1928 ({ \
Pawel Zarembski 0:01f31e923fe2 1929 int32_t __RES, __ARG1 = (ARG1); \
Pawel Zarembski 0:01f31e923fe2 1930 __ASM volatile ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) : "cc" ); \
Pawel Zarembski 0:01f31e923fe2 1931 __RES; \
Pawel Zarembski 0:01f31e923fe2 1932 })
Pawel Zarembski 0:01f31e923fe2 1933
Pawel Zarembski 0:01f31e923fe2 1934 #define __USAT16(ARG1, ARG2) \
Pawel Zarembski 0:01f31e923fe2 1935 ({ \
Pawel Zarembski 0:01f31e923fe2 1936 uint32_t __RES, __ARG1 = (ARG1); \
Pawel Zarembski 0:01f31e923fe2 1937 __ASM volatile ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) : "cc" ); \
Pawel Zarembski 0:01f31e923fe2 1938 __RES; \
Pawel Zarembski 0:01f31e923fe2 1939 })
Pawel Zarembski 0:01f31e923fe2 1940
Pawel Zarembski 0:01f31e923fe2 1941 __STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
Pawel Zarembski 0:01f31e923fe2 1942 {
Pawel Zarembski 0:01f31e923fe2 1943 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1944
Pawel Zarembski 0:01f31e923fe2 1945 __ASM ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
Pawel Zarembski 0:01f31e923fe2 1946 return(result);
Pawel Zarembski 0:01f31e923fe2 1947 }
Pawel Zarembski 0:01f31e923fe2 1948
Pawel Zarembski 0:01f31e923fe2 1949 __STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1950 {
Pawel Zarembski 0:01f31e923fe2 1951 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1952
Pawel Zarembski 0:01f31e923fe2 1953 __ASM ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1954 return(result);
Pawel Zarembski 0:01f31e923fe2 1955 }
Pawel Zarembski 0:01f31e923fe2 1956
Pawel Zarembski 0:01f31e923fe2 1957 __STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
Pawel Zarembski 0:01f31e923fe2 1958 {
Pawel Zarembski 0:01f31e923fe2 1959 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1960
Pawel Zarembski 0:01f31e923fe2 1961 __ASM ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
Pawel Zarembski 0:01f31e923fe2 1962 return(result);
Pawel Zarembski 0:01f31e923fe2 1963 }
Pawel Zarembski 0:01f31e923fe2 1964
Pawel Zarembski 0:01f31e923fe2 1965 __STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1966 {
Pawel Zarembski 0:01f31e923fe2 1967 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1968
Pawel Zarembski 0:01f31e923fe2 1969 __ASM ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1970 return(result);
Pawel Zarembski 0:01f31e923fe2 1971 }
Pawel Zarembski 0:01f31e923fe2 1972
Pawel Zarembski 0:01f31e923fe2 1973 __STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1974 {
Pawel Zarembski 0:01f31e923fe2 1975 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1976
Pawel Zarembski 0:01f31e923fe2 1977 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1978 return(result);
Pawel Zarembski 0:01f31e923fe2 1979 }
Pawel Zarembski 0:01f31e923fe2 1980
Pawel Zarembski 0:01f31e923fe2 1981 __STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 1982 {
Pawel Zarembski 0:01f31e923fe2 1983 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1984
Pawel Zarembski 0:01f31e923fe2 1985 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 1986 return(result);
Pawel Zarembski 0:01f31e923fe2 1987 }
Pawel Zarembski 0:01f31e923fe2 1988
Pawel Zarembski 0:01f31e923fe2 1989 __STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
Pawel Zarembski 0:01f31e923fe2 1990 {
Pawel Zarembski 0:01f31e923fe2 1991 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 1992
Pawel Zarembski 0:01f31e923fe2 1993 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
Pawel Zarembski 0:01f31e923fe2 1994 return(result);
Pawel Zarembski 0:01f31e923fe2 1995 }
Pawel Zarembski 0:01f31e923fe2 1996
Pawel Zarembski 0:01f31e923fe2 1997 __STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
Pawel Zarembski 0:01f31e923fe2 1998 {
Pawel Zarembski 0:01f31e923fe2 1999 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 2000
Pawel Zarembski 0:01f31e923fe2 2001 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
Pawel Zarembski 0:01f31e923fe2 2002 return(result);
Pawel Zarembski 0:01f31e923fe2 2003 }
Pawel Zarembski 0:01f31e923fe2 2004
Pawel Zarembski 0:01f31e923fe2 2005 __STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
Pawel Zarembski 0:01f31e923fe2 2006 {
Pawel Zarembski 0:01f31e923fe2 2007 union llreg_u{
Pawel Zarembski 0:01f31e923fe2 2008 uint32_t w32[2];
Pawel Zarembski 0:01f31e923fe2 2009 uint64_t w64;
Pawel Zarembski 0:01f31e923fe2 2010 } llr;
Pawel Zarembski 0:01f31e923fe2 2011 llr.w64 = acc;
Pawel Zarembski 0:01f31e923fe2 2012
Pawel Zarembski 0:01f31e923fe2 2013 #ifndef __ARMEB__ /* Little endian */
Pawel Zarembski 0:01f31e923fe2 2014 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
Pawel Zarembski 0:01f31e923fe2 2015 #else /* Big endian */
Pawel Zarembski 0:01f31e923fe2 2016 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
Pawel Zarembski 0:01f31e923fe2 2017 #endif
Pawel Zarembski 0:01f31e923fe2 2018
Pawel Zarembski 0:01f31e923fe2 2019 return(llr.w64);
Pawel Zarembski 0:01f31e923fe2 2020 }
Pawel Zarembski 0:01f31e923fe2 2021
Pawel Zarembski 0:01f31e923fe2 2022 __STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
Pawel Zarembski 0:01f31e923fe2 2023 {
Pawel Zarembski 0:01f31e923fe2 2024 union llreg_u{
Pawel Zarembski 0:01f31e923fe2 2025 uint32_t w32[2];
Pawel Zarembski 0:01f31e923fe2 2026 uint64_t w64;
Pawel Zarembski 0:01f31e923fe2 2027 } llr;
Pawel Zarembski 0:01f31e923fe2 2028 llr.w64 = acc;
Pawel Zarembski 0:01f31e923fe2 2029
Pawel Zarembski 0:01f31e923fe2 2030 #ifndef __ARMEB__ /* Little endian */
Pawel Zarembski 0:01f31e923fe2 2031 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
Pawel Zarembski 0:01f31e923fe2 2032 #else /* Big endian */
Pawel Zarembski 0:01f31e923fe2 2033 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
Pawel Zarembski 0:01f31e923fe2 2034 #endif
Pawel Zarembski 0:01f31e923fe2 2035
Pawel Zarembski 0:01f31e923fe2 2036 return(llr.w64);
Pawel Zarembski 0:01f31e923fe2 2037 }
Pawel Zarembski 0:01f31e923fe2 2038
Pawel Zarembski 0:01f31e923fe2 2039 __STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 2040 {
Pawel Zarembski 0:01f31e923fe2 2041 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 2042
Pawel Zarembski 0:01f31e923fe2 2043 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 2044 return(result);
Pawel Zarembski 0:01f31e923fe2 2045 }
Pawel Zarembski 0:01f31e923fe2 2046
Pawel Zarembski 0:01f31e923fe2 2047 __STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 2048 {
Pawel Zarembski 0:01f31e923fe2 2049 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 2050
Pawel Zarembski 0:01f31e923fe2 2051 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 2052 return(result);
Pawel Zarembski 0:01f31e923fe2 2053 }
Pawel Zarembski 0:01f31e923fe2 2054
Pawel Zarembski 0:01f31e923fe2 2055 __STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
Pawel Zarembski 0:01f31e923fe2 2056 {
Pawel Zarembski 0:01f31e923fe2 2057 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 2058
Pawel Zarembski 0:01f31e923fe2 2059 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
Pawel Zarembski 0:01f31e923fe2 2060 return(result);
Pawel Zarembski 0:01f31e923fe2 2061 }
Pawel Zarembski 0:01f31e923fe2 2062
Pawel Zarembski 0:01f31e923fe2 2063 __STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
Pawel Zarembski 0:01f31e923fe2 2064 {
Pawel Zarembski 0:01f31e923fe2 2065 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 2066
Pawel Zarembski 0:01f31e923fe2 2067 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
Pawel Zarembski 0:01f31e923fe2 2068 return(result);
Pawel Zarembski 0:01f31e923fe2 2069 }
Pawel Zarembski 0:01f31e923fe2 2070
Pawel Zarembski 0:01f31e923fe2 2071 __STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
Pawel Zarembski 0:01f31e923fe2 2072 {
Pawel Zarembski 0:01f31e923fe2 2073 union llreg_u{
Pawel Zarembski 0:01f31e923fe2 2074 uint32_t w32[2];
Pawel Zarembski 0:01f31e923fe2 2075 uint64_t w64;
Pawel Zarembski 0:01f31e923fe2 2076 } llr;
Pawel Zarembski 0:01f31e923fe2 2077 llr.w64 = acc;
Pawel Zarembski 0:01f31e923fe2 2078
Pawel Zarembski 0:01f31e923fe2 2079 #ifndef __ARMEB__ /* Little endian */
Pawel Zarembski 0:01f31e923fe2 2080 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
Pawel Zarembski 0:01f31e923fe2 2081 #else /* Big endian */
Pawel Zarembski 0:01f31e923fe2 2082 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
Pawel Zarembski 0:01f31e923fe2 2083 #endif
Pawel Zarembski 0:01f31e923fe2 2084
Pawel Zarembski 0:01f31e923fe2 2085 return(llr.w64);
Pawel Zarembski 0:01f31e923fe2 2086 }
Pawel Zarembski 0:01f31e923fe2 2087
Pawel Zarembski 0:01f31e923fe2 2088 __STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
Pawel Zarembski 0:01f31e923fe2 2089 {
Pawel Zarembski 0:01f31e923fe2 2090 union llreg_u{
Pawel Zarembski 0:01f31e923fe2 2091 uint32_t w32[2];
Pawel Zarembski 0:01f31e923fe2 2092 uint64_t w64;
Pawel Zarembski 0:01f31e923fe2 2093 } llr;
Pawel Zarembski 0:01f31e923fe2 2094 llr.w64 = acc;
Pawel Zarembski 0:01f31e923fe2 2095
Pawel Zarembski 0:01f31e923fe2 2096 #ifndef __ARMEB__ /* Little endian */
Pawel Zarembski 0:01f31e923fe2 2097 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
Pawel Zarembski 0:01f31e923fe2 2098 #else /* Big endian */
Pawel Zarembski 0:01f31e923fe2 2099 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
Pawel Zarembski 0:01f31e923fe2 2100 #endif
Pawel Zarembski 0:01f31e923fe2 2101
Pawel Zarembski 0:01f31e923fe2 2102 return(llr.w64);
Pawel Zarembski 0:01f31e923fe2 2103 }
Pawel Zarembski 0:01f31e923fe2 2104
Pawel Zarembski 0:01f31e923fe2 2105 __STATIC_FORCEINLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
Pawel Zarembski 0:01f31e923fe2 2106 {
Pawel Zarembski 0:01f31e923fe2 2107 uint32_t result;
Pawel Zarembski 0:01f31e923fe2 2108
Pawel Zarembski 0:01f31e923fe2 2109 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 2110 return(result);
Pawel Zarembski 0:01f31e923fe2 2111 }
Pawel Zarembski 0:01f31e923fe2 2112
Pawel Zarembski 0:01f31e923fe2 2113 __STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2)
Pawel Zarembski 0:01f31e923fe2 2114 {
Pawel Zarembski 0:01f31e923fe2 2115 int32_t result;
Pawel Zarembski 0:01f31e923fe2 2116
Pawel Zarembski 0:01f31e923fe2 2117 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 2118 return(result);
Pawel Zarembski 0:01f31e923fe2 2119 }
Pawel Zarembski 0:01f31e923fe2 2120
Pawel Zarembski 0:01f31e923fe2 2121 __STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2)
Pawel Zarembski 0:01f31e923fe2 2122 {
Pawel Zarembski 0:01f31e923fe2 2123 int32_t result;
Pawel Zarembski 0:01f31e923fe2 2124
Pawel Zarembski 0:01f31e923fe2 2125 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
Pawel Zarembski 0:01f31e923fe2 2126 return(result);
Pawel Zarembski 0:01f31e923fe2 2127 }
Pawel Zarembski 0:01f31e923fe2 2128
Pawel Zarembski 0:01f31e923fe2 2129 #if 0
Pawel Zarembski 0:01f31e923fe2 2130 #define __PKHBT(ARG1,ARG2,ARG3) \
Pawel Zarembski 0:01f31e923fe2 2131 ({ \
Pawel Zarembski 0:01f31e923fe2 2132 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
Pawel Zarembski 0:01f31e923fe2 2133 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
Pawel Zarembski 0:01f31e923fe2 2134 __RES; \
Pawel Zarembski 0:01f31e923fe2 2135 })
Pawel Zarembski 0:01f31e923fe2 2136
Pawel Zarembski 0:01f31e923fe2 2137 #define __PKHTB(ARG1,ARG2,ARG3) \
Pawel Zarembski 0:01f31e923fe2 2138 ({ \
Pawel Zarembski 0:01f31e923fe2 2139 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
Pawel Zarembski 0:01f31e923fe2 2140 if (ARG3 == 0) \
Pawel Zarembski 0:01f31e923fe2 2141 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
Pawel Zarembski 0:01f31e923fe2 2142 else \
Pawel Zarembski 0:01f31e923fe2 2143 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
Pawel Zarembski 0:01f31e923fe2 2144 __RES; \
Pawel Zarembski 0:01f31e923fe2 2145 })
Pawel Zarembski 0:01f31e923fe2 2146 #endif
Pawel Zarembski 0:01f31e923fe2 2147
Pawel Zarembski 0:01f31e923fe2 2148 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
Pawel Zarembski 0:01f31e923fe2 2149 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
Pawel Zarembski 0:01f31e923fe2 2150
Pawel Zarembski 0:01f31e923fe2 2151 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
Pawel Zarembski 0:01f31e923fe2 2152 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
Pawel Zarembski 0:01f31e923fe2 2153
Pawel Zarembski 0:01f31e923fe2 2154 __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
Pawel Zarembski 0:01f31e923fe2 2155 {
Pawel Zarembski 0:01f31e923fe2 2156 int32_t result;
Pawel Zarembski 0:01f31e923fe2 2157
Pawel Zarembski 0:01f31e923fe2 2158 __ASM ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
Pawel Zarembski 0:01f31e923fe2 2159 return(result);
Pawel Zarembski 0:01f31e923fe2 2160 }
Pawel Zarembski 0:01f31e923fe2 2161
Pawel Zarembski 0:01f31e923fe2 2162 #endif /* (__ARM_FEATURE_DSP == 1) */
Pawel Zarembski 0:01f31e923fe2 2163 /*@} end of group CMSIS_SIMD_intrinsics */
Pawel Zarembski 0:01f31e923fe2 2164
Pawel Zarembski 0:01f31e923fe2 2165
Pawel Zarembski 0:01f31e923fe2 2166 #pragma GCC diagnostic pop
Pawel Zarembski 0:01f31e923fe2 2167
Pawel Zarembski 0:01f31e923fe2 2168 #endif /* __CMSIS_GCC_H */