Arrow / Mbed OS DAPLink Reset

Repostiory containing DAPLink source code with Reset Pin workaround for HANI_IOT board.

Upstream: https://github.com/ARMmbed/DAPLink

source/board/musca_b.c@0:01f31e923fe2, 2020-04-07 (annotated)

Committer:
Pawel Zarembski
Date:
Tue Apr 07 12:55:42 2020 +0200
Revision:
0:01f31e923fe2
hani: DAPLink with reset workaround

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Pawel Zarembski 0:01f31e923fe2 1 /**
Pawel Zarembski 0:01f31e923fe2 2 * @file musca_b.c
Pawel Zarembski 0:01f31e923fe2 3 * @brief board ID for the ARM MUSCA B board
Pawel Zarembski 0:01f31e923fe2 4 *
Pawel Zarembski 0:01f31e923fe2 5 * DAPLink Interface Firmware
Pawel Zarembski 0:01f31e923fe2 6 * Copyright (c) 2009-2019, ARM Limited, All Rights Reserved
Pawel Zarembski 0:01f31e923fe2 7 * SPDX-License-Identifier: Apache-2.0
Pawel Zarembski 0:01f31e923fe2 8 *
Pawel Zarembski 0:01f31e923fe2 9 * Licensed under the Apache License, Version 2.0 (the "License"); you may
Pawel Zarembski 0:01f31e923fe2 10 * not use this file except in compliance with the License.
Pawel Zarembski 0:01f31e923fe2 11 * You may obtain a copy of the License at
Pawel Zarembski 0:01f31e923fe2 12 *
Pawel Zarembski 0:01f31e923fe2 13 * http://www.apache.org/licenses/LICENSE-2.0
Pawel Zarembski 0:01f31e923fe2 14 *
Pawel Zarembski 0:01f31e923fe2 15 * Unless required by applicable law or agreed to in writing, software
Pawel Zarembski 0:01f31e923fe2 16 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
Pawel Zarembski 0:01f31e923fe2 17 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
Pawel Zarembski 0:01f31e923fe2 18 * See the License for the specific language governing permissions and
Pawel Zarembski 0:01f31e923fe2 19 * limitations under the License.
Pawel Zarembski 0:01f31e923fe2 20 */
Pawel Zarembski 0:01f31e923fe2 21
Pawel Zarembski 0:01f31e923fe2 22 #include "stdbool.h"
Pawel Zarembski 0:01f31e923fe2 23 #include "virtual_fs.h"
Pawel Zarembski 0:01f31e923fe2 24 #include "flash_manager.h"
Pawel Zarembski 0:01f31e923fe2 25 #include "IO_Config.h"
Pawel Zarembski 0:01f31e923fe2 26 #include "target_board.h"
Pawel Zarembski 0:01f31e923fe2 27 #include "target_family.h"
Pawel Zarembski 0:01f31e923fe2 28 #include "power_ctrl.h"
Pawel Zarembski 0:01f31e923fe2 29
Pawel Zarembski 0:01f31e923fe2 30 uint8_t gpio_get_pbon_btn()
Pawel Zarembski 0:01f31e923fe2 31 {
Pawel Zarembski 0:01f31e923fe2 32 return LPC_GPIO->PIN[PIN_PBON_PORT] & PIN_PBON ? 0 : 1;
Pawel Zarembski 0:01f31e923fe2 33 }
Pawel Zarembski 0:01f31e923fe2 34
Pawel Zarembski 0:01f31e923fe2 35 static void prerun_board_config(void)
Pawel Zarembski 0:01f31e923fe2 36 {
Pawel Zarembski 0:01f31e923fe2 37 /* configure MUSCA specific gpio */
Pawel Zarembski 0:01f31e923fe2 38 // configure PBON as input
Pawel Zarembski 0:01f31e923fe2 39 PIN_PBON_IOCON = PIN_PBON_IOCON_INIT;
Pawel Zarembski 0:01f31e923fe2 40 LPC_GPIO->DIR[PIN_PBON_PORT] &= ~PIN_PBON;
Pawel Zarembski 0:01f31e923fe2 41 // configure PWROK as output
Pawel Zarembski 0:01f31e923fe2 42 PIN_PWROK_IOCON = PIN_PWROK_IOCON_INIT;
Pawel Zarembski 0:01f31e923fe2 43 LPC_GPIO->CLR[PIN_PWROK_PORT] = PIN_PWROK;
Pawel Zarembski 0:01f31e923fe2 44 LPC_GPIO->DIR[PIN_PWROK_PORT] |= PIN_PWROK;
Pawel Zarembski 0:01f31e923fe2 45 // configure SHUTDOWN as input
Pawel Zarembski 0:01f31e923fe2 46 PIN_SHUTDOWN_IOCON = PIN_SHUTDOWN_IOCON_INIT;
Pawel Zarembski 0:01f31e923fe2 47 LPC_GPIO->DIR[PIN_SHUTDOWN_PORT] &= ~PIN_SHUTDOWN;
Pawel Zarembski 0:01f31e923fe2 48 // configure CB_nRST as output
Pawel Zarembski 0:01f31e923fe2 49 PIN_CB_nRST_IOCON = PIN_CB_nRST_IOCON_INIT;
Pawel Zarembski 0:01f31e923fe2 50 LPC_GPIO->CLR[PIN_CB_nRST_PORT] = PIN_CB_nRST;
Pawel Zarembski 0:01f31e923fe2 51 LPC_GPIO->DIR[PIN_CB_nRST_PORT] |= PIN_CB_nRST;
Pawel Zarembski 0:01f31e923fe2 52 // configure CFG_nRST as output
Pawel Zarembski 0:01f31e923fe2 53 PIN_CFG_nRST_IOCON = PIN_CFG_nRST_IOCON_INIT;
Pawel Zarembski 0:01f31e923fe2 54 LPC_GPIO->CLR[PIN_CFG_nRST_PORT] = PIN_CFG_nRST;
Pawel Zarembski 0:01f31e923fe2 55 LPC_GPIO->DIR[PIN_CFG_nRST_PORT] |= PIN_CFG_nRST;
Pawel Zarembski 0:01f31e923fe2 56 // configure SCC_LOAD as output
Pawel Zarembski 0:01f31e923fe2 57 PIN_SCC_LOAD_IOCON = PIN_SCC_LOAD_IOCON_INIT;
Pawel Zarembski 0:01f31e923fe2 58 LPC_GPIO->CLR[PIN_SCC_LOAD_PORT] = PIN_SCC_LOAD;
Pawel Zarembski 0:01f31e923fe2 59 LPC_GPIO->DIR[PIN_SCC_LOAD_PORT] |= PIN_SCC_LOAD;
Pawel Zarembski 0:01f31e923fe2 60 // configure SCC_WNR as output
Pawel Zarembski 0:01f31e923fe2 61 PIN_SCC_WNR_IOCON = PIN_SCC_WNR_IOCON_INIT;
Pawel Zarembski 0:01f31e923fe2 62 LPC_GPIO->CLR[PIN_SCC_WNR_PORT] = PIN_SCC_WNR;
Pawel Zarembski 0:01f31e923fe2 63 LPC_GPIO->DIR[PIN_SCC_WNR_PORT] |= PIN_SCC_WNR;
Pawel Zarembski 0:01f31e923fe2 64 // configure SCC_DATAIN as output
Pawel Zarembski 0:01f31e923fe2 65 PIN_SCC_DATAIN_IOCON = PIN_SCC_DATAIN_IOCON_INIT;
Pawel Zarembski 0:01f31e923fe2 66 LPC_GPIO->CLR[PIN_SCC_DATAIN_PORT] = PIN_SCC_DATAIN;
Pawel Zarembski 0:01f31e923fe2 67 LPC_GPIO->DIR[PIN_SCC_DATAIN_PORT] |= PIN_SCC_DATAIN;
Pawel Zarembski 0:01f31e923fe2 68 // configure SCC_CLK as output
Pawel Zarembski 0:01f31e923fe2 69 PIN_SCC_CLK_IOCON = PIN_SCC_CLK_IOCON_INIT;
Pawel Zarembski 0:01f31e923fe2 70 LPC_GPIO->CLR[PIN_SCC_CLK_PORT] = PIN_SCC_CLK;
Pawel Zarembski 0:01f31e923fe2 71 LPC_GPIO->DIR[PIN_SCC_CLK_PORT] |= PIN_SCC_CLK;
Pawel Zarembski 0:01f31e923fe2 72 // configure SCC_DATAOUT as input
Pawel Zarembski 0:01f31e923fe2 73 PIN_SCC_DATAOUT_IOCON = PIN_SCC_DATAOUT_IOCON_INIT;
Pawel Zarembski 0:01f31e923fe2 74 LPC_GPIO->DIR[PIN_SCC_DATAOUT_PORT] &= ~PIN_SCC_DATAOUT;
Pawel Zarembski 0:01f31e923fe2 75 // configure CS_nDET as input
Pawel Zarembski 0:01f31e923fe2 76 PIN_CS_nDET_IOCON = PIN_CS_nDET_IOCON_INIT;
Pawel Zarembski 0:01f31e923fe2 77 LPC_GPIO->DIR[PIN_CS_nDET_PORT] &= ~PIN_CS_nDET;
Pawel Zarembski 0:01f31e923fe2 78 // configure PIN_I2C_SCL as OC output
Pawel Zarembski 0:01f31e923fe2 79 PIN_I2C_SCL_IOCON = PIN_I2C_SCL_IOCON_INIT;
Pawel Zarembski 0:01f31e923fe2 80 LPC_GPIO->DIR[PIN_I2C_SCL_PORT] &= ~PIN_I2C_SCL;
Pawel Zarembski 0:01f31e923fe2 81 // configure PIN_I2C_SDA as OC output
Pawel Zarembski 0:01f31e923fe2 82 PIN_I2C_SDA_IOCON = PIN_I2C_SDA_IOCON_INIT;
Pawel Zarembski 0:01f31e923fe2 83 LPC_GPIO->DIR[PIN_I2C_SDA_PORT] &= ~PIN_I2C_SDA;
Pawel Zarembski 0:01f31e923fe2 84
Pawel Zarembski 0:01f31e923fe2 85 // Setup I2CIO expander
Pawel Zarembski 0:01f31e923fe2 86 i2cio_init();
Pawel Zarembski 0:01f31e923fe2 87
Pawel Zarembski 0:01f31e923fe2 88 PIN_USART_IOCON = PIN_USART_IOCON_INIT;
Pawel Zarembski 0:01f31e923fe2 89
Pawel Zarembski 0:01f31e923fe2 90 // Turn ON power
Pawel Zarembski 0:01f31e923fe2 91 i2cio_power_on();
Pawel Zarembski 0:01f31e923fe2 92
Pawel Zarembski 0:01f31e923fe2 93 power_on_sequence();
Pawel Zarembski 0:01f31e923fe2 94
Pawel Zarembski 0:01f31e923fe2 95 flash_manager_set_page_erase(true);
Pawel Zarembski 0:01f31e923fe2 96 }
Pawel Zarembski 0:01f31e923fe2 97
Pawel Zarembski 0:01f31e923fe2 98 const board_info_t g_board_info = {
Pawel Zarembski 0:01f31e923fe2 99 .board_id = "5007",
Pawel Zarembski 0:01f31e923fe2 100 .daplink_drive_name = "MBED ",
Pawel Zarembski 0:01f31e923fe2 101 .target_cfg = &target_device,
Pawel Zarembski 0:01f31e923fe2 102 .prerun_board_config = prerun_board_config,
Pawel Zarembski 0:01f31e923fe2 103 };