Analog Devices / Mbed OS EVAL-CN0540-ARDZ

Dependencies:   platform_drivers LTC26X6 AD77681

CMSIS-DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c@1:9dd7c64b4a64, 2021-12-06 (annotated)

Committer:
jngarlitos
Date:
Mon Dec 06 05:22:28 2021 +0000
Revision:
1:9dd7c64b4a64
EVAL-CN0540-ARDZ mbed example program Initial Commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jngarlitos 1:9dd7c64b4a64 1 /* ----------------------------------------------------------------------
jngarlitos 1:9dd7c64b4a64 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
jngarlitos 1:9dd7c64b4a64 3 *
jngarlitos 1:9dd7c64b4a64 4 * $Date: 19. March 2015
jngarlitos 1:9dd7c64b4a64 5 * $Revision: V.1.4.5
jngarlitos 1:9dd7c64b4a64 6 *
jngarlitos 1:9dd7c64b4a64 7 * Project: CMSIS DSP Library
jngarlitos 1:9dd7c64b4a64 8 * Title: arm_shift_q7.c
jngarlitos 1:9dd7c64b4a64 9 *
jngarlitos 1:9dd7c64b4a64 10 * Description: Processing function for the Q7 Shifting
jngarlitos 1:9dd7c64b4a64 11 *
jngarlitos 1:9dd7c64b4a64 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
jngarlitos 1:9dd7c64b4a64 13 *
jngarlitos 1:9dd7c64b4a64 14 * Redistribution and use in source and binary forms, with or without
jngarlitos 1:9dd7c64b4a64 15 * modification, are permitted provided that the following conditions
jngarlitos 1:9dd7c64b4a64 16 * are met:
jngarlitos 1:9dd7c64b4a64 17 * - Redistributions of source code must retain the above copyright
jngarlitos 1:9dd7c64b4a64 18 * notice, this list of conditions and the following disclaimer.
jngarlitos 1:9dd7c64b4a64 19 * - Redistributions in binary form must reproduce the above copyright
jngarlitos 1:9dd7c64b4a64 20 * notice, this list of conditions and the following disclaimer in
jngarlitos 1:9dd7c64b4a64 21 * the documentation and/or other materials provided with the
jngarlitos 1:9dd7c64b4a64 22 * distribution.
jngarlitos 1:9dd7c64b4a64 23 * - Neither the name of ARM LIMITED nor the names of its contributors
jngarlitos 1:9dd7c64b4a64 24 * may be used to endorse or promote products derived from this
jngarlitos 1:9dd7c64b4a64 25 * software without specific prior written permission.
jngarlitos 1:9dd7c64b4a64 26 *
jngarlitos 1:9dd7c64b4a64 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
jngarlitos 1:9dd7c64b4a64 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
jngarlitos 1:9dd7c64b4a64 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
jngarlitos 1:9dd7c64b4a64 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
jngarlitos 1:9dd7c64b4a64 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
jngarlitos 1:9dd7c64b4a64 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
jngarlitos 1:9dd7c64b4a64 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
jngarlitos 1:9dd7c64b4a64 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
jngarlitos 1:9dd7c64b4a64 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
jngarlitos 1:9dd7c64b4a64 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
jngarlitos 1:9dd7c64b4a64 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
jngarlitos 1:9dd7c64b4a64 38 * POSSIBILITY OF SUCH DAMAGE.
jngarlitos 1:9dd7c64b4a64 39 * -------------------------------------------------------------------- */
jngarlitos 1:9dd7c64b4a64 40
jngarlitos 1:9dd7c64b4a64 41 #include "arm_math.h"
jngarlitos 1:9dd7c64b4a64 42
jngarlitos 1:9dd7c64b4a64 43 /**
jngarlitos 1:9dd7c64b4a64 44 * @ingroup groupMath
jngarlitos 1:9dd7c64b4a64 45 */
jngarlitos 1:9dd7c64b4a64 46
jngarlitos 1:9dd7c64b4a64 47 /**
jngarlitos 1:9dd7c64b4a64 48 * @addtogroup shift
jngarlitos 1:9dd7c64b4a64 49 * @{
jngarlitos 1:9dd7c64b4a64 50 */
jngarlitos 1:9dd7c64b4a64 51
jngarlitos 1:9dd7c64b4a64 52
jngarlitos 1:9dd7c64b4a64 53 /**
jngarlitos 1:9dd7c64b4a64 54 * @brief Shifts the elements of a Q7 vector a specified number of bits.
jngarlitos 1:9dd7c64b4a64 55 * @param[in] *pSrc points to the input vector
jngarlitos 1:9dd7c64b4a64 56 * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
jngarlitos 1:9dd7c64b4a64 57 * @param[out] *pDst points to the output vector
jngarlitos 1:9dd7c64b4a64 58 * @param[in] blockSize number of samples in the vector
jngarlitos 1:9dd7c64b4a64 59 * @return none.
jngarlitos 1:9dd7c64b4a64 60 *
jngarlitos 1:9dd7c64b4a64 61 * \par Conditions for optimum performance
jngarlitos 1:9dd7c64b4a64 62 * Input and output buffers should be aligned by 32-bit
jngarlitos 1:9dd7c64b4a64 63 *
jngarlitos 1:9dd7c64b4a64 64 *
jngarlitos 1:9dd7c64b4a64 65 * <b>Scaling and Overflow Behavior:</b>
jngarlitos 1:9dd7c64b4a64 66 * \par
jngarlitos 1:9dd7c64b4a64 67 * The function uses saturating arithmetic.
jngarlitos 1:9dd7c64b4a64 68 * Results outside of the allowable Q7 range [0x8 0x7F] will be saturated.
jngarlitos 1:9dd7c64b4a64 69 */
jngarlitos 1:9dd7c64b4a64 70
jngarlitos 1:9dd7c64b4a64 71 void arm_shift_q7(
jngarlitos 1:9dd7c64b4a64 72 q7_t * pSrc,
jngarlitos 1:9dd7c64b4a64 73 int8_t shiftBits,
jngarlitos 1:9dd7c64b4a64 74 q7_t * pDst,
jngarlitos 1:9dd7c64b4a64 75 uint32_t blockSize)
jngarlitos 1:9dd7c64b4a64 76 {
jngarlitos 1:9dd7c64b4a64 77 uint32_t blkCnt; /* loop counter */
jngarlitos 1:9dd7c64b4a64 78 uint8_t sign; /* Sign of shiftBits */
jngarlitos 1:9dd7c64b4a64 79
jngarlitos 1:9dd7c64b4a64 80 #ifndef ARM_MATH_CM0_FAMILY
jngarlitos 1:9dd7c64b4a64 81
jngarlitos 1:9dd7c64b4a64 82 /* Run the below code for Cortex-M4 and Cortex-M3 */
jngarlitos 1:9dd7c64b4a64 83 q7_t in1; /* Input value1 */
jngarlitos 1:9dd7c64b4a64 84 q7_t in2; /* Input value2 */
jngarlitos 1:9dd7c64b4a64 85 q7_t in3; /* Input value3 */
jngarlitos 1:9dd7c64b4a64 86 q7_t in4; /* Input value4 */
jngarlitos 1:9dd7c64b4a64 87
jngarlitos 1:9dd7c64b4a64 88
jngarlitos 1:9dd7c64b4a64 89 /*loop Unrolling */
jngarlitos 1:9dd7c64b4a64 90 blkCnt = blockSize >> 2u;
jngarlitos 1:9dd7c64b4a64 91
jngarlitos 1:9dd7c64b4a64 92 /* Getting the sign of shiftBits */
jngarlitos 1:9dd7c64b4a64 93 sign = (shiftBits & 0x80);
jngarlitos 1:9dd7c64b4a64 94
jngarlitos 1:9dd7c64b4a64 95 /* If the shift value is positive then do right shift else left shift */
jngarlitos 1:9dd7c64b4a64 96 if(sign == 0u)
jngarlitos 1:9dd7c64b4a64 97 {
jngarlitos 1:9dd7c64b4a64 98 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
jngarlitos 1:9dd7c64b4a64 99 ** a second loop below computes the remaining 1 to 3 samples. */
jngarlitos 1:9dd7c64b4a64 100 while(blkCnt > 0u)
jngarlitos 1:9dd7c64b4a64 101 {
jngarlitos 1:9dd7c64b4a64 102 /* C = A << shiftBits */
jngarlitos 1:9dd7c64b4a64 103 /* Read 4 inputs */
jngarlitos 1:9dd7c64b4a64 104 in1 = *pSrc;
jngarlitos 1:9dd7c64b4a64 105 in2 = *(pSrc + 1);
jngarlitos 1:9dd7c64b4a64 106 in3 = *(pSrc + 2);
jngarlitos 1:9dd7c64b4a64 107 in4 = *(pSrc + 3);
jngarlitos 1:9dd7c64b4a64 108
jngarlitos 1:9dd7c64b4a64 109 /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
jngarlitos 1:9dd7c64b4a64 110 *__SIMD32(pDst)++ = __PACKq7(__SSAT((in1 << shiftBits), 8),
jngarlitos 1:9dd7c64b4a64 111 __SSAT((in2 << shiftBits), 8),
jngarlitos 1:9dd7c64b4a64 112 __SSAT((in3 << shiftBits), 8),
jngarlitos 1:9dd7c64b4a64 113 __SSAT((in4 << shiftBits), 8));
jngarlitos 1:9dd7c64b4a64 114 /* Update source pointer to process next sampels */
jngarlitos 1:9dd7c64b4a64 115 pSrc += 4u;
jngarlitos 1:9dd7c64b4a64 116
jngarlitos 1:9dd7c64b4a64 117 /* Decrement the loop counter */
jngarlitos 1:9dd7c64b4a64 118 blkCnt--;
jngarlitos 1:9dd7c64b4a64 119 }
jngarlitos 1:9dd7c64b4a64 120
jngarlitos 1:9dd7c64b4a64 121 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
jngarlitos 1:9dd7c64b4a64 122 ** No loop unrolling is used. */
jngarlitos 1:9dd7c64b4a64 123 blkCnt = blockSize % 0x4u;
jngarlitos 1:9dd7c64b4a64 124
jngarlitos 1:9dd7c64b4a64 125 while(blkCnt > 0u)
jngarlitos 1:9dd7c64b4a64 126 {
jngarlitos 1:9dd7c64b4a64 127 /* C = A << shiftBits */
jngarlitos 1:9dd7c64b4a64 128 /* Shift the input and then store the result in the destination buffer. */
jngarlitos 1:9dd7c64b4a64 129 *pDst++ = (q7_t) __SSAT((*pSrc++ << shiftBits), 8);
jngarlitos 1:9dd7c64b4a64 130
jngarlitos 1:9dd7c64b4a64 131 /* Decrement the loop counter */
jngarlitos 1:9dd7c64b4a64 132 blkCnt--;
jngarlitos 1:9dd7c64b4a64 133 }
jngarlitos 1:9dd7c64b4a64 134 }
jngarlitos 1:9dd7c64b4a64 135 else
jngarlitos 1:9dd7c64b4a64 136 {
jngarlitos 1:9dd7c64b4a64 137 shiftBits = -shiftBits;
jngarlitos 1:9dd7c64b4a64 138 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
jngarlitos 1:9dd7c64b4a64 139 ** a second loop below computes the remaining 1 to 3 samples. */
jngarlitos 1:9dd7c64b4a64 140 while(blkCnt > 0u)
jngarlitos 1:9dd7c64b4a64 141 {
jngarlitos 1:9dd7c64b4a64 142 /* C = A >> shiftBits */
jngarlitos 1:9dd7c64b4a64 143 /* Read 4 inputs */
jngarlitos 1:9dd7c64b4a64 144 in1 = *pSrc;
jngarlitos 1:9dd7c64b4a64 145 in2 = *(pSrc + 1);
jngarlitos 1:9dd7c64b4a64 146 in3 = *(pSrc + 2);
jngarlitos 1:9dd7c64b4a64 147 in4 = *(pSrc + 3);
jngarlitos 1:9dd7c64b4a64 148
jngarlitos 1:9dd7c64b4a64 149 /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
jngarlitos 1:9dd7c64b4a64 150 *__SIMD32(pDst)++ = __PACKq7((in1 >> shiftBits), (in2 >> shiftBits),
jngarlitos 1:9dd7c64b4a64 151 (in3 >> shiftBits), (in4 >> shiftBits));
jngarlitos 1:9dd7c64b4a64 152
jngarlitos 1:9dd7c64b4a64 153
jngarlitos 1:9dd7c64b4a64 154 pSrc += 4u;
jngarlitos 1:9dd7c64b4a64 155
jngarlitos 1:9dd7c64b4a64 156 /* Decrement the loop counter */
jngarlitos 1:9dd7c64b4a64 157 blkCnt--;
jngarlitos 1:9dd7c64b4a64 158 }
jngarlitos 1:9dd7c64b4a64 159
jngarlitos 1:9dd7c64b4a64 160 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
jngarlitos 1:9dd7c64b4a64 161 ** No loop unrolling is used. */
jngarlitos 1:9dd7c64b4a64 162 blkCnt = blockSize % 0x4u;
jngarlitos 1:9dd7c64b4a64 163
jngarlitos 1:9dd7c64b4a64 164 while(blkCnt > 0u)
jngarlitos 1:9dd7c64b4a64 165 {
jngarlitos 1:9dd7c64b4a64 166 /* C = A >> shiftBits */
jngarlitos 1:9dd7c64b4a64 167 /* Shift the input and then store the result in the destination buffer. */
jngarlitos 1:9dd7c64b4a64 168 in1 = *pSrc++;
jngarlitos 1:9dd7c64b4a64 169 *pDst++ = (in1 >> shiftBits);
jngarlitos 1:9dd7c64b4a64 170
jngarlitos 1:9dd7c64b4a64 171 /* Decrement the loop counter */
jngarlitos 1:9dd7c64b4a64 172 blkCnt--;
jngarlitos 1:9dd7c64b4a64 173 }
jngarlitos 1:9dd7c64b4a64 174 }
jngarlitos 1:9dd7c64b4a64 175
jngarlitos 1:9dd7c64b4a64 176 #else
jngarlitos 1:9dd7c64b4a64 177
jngarlitos 1:9dd7c64b4a64 178 /* Run the below code for Cortex-M0 */
jngarlitos 1:9dd7c64b4a64 179
jngarlitos 1:9dd7c64b4a64 180 /* Getting the sign of shiftBits */
jngarlitos 1:9dd7c64b4a64 181 sign = (shiftBits & 0x80);
jngarlitos 1:9dd7c64b4a64 182
jngarlitos 1:9dd7c64b4a64 183 /* If the shift value is positive then do right shift else left shift */
jngarlitos 1:9dd7c64b4a64 184 if(sign == 0u)
jngarlitos 1:9dd7c64b4a64 185 {
jngarlitos 1:9dd7c64b4a64 186 /* Initialize blkCnt with number of samples */
jngarlitos 1:9dd7c64b4a64 187 blkCnt = blockSize;
jngarlitos 1:9dd7c64b4a64 188
jngarlitos 1:9dd7c64b4a64 189 while(blkCnt > 0u)
jngarlitos 1:9dd7c64b4a64 190 {
jngarlitos 1:9dd7c64b4a64 191 /* C = A << shiftBits */
jngarlitos 1:9dd7c64b4a64 192 /* Shift the input and then store the result in the destination buffer. */
jngarlitos 1:9dd7c64b4a64 193 *pDst++ = (q7_t) __SSAT(((q15_t) * pSrc++ << shiftBits), 8);
jngarlitos 1:9dd7c64b4a64 194
jngarlitos 1:9dd7c64b4a64 195 /* Decrement the loop counter */
jngarlitos 1:9dd7c64b4a64 196 blkCnt--;
jngarlitos 1:9dd7c64b4a64 197 }
jngarlitos 1:9dd7c64b4a64 198 }
jngarlitos 1:9dd7c64b4a64 199 else
jngarlitos 1:9dd7c64b4a64 200 {
jngarlitos 1:9dd7c64b4a64 201 /* Initialize blkCnt with number of samples */
jngarlitos 1:9dd7c64b4a64 202 blkCnt = blockSize;
jngarlitos 1:9dd7c64b4a64 203
jngarlitos 1:9dd7c64b4a64 204 while(blkCnt > 0u)
jngarlitos 1:9dd7c64b4a64 205 {
jngarlitos 1:9dd7c64b4a64 206 /* C = A >> shiftBits */
jngarlitos 1:9dd7c64b4a64 207 /* Shift the input and then store the result in the destination buffer. */
jngarlitos 1:9dd7c64b4a64 208 *pDst++ = (*pSrc++ >> -shiftBits);
jngarlitos 1:9dd7c64b4a64 209
jngarlitos 1:9dd7c64b4a64 210 /* Decrement the loop counter */
jngarlitos 1:9dd7c64b4a64 211 blkCnt--;
jngarlitos 1:9dd7c64b4a64 212 }
jngarlitos 1:9dd7c64b4a64 213 }
jngarlitos 1:9dd7c64b4a64 214
jngarlitos 1:9dd7c64b4a64 215 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
jngarlitos 1:9dd7c64b4a64 216 }
jngarlitos 1:9dd7c64b4a64 217
jngarlitos 1:9dd7c64b4a64 218 /**
jngarlitos 1:9dd7c64b4a64 219 * @} end of shift group
jngarlitos 1:9dd7c64b4a64 220 */