EVAL-AD7124 Mbed Example Program.

Dependencies:   adi_console_menu platform_drivers

Committer:
Kjansen
Date:
Tue Aug 03 12:05:42 2021 +0100
Revision:
7:3e1005bd4d41
Parent:
3:779bb1e55f1a
No-OS Adoption Changes:

* Updated the .lib files for adoption of no-OS repository as-is.
* Replaced platform_drivers.h with required header files.
* Added designated initializers for nanodac_init_params as the latest
spi_init_param in no-OS repository include a new field member platform_ops.
* Added Support Macros.
* Updated the copyright year of the nanodac_console_app.c file

Mbed OS update changes:
1) Added the mbed_app.json file with custom parameters
2) Updated the mbed-os version to 6.8.0

Updated the readme file.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mahphalke 3:779bb1e55f1a 1 /*!
mahphalke 3:779bb1e55f1a 2 *****************************************************************************
mahphalke 3:779bb1e55f1a 3 @file: ad7124_support.h
mahphalke 3:779bb1e55f1a 4
mahphalke 3:779bb1e55f1a 5 @brief: Provides useful support functions for the AD7124 NoOS driver
mahphalke 3:779bb1e55f1a 6
mahphalke 3:779bb1e55f1a 7 @details:
mahphalke 3:779bb1e55f1a 8 -----------------------------------------------------------------------------
Kjansen 7:3e1005bd4d41 9 Copyright (c) 2019-2021 Analog Devices, Inc.
mahphalke 3:779bb1e55f1a 10 All rights reserved.
mahphalke 3:779bb1e55f1a 11
mahphalke 3:779bb1e55f1a 12 This software is proprietary to Analog Devices, Inc. and its licensors.
mahphalke 3:779bb1e55f1a 13 By using this software you agree to the terms of the associated
mahphalke 3:779bb1e55f1a 14 Analog Devices Software License Agreement.
mahphalke 3:779bb1e55f1a 15 *****************************************************************************/
mahphalke 3:779bb1e55f1a 16
mahphalke 3:779bb1e55f1a 17 #ifndef AD7124_SUPPORT_H_
mahphalke 3:779bb1e55f1a 18 #define AD7124_SUPPORT_H_
mahphalke 3:779bb1e55f1a 19
mahphalke 3:779bb1e55f1a 20 #include "ad7124.h"
Kjansen 7:3e1005bd4d41 21 #include "util.h"
mahphalke 3:779bb1e55f1a 22
mahphalke 3:779bb1e55f1a 23 /* PGA Gain Value */
mahphalke 3:779bb1e55f1a 24 #define AD7124_PGA_GAIN(x) (1 << (x))
mahphalke 3:779bb1e55f1a 25
mahphalke 3:779bb1e55f1a 26 #define AD7124_REF_VOLTAGE 2.5
mahphalke 3:779bb1e55f1a 27 #define AD7124_ADC_N_BITS 24
mahphalke 3:779bb1e55f1a 28
Kjansen 7:3e1005bd4d41 29 /* ADC_Control Register bits */
Kjansen 7:3e1005bd4d41 30 #define AD7124_ADC_CTRL_REG_POWER_MODE_MSK GENMASK(7,6)
Kjansen 7:3e1005bd4d41 31 #define AD7124_ADC_CTRL_REG_POWER_MODE_RD(x) (((x) >> 6) & 0x3)
Kjansen 7:3e1005bd4d41 32 #define AD7124_ADC_CTRL_REG_MSK GENMASK(5,2)
Kjansen 7:3e1005bd4d41 33
Kjansen 7:3e1005bd4d41 34 /* Channel Registers 0-15 bits */
Kjansen 7:3e1005bd4d41 35 #define AD7124_CH_MAP_REG_CH_ENABLE_RD(x) (((x) >> 15) & 0x1)
Kjansen 7:3e1005bd4d41 36 #define AD7124_CH_MAP_REG_SETUP_MSK GENMASK(14, 12)
Kjansen 7:3e1005bd4d41 37 #define AD7124_CH_MAP_REG_SETUP_RD(x) (((x) >> 12) & 0x7)
Kjansen 7:3e1005bd4d41 38 #define AD7124_CH_MAP_REG_AINP_MSK GENMASK(9, 5)
Kjansen 7:3e1005bd4d41 39 #define AD7124_CH_MAP_REG_AINP_RD(x) (((x) >> 5) & 0x1F)
Kjansen 7:3e1005bd4d41 40 #define AD7124_CH_MAP_REG_AINM_MSK GENMASK(4, 0)
Kjansen 7:3e1005bd4d41 41 #define AD7124_CH_MAP_REG_AINM_RD(x) (((x) >> 0) & 0x1F)
Kjansen 7:3e1005bd4d41 42
Kjansen 7:3e1005bd4d41 43 /* Configuration Registers 0-7 bits */
Kjansen 7:3e1005bd4d41 44 #define AD7124_CFG_REG_BIPOLAR_RD(x) (((x) >> 11) & 0x1)
Kjansen 7:3e1005bd4d41 45 #define AD7124_CFG_REG_REF_BUFP_RD(x) (((x) >> 8) & 0x1)
Kjansen 7:3e1005bd4d41 46 #define AD7124_CFG_REG_REF_BUFM_RD(x) (((x) >> 7) & 0x1)
Kjansen 7:3e1005bd4d41 47 #define AD7124_CFG_REG_AIN_BUFP_RD(x) (((x) >> 6) & 0x1)
Kjansen 7:3e1005bd4d41 48 #define AD7124_CFG_REG_AINM_BUFP_RD(x) (((x) >> 5) & 0x1)
Kjansen 7:3e1005bd4d41 49 #define AD7124_CFG_REG_REF_SEL_MSK GENMASK(4, 3)
Kjansen 7:3e1005bd4d41 50 #define AD7124_CFG_REG_REF_SEL_RD(x) (((x) >> 3) & 0x3)
Kjansen 7:3e1005bd4d41 51 #define AD7124_CFG_REG_PGA_MSK GENMASK(2, 0)
Kjansen 7:3e1005bd4d41 52 #define AD7124_CFG_REG_PGA_RD(x) (((x) >> 0) & 0x7)
Kjansen 7:3e1005bd4d41 53
Kjansen 7:3e1005bd4d41 54 /* Filter Register 0-7 bits */
Kjansen 7:3e1005bd4d41 55 #define AD7124_FILT_REG_FILTER_MSK GENMASK(23, 21)
Kjansen 7:3e1005bd4d41 56 #define AD7124_FILT_REG_FILTER_RD(x) (((x) >> 21) & 0x7)
Kjansen 7:3e1005bd4d41 57 #define AD7124_FILT_REG_FS_MSK GENMASK(10, 0)
Kjansen 7:3e1005bd4d41 58 #define AD7124_FILT_REG_FS_RD(x) (((x) >> 0) & 0x7FF)
Kjansen 7:3e1005bd4d41 59
mahphalke 3:779bb1e55f1a 60 uint8_t ad7124_get_channel_setup(struct ad7124_dev *dev, uint8_t channel);
mahphalke 3:779bb1e55f1a 61 uint8_t ad7124_get_channel_pga(struct ad7124_dev *dev, uint8_t channel);
mahphalke 3:779bb1e55f1a 62 bool ad7124_get_channel_bipolar(struct ad7124_dev *dev, uint8_t channel);
mahphalke 3:779bb1e55f1a 63 float ad7124_convert_sample_to_voltage(struct ad7124_dev *dev, uint8_t channel,
mahphalke 3:779bb1e55f1a 64 uint32_t sample);
mahphalke 3:779bb1e55f1a 65
mahphalke 3:779bb1e55f1a 66 #endif /* AD7124_SUPPORT_H_ */