Analog Devices AD7124-8 - 8-Channel, Low Noise, Low Power, 24-Bit, Sigma-Delta ADC with PGA and Reference
Dependents: CN0398 CN0391 CN0398_arduino
Diff: AD7124.h
- Revision:
- 1:4a4194a5a8ed
- Parent:
- 0:f32d3fb1d3e2
- Child:
- 3:8478d36355fc
- Child:
- 4:502352a643e6
--- a/AD7124.h Mon Oct 24 15:25:58 2016 +0000 +++ b/AD7124.h Mon Oct 24 16:03:43 2016 +0000 @@ -124,14 +124,8 @@ AD7124_Gain_7, AD7124_REG_NO }; -private: - enum { - AD7124_RW = 1, /* Read and Write */ - AD7124_R = 2, /* Read only */ - AD7124_W = 3, /* Write only */ - } ad7124_reg_access; - - /*! Device register info */ + + /*! Device register info */ typedef struct _ad7124_st_reg { int32_t addr; int32_t value; @@ -142,65 +136,16 @@ /*! Array holding the info for the ad7124 registers - address, initial value, size and access type. */ - ad7124_st_reg ad7124_regs[57] = { - {0x00, 0x00, 1, 2}, /* AD7124_Status */ - {0x01, 0x0000, 2, 1}, /* AD7124_ADC_Control */ - {0x02, 0x0000, 3, 2}, /* AD7124_Data */ - {0x03, 0x0000, 3, 1}, /* AD7124_IOCon1 */ - {0x04, 0x0000, 2, 1}, /* AD7124_IOCon2 */ - {0x05, 0x12, 1, 2}, /* AD7124_ID */ - {0x06, 0x0000, 3, 2}, /* AD7124_Error */ - {0x07, 0x0400, 3, 1}, /* AD7124_Error_En */ - {0x08, 0x00, 1, 2}, /* AD7124_Mclk_Count */ - {0x09, 0x8001, 2, 1}, /* AD7124_Channel_0 */ - {0x0A, 0x0001, 2, 1}, /* AD7124_Channel_1 */ - {0x0B, 0x0001, 2, 1}, /* AD7124_Channel_2 */ - {0x0C, 0x0001, 2, 1}, /* AD7124_Channel_3 */ - {0x0D, 0x0001, 2, 1}, /* AD7124_Channel_4 */ - {0x0E, 0x0001, 2, 1}, /* AD7124_Channel_5 */ - {0x0F, 0x0001, 2, 1}, /* AD7124_Channel_6 */ - {0x10, 0x0001, 2, 1}, /* AD7124_Channel_7 */ - {0x11, 0x0001, 2, 1}, /* AD7124_Channel_8 */ - {0x12, 0x0001, 2, 1}, /* AD7124_Channel_9 */ - {0x13, 0x0001, 2, 1}, /* AD7124_Channel_10 */ - {0x14, 0x0001, 2, 1}, /* AD7124_Channel_11 */ - {0x15, 0x0001, 2, 1}, /* AD7124_Channel_12 */ - {0x16, 0x0001, 2, 1}, /* AD7124_Channel_13 */ - {0x17, 0x0001, 2, 1}, /* AD7124_Channel_14 */ - {0x18, 0x0001, 2, 1}, /* AD7124_Channel_15 */ - {0x19, 0x0860, 2, 1}, /* AD7124_Config_0 */ - {0x1A, 0x0860, 2, 1}, /* AD7124_Config_1 */ - {0x1B, 0x0860, 2, 1}, /* AD7124_Config_2 */ - {0x1C, 0x0860, 2, 1}, /* AD7124_Config_3 */ - {0x1D, 0x0860, 2, 1}, /* AD7124_Config_4 */ - {0x1E, 0x0860, 2, 1}, /* AD7124_Config_5 */ - {0x1F, 0x0860, 2, 1}, /* AD7124_Config_6 */ - {0x20, 0x0860, 2, 1}, /* AD7124_Config_7 */ - {0x21, 0x060180, 3, 1}, /* AD7124_Filter_0 */ - {0x22, 0x060180, 3, 1}, /* AD7124_Filter_1 */ - {0x23, 0x060180, 3, 1}, /* AD7124_Filter_2 */ - {0x24, 0x060180, 3, 1}, /* AD7124_Filter_3 */ - {0x25, 0x060180, 3, 1}, /* AD7124_Filter_4 */ - {0x26, 0x060180, 3, 1}, /* AD7124_Filter_5 */ - {0x27, 0x060180, 3, 1}, /* AD7124_Filter_6 */ - {0x28, 0x060180, 3, 1}, /* AD7124_Filter_7 */ - {0x29, 0x800000, 3, 1}, /* AD7124_Offset_0 */ - {0x2A, 0x800000, 3, 1}, /* AD7124_Offset_1 */ - {0x2B, 0x800000, 3, 1}, /* AD7124_Offset_2 */ - {0x2C, 0x800000, 3, 1}, /* AD7124_Offset_3 */ - {0x2D, 0x800000, 3, 1}, /* AD7124_Offset_4 */ - {0x2E, 0x800000, 3, 1}, /* AD7124_Offset_5 */ - {0x2F, 0x800000, 3, 1}, /* AD7124_Offset_6 */ - {0x30, 0x800000, 3, 1}, /* AD7124_Offset_7 */ - {0x31, 0x500000, 3, 1}, /* AD7124_Gain_0 */ - {0x32, 0x500000, 3, 1}, /* AD7124_Gain_1 */ - {0x33, 0x500000, 3, 1}, /* AD7124_Gain_2 */ - {0x34, 0x500000, 3, 1}, /* AD7124_Gain_3 */ - {0x35, 0x500000, 3, 1}, /* AD7124_Gain_4 */ - {0x36, 0x500000, 3, 1}, /* AD7124_Gain_5 */ - {0x37, 0x500000, 3, 1}, /* AD7124_Gain_6 */ - {0x38, 0x500000, 3, 1}, /* AD7124_Gain_7 */ - }; + ad7124_st_reg ad7124_regs[57]; + +private: + enum { + AD7124_RW = 1, /* Read and Write */ + AD7124_R = 2, /* Read only */ + AD7124_W = 3, /* Write only */ + } ad7124_reg_access; + + /* AD7124 Register Map */ @@ -487,6 +432,8 @@ #define TIMEOUT -3 /* A timeout has occured */ }; + + #endif