ARM Shanghai IoT Team (Internal) / wifirtos

the changes on the rtos to adapt the wifi

Fork of mbed-rtos by mbed official

rtx/LPC11U24/uARM/HAL_CM0.c@11:db1fc233faa9, 2013-04-30 (annotated)

Committer:
emilmont
Date:
Tue Apr 30 10:51:19 2013 +0000
Revision:
11:db1fc233faa9
Parent:
6:350b53afb889 
In the Keil MDK toolchain "RTX_Config.h" is a special system library header file

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 6:350b53afb889 1 /*----------------------------------------------------------------------------
emilmont 6:350b53afb889 2 * RL-ARM - RTX
emilmont 6:350b53afb889 3 *----------------------------------------------------------------------------
emilmont 6:350b53afb889 4 * Name: HAL_CM0.C
emilmont 6:350b53afb889 5 * Purpose: Hardware Abstraction Layer for Cortex-M0
emilmont 6:350b53afb889 6 * Rev.: V4.60
emilmont 6:350b53afb889 7 *----------------------------------------------------------------------------
emilmont 6:350b53afb889 8 *
emilmont 6:350b53afb889 9 * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
emilmont 6:350b53afb889 10 * All rights reserved.
emilmont 6:350b53afb889 11 * Redistribution and use in source and binary forms, with or without
emilmont 6:350b53afb889 12 * modification, are permitted provided that the following conditions are met:
emilmont 6:350b53afb889 13 * - Redistributions of source code must retain the above copyright
emilmont 6:350b53afb889 14 * notice, this list of conditions and the following disclaimer.
emilmont 6:350b53afb889 15 * - Redistributions in binary form must reproduce the above copyright
emilmont 6:350b53afb889 16 * notice, this list of conditions and the following disclaimer in the
emilmont 6:350b53afb889 17 * documentation and/or other materials provided with the distribution.
emilmont 6:350b53afb889 18 * - Neither the name of ARM nor the names of its contributors may be used
emilmont 6:350b53afb889 19 * to endorse or promote products derived from this software without
emilmont 6:350b53afb889 20 * specific prior written permission.
emilmont 6:350b53afb889 21 *
emilmont 6:350b53afb889 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 6:350b53afb889 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 6:350b53afb889 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
emilmont 6:350b53afb889 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
emilmont 6:350b53afb889 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
emilmont 6:350b53afb889 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
emilmont 6:350b53afb889 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
emilmont 6:350b53afb889 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
emilmont 6:350b53afb889 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
emilmont 6:350b53afb889 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emilmont 6:350b53afb889 32 * POSSIBILITY OF SUCH DAMAGE.
emilmont 6:350b53afb889 33 *---------------------------------------------------------------------------*/
emilmont 6:350b53afb889 34
emilmont 6:350b53afb889 35 #include "rt_TypeDef.h"
emilmont 11:db1fc233faa9 36 #include "RTX_Conf.h"
emilmont 6:350b53afb889 37 #include "rt_System.h"
emilmont 6:350b53afb889 38 #include "rt_HAL_CM.h"
emilmont 6:350b53afb889 39 #include "rt_Task.h"
emilmont 6:350b53afb889 40 #include "rt_MemBox.h"
emilmont 6:350b53afb889 41
emilmont 6:350b53afb889 42
emilmont 6:350b53afb889 43 /*----------------------------------------------------------------------------
emilmont 6:350b53afb889 44 * Functions
emilmont 6:350b53afb889 45 *---------------------------------------------------------------------------*/
emilmont 6:350b53afb889 46
emilmont 6:350b53afb889 47
emilmont 6:350b53afb889 48 /*--------------------------- rt_set_PSP ------------------------------------*/
emilmont 6:350b53afb889 49
emilmont 6:350b53afb889 50 __asm void rt_set_PSP (U32 stack) {
emilmont 6:350b53afb889 51 MSR PSP,R0
emilmont 6:350b53afb889 52 BX LR
emilmont 6:350b53afb889 53 }
emilmont 6:350b53afb889 54
emilmont 6:350b53afb889 55
emilmont 6:350b53afb889 56 /*--------------------------- rt_get_PSP ------------------------------------*/
emilmont 6:350b53afb889 57
emilmont 6:350b53afb889 58 __asm U32 rt_get_PSP (void) {
emilmont 6:350b53afb889 59 MRS R0,PSP
emilmont 6:350b53afb889 60 BX LR
emilmont 6:350b53afb889 61 }
emilmont 6:350b53afb889 62
emilmont 6:350b53afb889 63
emilmont 6:350b53afb889 64 /*--------------------------- os_set_env ------------------------------------*/
emilmont 6:350b53afb889 65
emilmont 6:350b53afb889 66 __asm void os_set_env (void) {
emilmont 6:350b53afb889 67 /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
emilmont 6:350b53afb889 68 MOV R0,SP ; PSP = MSP
emilmont 6:350b53afb889 69 MSR PSP,R0
emilmont 6:350b53afb889 70 LDR R0,=__cpp(&os_flags)
emilmont 6:350b53afb889 71 LDRB R0,[R0]
emilmont 6:350b53afb889 72 LSLS R0,#31
emilmont 6:350b53afb889 73 BNE PrivilegedE
emilmont 6:350b53afb889 74 MOVS R0,#0x03 ; Unprivileged Thread mode, use PSP
emilmont 6:350b53afb889 75 MSR CONTROL,R0
emilmont 6:350b53afb889 76 BX LR
emilmont 6:350b53afb889 77 PrivilegedE
emilmont 6:350b53afb889 78 MOVS R0,#0x02 ; Privileged Thread mode, use PSP
emilmont 6:350b53afb889 79 MSR CONTROL,R0
emilmont 6:350b53afb889 80 BX LR
emilmont 6:350b53afb889 81
emilmont 6:350b53afb889 82 ALIGN
emilmont 6:350b53afb889 83 }
emilmont 6:350b53afb889 84
emilmont 6:350b53afb889 85
emilmont 6:350b53afb889 86 /*--------------------------- _alloc_box ------------------------------------*/
emilmont 6:350b53afb889 87
emilmont 6:350b53afb889 88 __asm void *_alloc_box (void *box_mem) {
emilmont 6:350b53afb889 89 /* Function wrapper for Unprivileged/Privileged mode. */
emilmont 6:350b53afb889 90 LDR R3,=__cpp(rt_alloc_box)
emilmont 6:350b53afb889 91 MOV R12,R3
emilmont 6:350b53afb889 92 MRS R3,IPSR
emilmont 6:350b53afb889 93 LSLS R3,#24
emilmont 6:350b53afb889 94 BNE PrivilegedA
emilmont 6:350b53afb889 95 MRS R3,CONTROL
emilmont 6:350b53afb889 96 LSLS R3,#31
emilmont 6:350b53afb889 97 BEQ PrivilegedA
emilmont 6:350b53afb889 98 SVC 0
emilmont 6:350b53afb889 99 BX LR
emilmont 6:350b53afb889 100 PrivilegedA
emilmont 6:350b53afb889 101 BX R12
emilmont 6:350b53afb889 102
emilmont 6:350b53afb889 103 ALIGN
emilmont 6:350b53afb889 104 }
emilmont 6:350b53afb889 105
emilmont 6:350b53afb889 106
emilmont 6:350b53afb889 107 /*--------------------------- _free_box -------------------------------------*/
emilmont 6:350b53afb889 108
emilmont 6:350b53afb889 109 __asm int _free_box (void *box_mem, void *box) {
emilmont 6:350b53afb889 110 /* Function wrapper for Unprivileged/Privileged mode. */
emilmont 6:350b53afb889 111 LDR R3,=__cpp(rt_free_box)
emilmont 6:350b53afb889 112 MOV R12,R3
emilmont 6:350b53afb889 113 MRS R3,IPSR
emilmont 6:350b53afb889 114 LSLS R3,#24
emilmont 6:350b53afb889 115 BNE PrivilegedF
emilmont 6:350b53afb889 116 MRS R3,CONTROL
emilmont 6:350b53afb889 117 LSLS R3,#31
emilmont 6:350b53afb889 118 BEQ PrivilegedF
emilmont 6:350b53afb889 119 SVC 0
emilmont 6:350b53afb889 120 BX LR
emilmont 6:350b53afb889 121 PrivilegedF
emilmont 6:350b53afb889 122 BX R12
emilmont 6:350b53afb889 123
emilmont 6:350b53afb889 124 ALIGN
emilmont 6:350b53afb889 125 }
emilmont 6:350b53afb889 126
emilmont 6:350b53afb889 127
emilmont 6:350b53afb889 128 /*-------------------------- SVC_Handler ------------------------------------*/
emilmont 6:350b53afb889 129
emilmont 6:350b53afb889 130 __asm void SVC_Handler (void) {
emilmont 6:350b53afb889 131 PRESERVE8
emilmont 6:350b53afb889 132
emilmont 6:350b53afb889 133 IMPORT SVC_Count
emilmont 6:350b53afb889 134 IMPORT SVC_Table
emilmont 6:350b53afb889 135 IMPORT rt_stk_check
emilmont 6:350b53afb889 136
emilmont 6:350b53afb889 137 MRS R0,PSP ; Read PSP
emilmont 6:350b53afb889 138 LDR R1,[R0,#24] ; Read Saved PC from Stack
emilmont 6:350b53afb889 139 SUBS R1,R1,#2 ; Point to SVC Instruction
emilmont 6:350b53afb889 140 LDRB R1,[R1] ; Load SVC Number
emilmont 6:350b53afb889 141 CMP R1,#0
emilmont 6:350b53afb889 142 BNE SVC_User ; User SVC Number > 0
emilmont 6:350b53afb889 143
emilmont 6:350b53afb889 144 MOV LR,R4
emilmont 6:350b53afb889 145 LDMIA R0,{R0-R3,R4} ; Read R0-R3,R12 from stack
emilmont 6:350b53afb889 146 MOV R12,R4
emilmont 6:350b53afb889 147 MOV R4,LR
emilmont 6:350b53afb889 148 BLX R12 ; Call SVC Function
emilmont 6:350b53afb889 149
emilmont 6:350b53afb889 150 MRS R3,PSP ; Read PSP
emilmont 6:350b53afb889 151 STMIA R3!,{R0-R2} ; Store return values
emilmont 6:350b53afb889 152
emilmont 6:350b53afb889 153 LDR R3,=__cpp(&os_tsk)
emilmont 6:350b53afb889 154 LDMIA R3!,{R1,R2} ; os_tsk.run, os_tsk.new
emilmont 6:350b53afb889 155 CMP R1,R2
emilmont 6:350b53afb889 156 BEQ SVC_Exit ; no task switch
emilmont 6:350b53afb889 157
emilmont 6:350b53afb889 158 SUBS R3,#8
emilmont 6:350b53afb889 159 CMP R1,#0 ; Runtask deleted?
emilmont 6:350b53afb889 160 BEQ SVC_Next
emilmont 6:350b53afb889 161
emilmont 6:350b53afb889 162 MRS R0,PSP ; Read PSP
emilmont 6:350b53afb889 163 SUBS R0,R0,#32 ; Adjust Start Address
emilmont 6:350b53afb889 164 STR R0,[R1,#TCB_TSTACK] ; Update os_tsk.run->tsk_stack
emilmont 6:350b53afb889 165 STMIA R0!,{R4-R7} ; Save old context (R4-R7)
emilmont 6:350b53afb889 166 MOV R4,R8
emilmont 6:350b53afb889 167 MOV R5,R9
emilmont 6:350b53afb889 168 MOV R6,R10
emilmont 6:350b53afb889 169 MOV R7,R11
emilmont 6:350b53afb889 170 STMIA R0!,{R4-R7} ; Save old context (R8-R11)
emilmont 6:350b53afb889 171
emilmont 6:350b53afb889 172 PUSH {R2,R3}
emilmont 6:350b53afb889 173 BL rt_stk_check ; Check for Stack overflow
emilmont 6:350b53afb889 174 POP {R2,R3}
emilmont 6:350b53afb889 175
emilmont 6:350b53afb889 176 SVC_Next
emilmont 6:350b53afb889 177 STR R2,[R3] ; os_tsk.run = os_tsk.new
emilmont 6:350b53afb889 178
emilmont 6:350b53afb889 179 LDR R0,[R2,#TCB_TSTACK] ; os_tsk.new->tsk_stack
emilmont 6:350b53afb889 180 ADDS R0,R0,#16 ; Adjust Start Address
emilmont 6:350b53afb889 181 LDMIA R0!,{R4-R7} ; Restore new Context (R8-R11)
emilmont 6:350b53afb889 182 MOV R8,R4
emilmont 6:350b53afb889 183 MOV R9,R5
emilmont 6:350b53afb889 184 MOV R10,R6
emilmont 6:350b53afb889 185 MOV R11,R7
emilmont 6:350b53afb889 186 MSR PSP,R0 ; Write PSP
emilmont 6:350b53afb889 187 SUBS R0,R0,#32 ; Adjust Start Address
emilmont 6:350b53afb889 188 LDMIA R0!,{R4-R7} ; Restore new Context (R4-R7)
emilmont 6:350b53afb889 189
emilmont 6:350b53afb889 190 SVC_Exit
emilmont 6:350b53afb889 191 MOVS R0,#:NOT:0xFFFFFFFD ; Set EXC_RETURN value
emilmont 6:350b53afb889 192 MVNS R0,R0
emilmont 6:350b53afb889 193 BX R0 ; RETI to Thread Mode, use PSP
emilmont 6:350b53afb889 194
emilmont 6:350b53afb889 195 /*------------------- User SVC ------------------------------*/
emilmont 6:350b53afb889 196
emilmont 6:350b53afb889 197 SVC_User
emilmont 6:350b53afb889 198 PUSH {R4,LR} ; Save Registers
emilmont 6:350b53afb889 199 LDR R2,=SVC_Count
emilmont 6:350b53afb889 200 LDR R2,[R2]
emilmont 6:350b53afb889 201 CMP R1,R2
emilmont 6:350b53afb889 202 BHI SVC_Done ; Overflow
emilmont 6:350b53afb889 203
emilmont 6:350b53afb889 204 LDR R4,=SVC_Table-4
emilmont 6:350b53afb889 205 LSLS R1,R1,#2
emilmont 6:350b53afb889 206 LDR R4,[R4,R1] ; Load SVC Function Address
emilmont 6:350b53afb889 207 MOV LR,R4
emilmont 6:350b53afb889 208
emilmont 6:350b53afb889 209 LDMIA R0,{R0-R3,R4} ; Read R0-R3,R12 from stack
emilmont 6:350b53afb889 210 MOV R12,R4
emilmont 6:350b53afb889 211 BLX LR ; Call SVC Function
emilmont 6:350b53afb889 212
emilmont 6:350b53afb889 213 MRS R4,PSP ; Read PSP
emilmont 6:350b53afb889 214 STMIA R4!,{R0-R3} ; Function return values
emilmont 6:350b53afb889 215 SVC_Done
emilmont 6:350b53afb889 216 POP {R4,PC} ; RETI
emilmont 6:350b53afb889 217
emilmont 6:350b53afb889 218 ALIGN
emilmont 6:350b53afb889 219 }
emilmont 6:350b53afb889 220
emilmont 6:350b53afb889 221
emilmont 6:350b53afb889 222 /*-------------------------- PendSV_Handler ---------------------------------*/
emilmont 6:350b53afb889 223
emilmont 6:350b53afb889 224 __asm void PendSV_Handler (void) {
emilmont 6:350b53afb889 225 PRESERVE8
emilmont 6:350b53afb889 226
emilmont 6:350b53afb889 227 BL __cpp(rt_pop_req)
emilmont 6:350b53afb889 228
emilmont 6:350b53afb889 229 Sys_Switch
emilmont 6:350b53afb889 230 LDR R3,=__cpp(&os_tsk)
emilmont 6:350b53afb889 231 LDMIA R3!,{R1,R2} ; os_tsk.run, os_tsk.new
emilmont 6:350b53afb889 232 CMP R1,R2
emilmont 6:350b53afb889 233 BEQ Sys_Exit ; no task switch
emilmont 6:350b53afb889 234
emilmont 6:350b53afb889 235 SUBS R3,#8
emilmont 6:350b53afb889 236
emilmont 6:350b53afb889 237 MRS R0,PSP ; Read PSP
emilmont 6:350b53afb889 238 SUBS R0,R0,#32 ; Adjust Start Address
emilmont 6:350b53afb889 239 STR R0,[R1,#TCB_TSTACK] ; Update os_tsk.run->tsk_stack
emilmont 6:350b53afb889 240 STMIA R0!,{R4-R7} ; Save old context (R4-R7)
emilmont 6:350b53afb889 241 MOV R4,R8
emilmont 6:350b53afb889 242 MOV R5,R9
emilmont 6:350b53afb889 243 MOV R6,R10
emilmont 6:350b53afb889 244 MOV R7,R11
emilmont 6:350b53afb889 245 STMIA R0!,{R4-R7} ; Save old context (R8-R11)
emilmont 6:350b53afb889 246
emilmont 6:350b53afb889 247 PUSH {R2,R3}
emilmont 6:350b53afb889 248 BL rt_stk_check ; Check for Stack overflow
emilmont 6:350b53afb889 249 POP {R2,R3}
emilmont 6:350b53afb889 250
emilmont 6:350b53afb889 251 STR R2,[R3] ; os_tsk.run = os_tsk.new
emilmont 6:350b53afb889 252
emilmont 6:350b53afb889 253 LDR R0,[R2,#TCB_TSTACK] ; os_tsk.new->tsk_stack
emilmont 6:350b53afb889 254 ADDS R0,R0,#16 ; Adjust Start Address
emilmont 6:350b53afb889 255 LDMIA R0!,{R4-R7} ; Restore new Context (R8-R11)
emilmont 6:350b53afb889 256 MOV R8,R4
emilmont 6:350b53afb889 257 MOV R9,R5
emilmont 6:350b53afb889 258 MOV R10,R6
emilmont 6:350b53afb889 259 MOV R11,R7
emilmont 6:350b53afb889 260 MSR PSP,R0 ; Write PSP
emilmont 6:350b53afb889 261 SUBS R0,R0,#32 ; Adjust Start Address
emilmont 6:350b53afb889 262 LDMIA R0!,{R4-R7} ; Restore new Context (R4-R7)
emilmont 6:350b53afb889 263
emilmont 6:350b53afb889 264 Sys_Exit
emilmont 6:350b53afb889 265 MOVS R0,#:NOT:0xFFFFFFFD ; Set EXC_RETURN value
emilmont 6:350b53afb889 266 MVNS R0,R0
emilmont 6:350b53afb889 267 BX R0 ; RETI to Thread Mode, use PSP
emilmont 6:350b53afb889 268
emilmont 6:350b53afb889 269 ALIGN
emilmont 6:350b53afb889 270 }
emilmont 6:350b53afb889 271
emilmont 6:350b53afb889 272
emilmont 6:350b53afb889 273 /*-------------------------- SysTick_Handler --------------------------------*/
emilmont 6:350b53afb889 274
emilmont 6:350b53afb889 275 __asm void SysTick_Handler (void) {
emilmont 6:350b53afb889 276 PRESERVE8
emilmont 6:350b53afb889 277
emilmont 6:350b53afb889 278 BL __cpp(rt_systick)
emilmont 6:350b53afb889 279 B Sys_Switch
emilmont 6:350b53afb889 280
emilmont 6:350b53afb889 281 ALIGN
emilmont 6:350b53afb889 282 }
emilmont 6:350b53afb889 283
emilmont 6:350b53afb889 284
emilmont 6:350b53afb889 285 /*-------------------------- OS_Tick_Handler --------------------------------*/
emilmont 6:350b53afb889 286
emilmont 6:350b53afb889 287 __asm void OS_Tick_Handler (void) {
emilmont 6:350b53afb889 288 PRESERVE8
emilmont 6:350b53afb889 289
emilmont 6:350b53afb889 290 BL __cpp(os_tick_irqack)
emilmont 6:350b53afb889 291 BL __cpp(rt_systick)
emilmont 6:350b53afb889 292 B Sys_Switch
emilmont 6:350b53afb889 293
emilmont 6:350b53afb889 294 ALIGN
emilmont 6:350b53afb889 295 }
emilmont 6:350b53afb889 296
emilmont 6:350b53afb889 297
emilmont 6:350b53afb889 298 /*----------------------------------------------------------------------------
emilmont 6:350b53afb889 299 * end of file
emilmont 6:350b53afb889 300 *---------------------------------------------------------------------------*/
emilmont 6:350b53afb889 301