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LPC2368/vector_defns.h@11:1c1ebd0324fa, 2009-08-28 (annotated)

Committer:
rolf.meyer@arm.com
Date:
Fri Aug 28 12:10:11 2009 +0000
Revision:
11:1c1ebd0324fa
A shiny new version

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rolf.meyer@arm.com 11:1c1ebd0324fa 1 /* mbed Microcontroller Library - Vectors
rolf.meyer@arm.com 11:1c1ebd0324fa 2 * Copyright (c) 2006-2009 ARM Limited. All rights reserved.
rolf.meyer@arm.com 11:1c1ebd0324fa 3 * sford, jbrawn
rolf.meyer@arm.com 11:1c1ebd0324fa 4 */
rolf.meyer@arm.com 11:1c1ebd0324fa 5
rolf.meyer@arm.com 11:1c1ebd0324fa 6 #ifndef MBED_VECTOR_DEFNS_H
rolf.meyer@arm.com 11:1c1ebd0324fa 7 #define MBED_VECTOR_DEFNS_H
rolf.meyer@arm.com 11:1c1ebd0324fa 8
rolf.meyer@arm.com 11:1c1ebd0324fa 9 // Assember Macros
rolf.meyer@arm.com 11:1c1ebd0324fa 10 #ifdef __ARMCC_VERSION
rolf.meyer@arm.com 11:1c1ebd0324fa 11 #define EXPORT(x) EXPORT x
rolf.meyer@arm.com 11:1c1ebd0324fa 12 #define WEAK_EXPORT(x) EXPORT x [WEAK]
rolf.meyer@arm.com 11:1c1ebd0324fa 13 #define IMPORT(x) IMPORT x
rolf.meyer@arm.com 11:1c1ebd0324fa 14 #define LABEL(x) x
rolf.meyer@arm.com 11:1c1ebd0324fa 15 #else
rolf.meyer@arm.com 11:1c1ebd0324fa 16 #define EXPORT(x) .global x
rolf.meyer@arm.com 11:1c1ebd0324fa 17 #define WEAK_EXPORT(x) .weak x
rolf.meyer@arm.com 11:1c1ebd0324fa 18 #define IMPORT(x) .global x
rolf.meyer@arm.com 11:1c1ebd0324fa 19 #define LABEL(x) x:
rolf.meyer@arm.com 11:1c1ebd0324fa 20 #endif
rolf.meyer@arm.com 11:1c1ebd0324fa 21
rolf.meyer@arm.com 11:1c1ebd0324fa 22 // RealMonitor
rolf.meyer@arm.com 11:1c1ebd0324fa 23 // Requires RAM (0x40000040-0x4000011F) to be allocated by the linker
rolf.meyer@arm.com 11:1c1ebd0324fa 24
rolf.meyer@arm.com 11:1c1ebd0324fa 25 // RealMonitor entry points
rolf.meyer@arm.com 11:1c1ebd0324fa 26 #define rm_init_entry 0x7fffff91
rolf.meyer@arm.com 11:1c1ebd0324fa 27 #define rm_undef_handler 0x7fffffa0
rolf.meyer@arm.com 11:1c1ebd0324fa 28 #define rm_prefetchabort_handler 0x7fffffb0
rolf.meyer@arm.com 11:1c1ebd0324fa 29 #define rm_dataabort_handler 0x7fffffc0
rolf.meyer@arm.com 11:1c1ebd0324fa 30 #define rm_irqhandler2 0x7fffffe0
rolf.meyer@arm.com 11:1c1ebd0324fa 31 //#define rm_RunningToStopped 0x7ffff808 // ARM - MBED64
rolf.meyer@arm.com 11:1c1ebd0324fa 32 #define rm_RunningToStopped 0x7ffff820 // ARM - PHAT40
rolf.meyer@arm.com 11:1c1ebd0324fa 33
rolf.meyer@arm.com 11:1c1ebd0324fa 34 // Unofficial RealMonitor entry points and variables
rolf.meyer@arm.com 11:1c1ebd0324fa 35 #define RM_MSG_SWI 0x00940000
rolf.meyer@arm.com 11:1c1ebd0324fa 36 #define StateP 0x40000040
rolf.meyer@arm.com 11:1c1ebd0324fa 37
rolf.meyer@arm.com 11:1c1ebd0324fa 38 // VIC register addresses
rolf.meyer@arm.com 11:1c1ebd0324fa 39 #define VIC_Base 0xfffff000
rolf.meyer@arm.com 11:1c1ebd0324fa 40 #define VICAddress_Offset 0xf00
rolf.meyer@arm.com 11:1c1ebd0324fa 41 #define VICVectAddr2_Offset 0x108
rolf.meyer@arm.com 11:1c1ebd0324fa 42 #define VICVectAddr3_Offset 0x10c
rolf.meyer@arm.com 11:1c1ebd0324fa 43 #define VICIntEnClr_Offset 0x014
rolf.meyer@arm.com 11:1c1ebd0324fa 44 #define VICIntEnClr (*(volatile unsigned long *)(VIC_Base + 0x014))
rolf.meyer@arm.com 11:1c1ebd0324fa 45 #define VICVectAddr2 (*(volatile unsigned long *)(VIC_Base + 0x108))
rolf.meyer@arm.com 11:1c1ebd0324fa 46 #define VICVectAddr3 (*(volatile unsigned long *)(VIC_Base + 0x10C))
rolf.meyer@arm.com 11:1c1ebd0324fa 47
rolf.meyer@arm.com 11:1c1ebd0324fa 48 // ARM Mode bits and Interrupt flags in PSRs
rolf.meyer@arm.com 11:1c1ebd0324fa 49 #define Mode_USR 0x10
rolf.meyer@arm.com 11:1c1ebd0324fa 50 #define Mode_FIQ 0x11
rolf.meyer@arm.com 11:1c1ebd0324fa 51 #define Mode_IRQ 0x12
rolf.meyer@arm.com 11:1c1ebd0324fa 52 #define Mode_SVC 0x13
rolf.meyer@arm.com 11:1c1ebd0324fa 53 #define Mode_ABT 0x17
rolf.meyer@arm.com 11:1c1ebd0324fa 54 #define Mode_UND 0x1B
rolf.meyer@arm.com 11:1c1ebd0324fa 55 #define Mode_SYS 0x1F
rolf.meyer@arm.com 11:1c1ebd0324fa 56 #define I_Bit 0x80 // when I bit is set, IRQ is disabled
rolf.meyer@arm.com 11:1c1ebd0324fa 57 #define F_Bit 0x40 // when F bit is set, FIQ is disabled
rolf.meyer@arm.com 11:1c1ebd0324fa 58
rolf.meyer@arm.com 11:1c1ebd0324fa 59 // MCU RAM
rolf.meyer@arm.com 11:1c1ebd0324fa 60 #define LPC2368_RAM_ADDRESS 0x40000000 // RAM Base
rolf.meyer@arm.com 11:1c1ebd0324fa 61 #define LPC2368_RAM_SIZE 0x8000 // 32KB
rolf.meyer@arm.com 11:1c1ebd0324fa 62
rolf.meyer@arm.com 11:1c1ebd0324fa 63 // ISR Stack Allocation
rolf.meyer@arm.com 11:1c1ebd0324fa 64 #define UND_stack_size 0x00000040
rolf.meyer@arm.com 11:1c1ebd0324fa 65 #define SVC_stack_size 0x00000040
rolf.meyer@arm.com 11:1c1ebd0324fa 66 #define ABT_stack_size 0x00000040
rolf.meyer@arm.com 11:1c1ebd0324fa 67 #define FIQ_stack_size 0x00000000
rolf.meyer@arm.com 11:1c1ebd0324fa 68 #define IRQ_stack_size 0x00000040
rolf.meyer@arm.com 11:1c1ebd0324fa 69
rolf.meyer@arm.com 11:1c1ebd0324fa 70 #define ISR_stack_size (UND_stack_size + SVC_stack_size + ABT_stack_size + FIQ_stack_size + IRQ_stack_size)
rolf.meyer@arm.com 11:1c1ebd0324fa 71
rolf.meyer@arm.com 11:1c1ebd0324fa 72 // Full Descending Stack, so top-most stack points to just above the top of RAM
rolf.meyer@arm.com 11:1c1ebd0324fa 73 #define LPC2368_STACK_TOP (LPC2368_RAM_ADDRESS + LPC2368_RAM_SIZE)
rolf.meyer@arm.com 11:1c1ebd0324fa 74 #define USR_STACK_TOP (LPC2368_STACK_TOP - ISR_stack_size)
rolf.meyer@arm.com 11:1c1ebd0324fa 75
rolf.meyer@arm.com 11:1c1ebd0324fa 76 #endif