航空研究会 / MPU9255

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MPU9255Regs.h@0:5a3104f02775, 2020-06-28 (annotated)

Committer:
imanomadao
Date:
Sun Jun 28 11:10:43 2020 +0000
Revision:
0:5a3104f02775
a;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
imanomadao 0:5a3104f02775 1 #ifndef MPU9250_REGISTER_H
imanomadao 0:5a3104f02775 2 #define MPU9250_REGISTER_H
imanomadao 0:5a3104f02775 3
imanomadao 0:5a3104f02775 4 // See also MPU-9250 Register Map and Descriptions, Revision 4.0, RM-MPU-9250A-00, Rev. 1.4, 9/9/2013 for registers not listed in
imanomadao 0:5a3104f02775 5 // above document; the MPU9250 and MPU9150 are virtually identical but the latter has a different register map
imanomadao 0:5a3104f02775 6
imanomadao 0:5a3104f02775 7 //AK8963 registers
imanomadao 0:5a3104f02775 8 #define AK8963_ADDRESS 0x0C // used in slave mode, ak8963c's adress is 0x0c
imanomadao 0:5a3104f02775 9 #define WHO_AM_I_AK8963 0x00 // should return 0x48
imanomadao 0:5a3104f02775 10 #define INFO 0x01
imanomadao 0:5a3104f02775 11 #define AK8963_ST1 0x02 // data ready status bit 0
imanomadao 0:5a3104f02775 12 #define AK8963_XOUT_L 0x03 // data
imanomadao 0:5a3104f02775 13 #define AK8963_XOUT_H 0x04
imanomadao 0:5a3104f02775 14 #define AK8963_YOUT_L 0x05
imanomadao 0:5a3104f02775 15 #define AK8963_YOUT_H 0x06
imanomadao 0:5a3104f02775 16 #define AK8963_ZOUT_L 0x07
imanomadao 0:5a3104f02775 17 #define AK8963_ZOUT_H 0x08
imanomadao 0:5a3104f02775 18 #define AK8963_ST2 0x09 // Data overflow bit 3 and data read error status bit 2
imanomadao 0:5a3104f02775 19 #define AK8963_CNTL 0x0A // Power down (0000), single-measurement (0001), self-test (1000) and Fuse ROM (1111) modes on bits 3:0
imanomadao 0:5a3104f02775 20 #define AK8963_CNTL2 0x0B // Reset
imanomadao 0:5a3104f02775 21 #define AK8963_ASTC 0x0C // Self test control
imanomadao 0:5a3104f02775 22 #define AK8963_I2CDIS 0x0F // I2C disable
imanomadao 0:5a3104f02775 23 #define AK8963_ASAX 0x10 // Fuse ROM x-axis sensitivity adjustment value
imanomadao 0:5a3104f02775 24 #define AK8963_ASAY 0x11 // Fuse ROM y-axis sensitivity adjustment value
imanomadao 0:5a3104f02775 25 #define AK8963_ASAZ 0x12 // Fuse ROM z-axis sensitivity adjustment value
imanomadao 0:5a3104f02775 26
imanomadao 0:5a3104f02775 27
imanomadao 0:5a3104f02775 28
imanomadao 0:5a3104f02775 29 //MPU9255 register
imanomadao 0:5a3104f02775 30 #define ADO 0
imanomadao 0:5a3104f02775 31 #if ADO
imanomadao 0:5a3104f02775 32 #define MPU9255_ADDRESS 0x69<<1 // Device address when ADO = 1
imanomadao 0:5a3104f02775 33 #else
imanomadao 0:5a3104f02775 34 #define MPU9255_ADDRESS 0x68<<1 // Device address when ADO = 0
imanomadao 0:5a3104f02775 35 #endif
imanomadao 0:5a3104f02775 36
imanomadao 0:5a3104f02775 37 #define SELF_TEST_X_GYRO 0x00
imanomadao 0:5a3104f02775 38 #define SELF_TEST_Y_GYRO 0x01
imanomadao 0:5a3104f02775 39 #define SELF_TEST_Z_GYRO 0x02
imanomadao 0:5a3104f02775 40
imanomadao 0:5a3104f02775 41 #define SELF_TEST_X_ACCEL 0x0D
imanomadao 0:5a3104f02775 42 #define SELF_TEST_Y_ACCEL 0x0E
imanomadao 0:5a3104f02775 43 #define SELF_TEST_Z_ACCEL 0x0F
imanomadao 0:5a3104f02775 44
imanomadao 0:5a3104f02775 45 #define SELF_TEST_A 0x10
imanomadao 0:5a3104f02775 46
imanomadao 0:5a3104f02775 47 #define XG_OFFSET_H 0x13 // User-defined trim values for gyroscope
imanomadao 0:5a3104f02775 48 #define XG_OFFSET_L 0x14
imanomadao 0:5a3104f02775 49 #define YG_OFFSET_H 0x15
imanomadao 0:5a3104f02775 50 #define YG_OFFSET_L 0x16
imanomadao 0:5a3104f02775 51 #define ZG_OFFSET_H 0x17
imanomadao 0:5a3104f02775 52 #define ZG_OFFSET_L 0x18
imanomadao 0:5a3104f02775 53 #define SMPLRT_DIV 0x19
imanomadao 0:5a3104f02775 54 #define CONFIG 0x1A
imanomadao 0:5a3104f02775 55 #define GYRO_CONFIG 0x1B
imanomadao 0:5a3104f02775 56 #define ACCEL_CONFIG 0x1C
imanomadao 0:5a3104f02775 57 #define ACCEL_CONFIG2 0x1D
imanomadao 0:5a3104f02775 58 #define LP_ACCEL_ODR 0x1E
imanomadao 0:5a3104f02775 59 #define WOM_THR 0x1F
imanomadao 0:5a3104f02775 60
imanomadao 0:5a3104f02775 61 #define MOT_DUR 0x20 // Duration counter threshold for motion interrupt generation, 1 kHz rate, LSB = 1 ms
imanomadao 0:5a3104f02775 62 #define ZMOT_THR 0x21 // Zero-motion detection threshold bits [7:0]
imanomadao 0:5a3104f02775 63 #define ZRMOT_DUR 0x22 // Duration counter threshold for zero motion interrupt generation, 16 Hz rate, LSB = 64 ms
imanomadao 0:5a3104f02775 64
imanomadao 0:5a3104f02775 65 #define FIFO_EN 0x23
imanomadao 0:5a3104f02775 66 #define I2C_MST_CTRL 0x24
imanomadao 0:5a3104f02775 67 #define I2C_SLV0_ADDR 0x25
imanomadao 0:5a3104f02775 68 #define I2C_SLV0_REG 0x26
imanomadao 0:5a3104f02775 69 #define I2C_SLV0_CTRL 0x27
imanomadao 0:5a3104f02775 70 #define I2C_SLV1_ADDR 0x28
imanomadao 0:5a3104f02775 71 #define I2C_SLV1_REG 0x29
imanomadao 0:5a3104f02775 72 #define I2C_SLV1_CTRL 0x2A
imanomadao 0:5a3104f02775 73 #define I2C_SLV2_ADDR 0x2B
imanomadao 0:5a3104f02775 74 #define I2C_SLV2_REG 0x2C
imanomadao 0:5a3104f02775 75 #define I2C_SLV2_CTRL 0x2D
imanomadao 0:5a3104f02775 76 #define I2C_SLV3_ADDR 0x2E
imanomadao 0:5a3104f02775 77 #define I2C_SLV3_REG 0x2F
imanomadao 0:5a3104f02775 78 #define I2C_SLV3_CTRL 0x30
imanomadao 0:5a3104f02775 79 #define I2C_SLV4_ADDR 0x31
imanomadao 0:5a3104f02775 80 #define I2C_SLV4_REG 0x32
imanomadao 0:5a3104f02775 81 #define I2C_SLV4_DO 0x33
imanomadao 0:5a3104f02775 82 #define I2C_SLV4_CTRL 0x34
imanomadao 0:5a3104f02775 83 #define I2C_SLV4_DI 0x35
imanomadao 0:5a3104f02775 84 #define I2C_MST_STATUS 0x36
imanomadao 0:5a3104f02775 85 #define INT_PIN_CFG 0x37
imanomadao 0:5a3104f02775 86 #define INT_ENABLE 0x38
imanomadao 0:5a3104f02775 87 #define DMP_INT_STATUS 0x39 // Check DMP interrupt
imanomadao 0:5a3104f02775 88 #define INT_STATUS 0x3A
imanomadao 0:5a3104f02775 89 #define ACCEL_XOUT_H 0x3B
imanomadao 0:5a3104f02775 90 #define ACCEL_XOUT_L 0x3C
imanomadao 0:5a3104f02775 91 #define ACCEL_YOUT_H 0x3D
imanomadao 0:5a3104f02775 92 #define ACCEL_YOUT_L 0x3E
imanomadao 0:5a3104f02775 93 #define ACCEL_ZOUT_H 0x3F
imanomadao 0:5a3104f02775 94 #define ACCEL_ZOUT_L 0x40
imanomadao 0:5a3104f02775 95 #define TEMP_OUT_H 0x41
imanomadao 0:5a3104f02775 96 #define TEMP_OUT_L 0x42
imanomadao 0:5a3104f02775 97 #define GYRO_XOUT_H 0x43
imanomadao 0:5a3104f02775 98 #define GYRO_XOUT_L 0x44
imanomadao 0:5a3104f02775 99 #define GYRO_YOUT_H 0x45
imanomadao 0:5a3104f02775 100 #define GYRO_YOUT_L 0x46
imanomadao 0:5a3104f02775 101 #define GYRO_ZOUT_H 0x47
imanomadao 0:5a3104f02775 102 #define GYRO_ZOUT_L 0x48
imanomadao 0:5a3104f02775 103 #define EXT_SENS_DATA_00 0x49
imanomadao 0:5a3104f02775 104 #define EXT_SENS_DATA_01 0x4A
imanomadao 0:5a3104f02775 105 #define EXT_SENS_DATA_02 0x4B
imanomadao 0:5a3104f02775 106 #define EXT_SENS_DATA_03 0x4C
imanomadao 0:5a3104f02775 107 #define EXT_SENS_DATA_04 0x4D
imanomadao 0:5a3104f02775 108 #define EXT_SENS_DATA_05 0x4E
imanomadao 0:5a3104f02775 109 #define EXT_SENS_DATA_06 0x4F
imanomadao 0:5a3104f02775 110 #define EXT_SENS_DATA_07 0x50
imanomadao 0:5a3104f02775 111 #define EXT_SENS_DATA_08 0x51
imanomadao 0:5a3104f02775 112 #define EXT_SENS_DATA_09 0x52
imanomadao 0:5a3104f02775 113 #define EXT_SENS_DATA_10 0x53
imanomadao 0:5a3104f02775 114 #define EXT_SENS_DATA_11 0x54
imanomadao 0:5a3104f02775 115 #define EXT_SENS_DATA_12 0x55
imanomadao 0:5a3104f02775 116 #define EXT_SENS_DATA_13 0x56
imanomadao 0:5a3104f02775 117 #define EXT_SENS_DATA_14 0x57
imanomadao 0:5a3104f02775 118 #define EXT_SENS_DATA_15 0x58
imanomadao 0:5a3104f02775 119 #define EXT_SENS_DATA_16 0x59
imanomadao 0:5a3104f02775 120 #define EXT_SENS_DATA_17 0x5A
imanomadao 0:5a3104f02775 121 #define EXT_SENS_DATA_18 0x5B
imanomadao 0:5a3104f02775 122 #define EXT_SENS_DATA_19 0x5C
imanomadao 0:5a3104f02775 123 #define EXT_SENS_DATA_20 0x5D
imanomadao 0:5a3104f02775 124 #define EXT_SENS_DATA_21 0x5E
imanomadao 0:5a3104f02775 125 #define EXT_SENS_DATA_22 0x5F
imanomadao 0:5a3104f02775 126 #define EXT_SENS_DATA_23 0x60
imanomadao 0:5a3104f02775 127 #define MOT_DETECT_STATUS 0x61
imanomadao 0:5a3104f02775 128 #define I2C_SLV0_DO 0x63
imanomadao 0:5a3104f02775 129 #define I2C_SLV1_DO 0x64
imanomadao 0:5a3104f02775 130 #define I2C_SLV2_DO 0x65
imanomadao 0:5a3104f02775 131 #define I2C_SLV3_DO 0x66
imanomadao 0:5a3104f02775 132 #define I2C_MST_DELAY_CTRL 0x67
imanomadao 0:5a3104f02775 133 #define SIGNAL_PATH_RESET 0x68
imanomadao 0:5a3104f02775 134 #define MOT_DETECT_CTRL 0x69
imanomadao 0:5a3104f02775 135 #define USER_CTRL 0x6A // Bit 7 enable DMP, bit 3 reset DMP
imanomadao 0:5a3104f02775 136 #define PWR_MGMT_1 0x6B // Device defaults to the SLEEP mode
imanomadao 0:5a3104f02775 137 #define PWR_MGMT_2 0x6C
imanomadao 0:5a3104f02775 138 #define DMP_BANK 0x6D // Activates a specific bank in the DMP
imanomadao 0:5a3104f02775 139 #define DMP_RW_PNT 0x6E // Set read/write pointer to a specific start address in specified DMP bank
imanomadao 0:5a3104f02775 140 #define DMP_REG 0x6F // Register in DMP from which to read or to which to write
imanomadao 0:5a3104f02775 141 #define DMP_REG_1 0x70
imanomadao 0:5a3104f02775 142 #define DMP_REG_2 0x71
imanomadao 0:5a3104f02775 143 #define FIFO_COUNTH 0x72
imanomadao 0:5a3104f02775 144 #define FIFO_COUNTL 0x73
imanomadao 0:5a3104f02775 145 #define FIFO_R_W 0x74
imanomadao 0:5a3104f02775 146 #define WHO_AM_I_MPU9255 0x75 // Should return 0x73
imanomadao 0:5a3104f02775 147 #define XA_OFFSET_H 0x77
imanomadao 0:5a3104f02775 148 #define XA_OFFSET_L 0x78
imanomadao 0:5a3104f02775 149 #define YA_OFFSET_H 0x7A
imanomadao 0:5a3104f02775 150 #define YA_OFFSET_L 0x7B
imanomadao 0:5a3104f02775 151 #define ZA_OFFSET_H 0x7D
imanomadao 0:5a3104f02775 152 #define ZA_OFFSET_L 0x7E
imanomadao 0:5a3104f02775 153
imanomadao 0:5a3104f02775 154 #endif