航空研究会 / Mbed 2 deprecated Autoflight2018_9

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Dependencies:   HCSR04_2 MPU6050_2 mbed SDFileSystem3

Fork of Autoflight2018_8 by 航空研究会

MPU9250/MPU9250_register.h@5:9efd35c9bb2e, 2018-09-13 (annotated)

Committer:
HARUKIDELTA
Date:
Thu Sep 13 12:33:54 2018 +0000
Revision:
5:9efd35c9bb2e
Parent:
0:17f575135219 
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Who changed what in which revision?

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HARUKIDELTA 0:17f575135219 1 #ifndef MPU9250_REGISTER_H
HARUKIDELTA 0:17f575135219 2 #define MPU9250_REGISTER_H
HARUKIDELTA 0:17f575135219 3
HARUKIDELTA 0:17f575135219 4 // See also MPU-9250 Register Map and Descriptions, Revision 4.0, RM-MPU-9250A-00, Rev. 1.4, 9/9/2013 for registers not listed in
HARUKIDELTA 0:17f575135219 5 // above document; the MPU9250 and MPU9150 are virtually identical but the latter has a different register map
HARUKIDELTA 0:17f575135219 6
HARUKIDELTA 0:17f575135219 7 //AK8963 registers
HARUKIDELTA 0:17f575135219 8 #define WHO_AM_I_AK8963 0x00 // should return 0x48
HARUKIDELTA 0:17f575135219 9 #define INFO 0x01
HARUKIDELTA 0:17f575135219 10 #define AK8963_ST1 0x02 // data ready status bit 0
HARUKIDELTA 0:17f575135219 11 #define AK8963_XOUT_L 0x03 // data
HARUKIDELTA 0:17f575135219 12 #define AK8963_XOUT_H 0x04
HARUKIDELTA 0:17f575135219 13 #define AK8963_YOUT_L 0x05
HARUKIDELTA 0:17f575135219 14 #define AK8963_YOUT_H 0x06
HARUKIDELTA 0:17f575135219 15 #define AK8963_ZOUT_L 0x07
HARUKIDELTA 0:17f575135219 16 #define AK8963_ZOUT_H 0x08
HARUKIDELTA 0:17f575135219 17 #define AK8963_ST2 0x09 // Data overflow bit 3 and data read error status bit 2
HARUKIDELTA 0:17f575135219 18 #define AK8963_CNTL 0x0A // Power down (0000), single-measurement (0001), self-test (1000) and Fuse ROM (1111) modes on bits 3:0
HARUKIDELTA 0:17f575135219 19 #define AK8963_ASTC 0x0C // Self test control
HARUKIDELTA 0:17f575135219 20 #define AK8963_I2CDIS 0x0F // I2C disable
HARUKIDELTA 0:17f575135219 21 #define AK8963_ASAX 0x10 // Fuse ROM x-axis sensitivity adjustment value
HARUKIDELTA 0:17f575135219 22 #define AK8963_ASAY 0x11 // Fuse ROM y-axis sensitivity adjustment value
HARUKIDELTA 0:17f575135219 23 #define AK8963_ASAZ 0x12 // Fuse ROM z-axis sensitivity adjustment value
HARUKIDELTA 0:17f575135219 24
HARUKIDELTA 0:17f575135219 25
HARUKIDELTA 0:17f575135219 26
HARUKIDELTA 0:17f575135219 27 //MPU6500 register
HARUKIDELTA 0:17f575135219 28 #define SELF_TEST_X_GYRO 0x00
HARUKIDELTA 0:17f575135219 29 #define SELF_TEST_Y_GYRO 0x01
HARUKIDELTA 0:17f575135219 30 #define SELF_TEST_Z_GYRO 0x02
HARUKIDELTA 0:17f575135219 31
HARUKIDELTA 0:17f575135219 32 #define SELF_TEST_X_ACCEL 0x0D
HARUKIDELTA 0:17f575135219 33 #define SELF_TEST_Y_ACCEL 0x0E
HARUKIDELTA 0:17f575135219 34 #define SELF_TEST_Z_ACCEL 0x0F
HARUKIDELTA 0:17f575135219 35
HARUKIDELTA 0:17f575135219 36 #define SELF_TEST_A 0x10
HARUKIDELTA 0:17f575135219 37
HARUKIDELTA 0:17f575135219 38 #define XG_OFFSET_H 0x13 // User-defined trim values for gyroscope
HARUKIDELTA 0:17f575135219 39 #define XG_OFFSET_L 0x14
HARUKIDELTA 0:17f575135219 40 #define YG_OFFSET_H 0x15
HARUKIDELTA 0:17f575135219 41 #define YG_OFFSET_L 0x16
HARUKIDELTA 0:17f575135219 42 #define ZG_OFFSET_H 0x17
HARUKIDELTA 0:17f575135219 43 #define ZG_OFFSET_L 0x18
HARUKIDELTA 0:17f575135219 44 #define SMPLRT_DIV 0x19
HARUKIDELTA 0:17f575135219 45 #define CONFIG 0x1A
HARUKIDELTA 0:17f575135219 46 #define GYRO_CONFIG 0x1B
HARUKIDELTA 0:17f575135219 47 #define ACCEL_CONFIG 0x1C
HARUKIDELTA 0:17f575135219 48 #define ACCEL_CONFIG2 0x1D
HARUKIDELTA 0:17f575135219 49 #define LP_ACCEL_ODR 0x1E
HARUKIDELTA 0:17f575135219 50 #define WOM_THR 0x1F
HARUKIDELTA 0:17f575135219 51
HARUKIDELTA 0:17f575135219 52 #define MOT_DUR 0x20 // Duration counter threshold for motion interrupt generation, 1 kHz rate, LSB = 1 ms
HARUKIDELTA 0:17f575135219 53 #define ZMOT_THR 0x21 // Zero-motion detection threshold bits [7:0]
HARUKIDELTA 0:17f575135219 54 #define ZRMOT_DUR 0x22 // Duration counter threshold for zero motion interrupt generation, 16 Hz rate, LSB = 64 ms
HARUKIDELTA 0:17f575135219 55
HARUKIDELTA 0:17f575135219 56 #define FIFO_EN 0x23
HARUKIDELTA 0:17f575135219 57 #define I2C_MST_CTRL 0x24
HARUKIDELTA 0:17f575135219 58 #define I2C_SLV0_ADDR 0x25
HARUKIDELTA 0:17f575135219 59 #define I2C_SLV0_REG 0x26
HARUKIDELTA 0:17f575135219 60 #define I2C_SLV0_CTRL 0x27
HARUKIDELTA 0:17f575135219 61 #define I2C_SLV1_ADDR 0x28
HARUKIDELTA 0:17f575135219 62 #define I2C_SLV1_REG 0x29
HARUKIDELTA 0:17f575135219 63 #define I2C_SLV1_CTRL 0x2A
HARUKIDELTA 0:17f575135219 64 #define I2C_SLV2_ADDR 0x2B
HARUKIDELTA 0:17f575135219 65 #define I2C_SLV2_REG 0x2C
HARUKIDELTA 0:17f575135219 66 #define I2C_SLV2_CTRL 0x2D
HARUKIDELTA 0:17f575135219 67 #define I2C_SLV3_ADDR 0x2E
HARUKIDELTA 0:17f575135219 68 #define I2C_SLV3_REG 0x2F
HARUKIDELTA 0:17f575135219 69 #define I2C_SLV3_CTRL 0x30
HARUKIDELTA 0:17f575135219 70 #define I2C_SLV4_ADDR 0x31
HARUKIDELTA 0:17f575135219 71 #define I2C_SLV4_REG 0x32
HARUKIDELTA 0:17f575135219 72 #define I2C_SLV4_DO 0x33
HARUKIDELTA 0:17f575135219 73 #define I2C_SLV4_CTRL 0x34
HARUKIDELTA 0:17f575135219 74 #define I2C_SLV4_DI 0x35
HARUKIDELTA 0:17f575135219 75 #define I2C_MST_STATUS 0x36
HARUKIDELTA 0:17f575135219 76 #define INT_PIN_CFG 0x37
HARUKIDELTA 0:17f575135219 77 #define INT_ENABLE 0x38
HARUKIDELTA 0:17f575135219 78 #define DMP_INT_STATUS 0x39 // Check DMP interrupt
HARUKIDELTA 0:17f575135219 79 #define INT_STATUS 0x3A
HARUKIDELTA 0:17f575135219 80 #define ACCEL_XOUT_H 0x3B
HARUKIDELTA 0:17f575135219 81 #define ACCEL_XOUT_L 0x3C
HARUKIDELTA 0:17f575135219 82 #define ACCEL_YOUT_H 0x3D
HARUKIDELTA 0:17f575135219 83 #define ACCEL_YOUT_L 0x3E
HARUKIDELTA 0:17f575135219 84 #define ACCEL_ZOUT_H 0x3F
HARUKIDELTA 0:17f575135219 85 #define ACCEL_ZOUT_L 0x40
HARUKIDELTA 0:17f575135219 86 #define TEMP_OUT_H 0x41
HARUKIDELTA 0:17f575135219 87 #define TEMP_OUT_L 0x42
HARUKIDELTA 0:17f575135219 88 #define GYRO_XOUT_H 0x43
HARUKIDELTA 0:17f575135219 89 #define GYRO_XOUT_L 0x44
HARUKIDELTA 0:17f575135219 90 #define GYRO_YOUT_H 0x45
HARUKIDELTA 0:17f575135219 91 #define GYRO_YOUT_L 0x46
HARUKIDELTA 0:17f575135219 92 #define GYRO_ZOUT_H 0x47
HARUKIDELTA 0:17f575135219 93 #define GYRO_ZOUT_L 0x48
HARUKIDELTA 0:17f575135219 94 #define EXT_SENS_DATA_00 0x49
HARUKIDELTA 0:17f575135219 95 #define EXT_SENS_DATA_01 0x4A
HARUKIDELTA 0:17f575135219 96 #define EXT_SENS_DATA_02 0x4B
HARUKIDELTA 0:17f575135219 97 #define EXT_SENS_DATA_03 0x4C
HARUKIDELTA 0:17f575135219 98 #define EXT_SENS_DATA_04 0x4D
HARUKIDELTA 0:17f575135219 99 #define EXT_SENS_DATA_05 0x4E
HARUKIDELTA 0:17f575135219 100 #define EXT_SENS_DATA_06 0x4F
HARUKIDELTA 0:17f575135219 101 #define EXT_SENS_DATA_07 0x50
HARUKIDELTA 0:17f575135219 102 #define EXT_SENS_DATA_08 0x51
HARUKIDELTA 0:17f575135219 103 #define EXT_SENS_DATA_09 0x52
HARUKIDELTA 0:17f575135219 104 #define EXT_SENS_DATA_10 0x53
HARUKIDELTA 0:17f575135219 105 #define EXT_SENS_DATA_11 0x54
HARUKIDELTA 0:17f575135219 106 #define EXT_SENS_DATA_12 0x55
HARUKIDELTA 0:17f575135219 107 #define EXT_SENS_DATA_13 0x56
HARUKIDELTA 0:17f575135219 108 #define EXT_SENS_DATA_14 0x57
HARUKIDELTA 0:17f575135219 109 #define EXT_SENS_DATA_15 0x58
HARUKIDELTA 0:17f575135219 110 #define EXT_SENS_DATA_16 0x59
HARUKIDELTA 0:17f575135219 111 #define EXT_SENS_DATA_17 0x5A
HARUKIDELTA 0:17f575135219 112 #define EXT_SENS_DATA_18 0x5B
HARUKIDELTA 0:17f575135219 113 #define EXT_SENS_DATA_19 0x5C
HARUKIDELTA 0:17f575135219 114 #define EXT_SENS_DATA_20 0x5D
HARUKIDELTA 0:17f575135219 115 #define EXT_SENS_DATA_21 0x5E
HARUKIDELTA 0:17f575135219 116 #define EXT_SENS_DATA_22 0x5F
HARUKIDELTA 0:17f575135219 117 #define EXT_SENS_DATA_23 0x60
HARUKIDELTA 0:17f575135219 118 #define MOT_DETECT_STATUS 0x61
HARUKIDELTA 0:17f575135219 119 #define I2C_SLV0_DO 0x63
HARUKIDELTA 0:17f575135219 120 #define I2C_SLV1_DO 0x64
HARUKIDELTA 0:17f575135219 121 #define I2C_SLV2_DO 0x65
HARUKIDELTA 0:17f575135219 122 #define I2C_SLV3_DO 0x66
HARUKIDELTA 0:17f575135219 123 #define I2C_MST_DELAY_CTRL 0x67
HARUKIDELTA 0:17f575135219 124 #define SIGNAL_PATH_RESET 0x68
HARUKIDELTA 0:17f575135219 125 #define MOT_DETECT_CTRL 0x69
HARUKIDELTA 0:17f575135219 126 #define USER_CTRL 0x6A // Bit 7 enable DMP, bit 3 reset DMP
HARUKIDELTA 0:17f575135219 127 #define PWR_MGMT_1 0x6B // Device defaults to the SLEEP mode
HARUKIDELTA 0:17f575135219 128 #define PWR_MGMT_2 0x6C
HARUKIDELTA 0:17f575135219 129 #define DMP_BANK 0x6D // Activates a specific bank in the DMP
HARUKIDELTA 0:17f575135219 130 #define DMP_RW_PNT 0x6E // Set read/write pointer to a specific start address in specified DMP bank
HARUKIDELTA 0:17f575135219 131 #define DMP_REG 0x6F // Register in DMP from which to read or to which to write
HARUKIDELTA 0:17f575135219 132 #define DMP_REG_1 0x70
HARUKIDELTA 0:17f575135219 133 #define DMP_REG_2 0x71
HARUKIDELTA 0:17f575135219 134 #define FIFO_COUNTH 0x72
HARUKIDELTA 0:17f575135219 135 #define FIFO_COUNTL 0x73
HARUKIDELTA 0:17f575135219 136 #define FIFO_R_W 0x74
HARUKIDELTA 0:17f575135219 137 #define WHO_AM_I_MPU9250 0x75 // Should return 0x71
HARUKIDELTA 0:17f575135219 138 #define XA_OFFSET_H 0x77
HARUKIDELTA 0:17f575135219 139 #define XA_OFFSET_L 0x78
HARUKIDELTA 0:17f575135219 140 #define YA_OFFSET_H 0x7A
HARUKIDELTA 0:17f575135219 141 #define YA_OFFSET_L 0x7B
HARUKIDELTA 0:17f575135219 142 #define ZA_OFFSET_H 0x7D
HARUKIDELTA 0:17f575135219 143 #define ZA_OFFSET_L 0x7E
HARUKIDELTA 0:17f575135219 144
HARUKIDELTA 0:17f575135219 145 #endif