6 years, 10 months ago.

Nucleo F103 - System Clock - #define SYSCLK_FREQ_72MHz


According to the source files, when the Nucleo board resets...it always goes back to using the HSI for a clock source. It does appear however that there is a way to define the clock frequency so that (ie. #define SYSCLK_FREQ_72MHz) that when the program actually begins to run, this will gen up the PLL, etc. Is that correct or not?

I have seen a few other posts indicating that these boards are running at the HSI speed (8mhz for the F103, and 16mhz for the F401), however I have not see any instructions as to how to get the device running at full speed. Any help, would be appreciated.


2 Answers

6 years, 10 months ago.

I think you will find that this is the HSI clock frequency not the core or buss frequency. The HSI clock would be multiplied to the correct running frequency.

6 years, 10 months ago.

Take a look at this URL:


Look specifically at the function toward the bottom called: SetSysClockTo72

Am I wrong, or does that function contain everything needed to change the clock at the start of the program?


That seems to be the case. You can just import the mbed-src and change it, then see if it works :).

posted by Erik - 05 Mar 2014

Does your board run slow? I haven't tried any of mine yet. But I have seen loads of HSE code commented out in the other libs and was thinking this may enable the external crystals. Perhaps the SetSysClock functions reduce the core speed for lower power during program run and '72' is the default fastest one.

posted by Paul Staron 05 Mar 2014