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Are DACR writes stretched ?
Topic last updated 21 Dec 2011, by 
Gert van der Knokke.
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Gert van der Knokke.
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Hello,
I am trying to write to the DACR register in a timed loop while the mbed is receiving heavy interrupting from another source. It seems the timing of the interrupt is affected by the writes to the DACR register. Are writes to the DACR register stretched if the settling time has not past ?
The interrupt response of the other routine must be within 1 us so I have written that part in full assembler.
If I simply comment out the write to the DACR register, the system is rock solid. Is it possible to use the double buffering feature of the DAC without interrupts or DMA ?