The 20 bytes is an arbitrary value, the 'increment source function' is not even active on the blanking part so it can just as easily be a single word, I just wanted to be sure that the I2S fifo is filled with zeroes. You may try shortening this or even set it to a single word.
The most important part is that the active bits are shifted out in the right order and that right after sending the active bits out the I2S output goes to zero (black), that is why the active list is linked to the 'zero' list.
The PWM output sets the hsync position by generating an interrupt which activates HSYNC and sets up the active/visible DMA list for the current line, this active list is linked to the blank list which is linked to NULL and therefore DMA stops somewhere between the last active bit and the start of the next PWM interrupt which starts the sequence all over for the next line.
All this time the I2S will emit zeroes for everything but the active display area. After counting 400/480 lines the VSYNC is activated and all the pointers are reset to the start of the screen and so on and so on :-)
The burst size is the amount of data that is transferred when the DMACBREQ signal goes active in the source peripheral. So in the case of 4 it transfers 4 times 32-bits. 32-bits is the width of both source and destination, i.e. 1 32-bits word is transferred each clockcycle.
With a transfersize of 25, each LLI transfers 25 times 32-bits, in bursts of 4 words, which equals to 800 bits, which are the number of dotclock-cycles per scanline.
The numbers you quote are from Gert's code I suppose. A transfersize of 20 equals to 20*32-bits=640 bits, which are only the visible pixels.
Also I can't understand why have you set blanking with 32 char size. Cause I2STXFIFO is just 32-bit accessible, why don't you set blanking with just one word size?
Yes, that should be possible. The array can be smaller and the transfer limited to one word.