Only three PWM for Nordic NRF52 / nRF52832

01 Feb 2018

Only three PWM channels can be used because the PWM implementation in 'pwmout_api.c' only use one channel each PWM modules. Since the NRF52 has three modules only three channels can be assigned. With correct implementation, 12 channels should be possible (3 modules with 4 channels each).

from pwmout_api.c

            nrf_drv_pwm_config_t config0 =
            {
                .output_pins =
                {
                    obj->pin | NRF_DRV_PWM_PIN_INVERTED, // channel 0
                    NRF_DRV_PWM_PIN_NOT_USED,            // channel 1
                    NRF_DRV_PWM_PIN_NOT_USED,            // channel 2
                    NRF_DRV_PWM_PIN_NOT_USED,            // channel 3
                },
                .irq_priority = PWM_DEFAULT_CONFIG_IRQ_PRIORITY,
                .base_clock   = pulsewidth_set.pwm_clk,
                .count_mode   = NRF_PWM_MODE_UP,
                .top_value    = pulsewidth_set.period_hwu,
                .load_mode    = NRF_PWM_LOAD_COMMON,
                .step_mode    = NRF_PWM_STEP_AUTO
            };

Fromhttp://infocenter.nordicsemi.com/pdf/nRF52832_PS_v1.1.pdf

Quote:

The PWM module enables the generation of pulse width modulated signals on GPIO. The module implements an up or up-and-down counter with four PWM channels that drive assigned GPIOs.

Three PWM modules can provide up to 12 PWM channels with individual frequency control in groups of up to four channels. Furthermore, a built-in decoder and EasyDMA capabilities make it possible to manipulate the PWM duty cycles without CPU intervention. Arbitrary duty-cycle sequences are read from Data RAM and can be chained to implement ping-pong buffering or repeated into complex loops.

Listed here are the main features of one PWM module:

• Fixed PWM base frequency with programmable clock divider

• Up to four PWM channels with individual polarity and duty-cycle values

• Edge or center-aligned pulses across PWM channels

• Multiple duty-cycle arrays (sequences) defined in Data RAM

• Autonomous and glitch-free update of duty cycle values directly from memory through EasyDMA

• Change of polarity, duty-cycle, and base frequency possibly on every PWM period

• Data RAM sequences can be repeated or connected into loops