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val_target.h
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1 /** @file
2  * Copyright (c) 2018-2019, Arm Limited or its affiliates. All rights reserved.
3  * SPDX-License-Identifier : Apache-2.0
4  *
5  * Licensed under the Apache License, Version 2.0 (the "License");
6  * you may not use this file except in compliance with the License.
7  * You may obtain a copy of the License at
8  *
9  * http://www.apache.org/licenses/LICENSE-2.0
10  *
11  * Unless required by applicable law or agreed to in writing, software
12  * distributed under the License is distributed on an "AS IS" BASIS,
13  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14  * See the License for the specific language governing permissions and
15  * limitations under the License.
16 **/
17 
18 #ifndef _TARGET_INFO_DATA_H_
19 #define _TARGET_INFO_DATA_H_
20 
21 #include "val.h"
22 
23 #define TARGET_CONFIG_CREATE_ID(major, minor, index) \
24  (((major & 0xFF) << 24) | ((minor & 0xFF) << 16) | (index & 0xFFFF))
25 #define TARGET_CONFIG_GET_MAJOR(config_id) ((config_id >> 24) & 0xFF)
26 #define TARGET_CONFIG_GET_MINOR(config_id) ((config_id >> 16) & 0xFF)
27 #define TARGET_CONFIG_INCREMENT_INDEX(config_id) \
28  ((config_id & 0xFFFF0000) | ((config_id & 0xFFFF) + 1))
29 #define GET_NUM_INSTANCE(struct_type) (struct_type->cfg_type.size >> 24)
30 #define VAL_TEST_MAJOR_GROUP_MASK 0xFF000000UL
31 #define VAL_TEST_MINOR_GROUP_MASK 0x00FF0000UL
32 #define VAL_TEST_CFG_INSTANCE_MASK 0x0000FFFFUL
33 #define VAL_TEST_INVALID_CFG_ID 0xFFFFFFFFUL
34 #define TARGET_MIN_CFG_ID TARGET_CONFIG_CREATE_ID(GROUP_SOC_PERIPHERAL, 0, 0)
35 #define TARGET_MAX_CFG_ID TARGET_CONFIG_CREATE_ID(GROUP_MAX, 0, 0)
36 
37 /**
38  Config IDs for each group/component
39  31:24 : MAJOR (group)
40  23:16 : MINOR (component)
41  16:8 : SUB-component
42  7:0 : INSTANCE (instance of same component)
43 **/
44 
45 /*
46  MAJOR IDs
47 */
48 typedef enum _GROUP_CONFIG_ID_ {
49  GROUP_SOC_PERIPHERAL = 0x1,
50  GROUP_MEMORY = 0x2,
51  GROUP_MISCELLANEOUS = 0x3,
52  GROUP_MAX = 0xFF,
53 } group_cfg_id_t;
54 
55 /*
56  MINOR IDs
57  */
58 typedef enum _SOC_PERIPHERAL_CONFIG_ID_ {
59  SOC_PERIPHERAL_UART = 0x1,
60  SOC_PERIPHERAL_TIMER = 0x2,
61  SOC_PERIPHERAL_WATCHDOG = 0x3,
62 } soc_peripheral_cfg_id_t;
63 
64 typedef enum _MEMORY_CONFIG_ID_ {
65  MEMORY_NVMEM = 0x2,
66  MEMORY_NSPE_MMIO = 0x3,
67  MEMORY_CLIENT_PARTITION_MMIO = 0x4,
68  MEMORY_DRIVER_PARTITION_MMIO = 0x5,
69 } memory_cfg_id_t;
70 
71 typedef enum _MISCELLANEOUS_CONFIG_ID_ {
72  MISCELLANEOUS_BOOT = 0x1,
73  MISCELLANEOUS_DUT = 0x2
74 } miscellaneous_cfg_id_t;
75 
76 /**
77  Assign group type to each system component
78 **/
79 typedef enum _COMPONENT_GROUPING_{
80  UART = GROUP_SOC_PERIPHERAL,
81  TIMER = GROUP_SOC_PERIPHERAL,
82  WATCHDOG = GROUP_SOC_PERIPHERAL,
83  NVMEM = GROUP_MEMORY,
84  NSPE_MMIO = GROUP_MEMORY,
85  CLIENT_PARTITION_MMIO = GROUP_MEMORY,
86  DRIVER_PARTITION_MMIO = GROUP_MEMORY,
87  BOOT = GROUP_MISCELLANEOUS,
88  DUT = GROUP_MISCELLANEOUS,
89 } comp_group_assign_t;
90 
91 /**
92  Target Configuration Header
93 **/
94 typedef struct _TARGET_CFG_HDR_ {
95  /* PSA_CFG */
96  uint32_t signature[2];
97  /* 8 byte String describing the Target platform */
98  uint32_t target_string[2];
99  /* version = 1 for now */
100  uint32_t version;
101  /* Header Size */
102  uint32_t size;
103 }target_cfg_hdr_t;
104 
105 typedef enum {
106  LEVEL1 = 0x1,
107  LEVEL2,
108  LEVEL3,
109 } firmware_level_t;
110 
111 typedef enum {
112  NOT_AVAILABLE = 0x0,
113  AVAILABLE = 0x1,
114 } is_available_t;
115 
116 typedef enum {
117  SECURE_ACCESS = 0x100,
118  NONSECURE_ACCESS,
119  SECURE_PROGRAMMABLE,
120  NONSECURE_PROGRAMMABLE
121 } dev_attr_t;
122 
123 typedef enum {
124  MEM_SECURE = 0x100,
125  MEM_NONSECURE,
126  MEM_NSC,
127 } mem_tgt_attr_t;
128 
129 typedef enum {
130  TYPE_READ_ONLY = 0x10,
131  TYPE_WRITE_ONLY,
132  TYPE_READ_WRITE,
133  TYPE_EXECUTE,
134  TYPE_RESERVED,
135 } perm_type_t;
136 
137 typedef struct _CFG_HDR_TYPE_ {
138  cfg_id_t cfg_id;
139  /* size inclusive of this header */
140  uint32_t size;
141 } cfg_type_t;
142 
143 /**
144  Memory Information
145 **/
146 typedef struct _MEM_INFO_DESC_ {
147  cfg_type_t cfg_type;
148  uint32_t num;
149 } memory_hdr_t;
150 
151 typedef struct _MEM_REGION_ {
152  cfg_type_t cfg_type;
153  addr_t start;
154  addr_t end;
155  mem_tgt_attr_t attribute;
156  perm_type_t permission;
157 } memory_desc_t;
158 
159 /*
160  SOC Peripheral description structures
161 */
162 typedef struct _SOC_PER_INFO_NUM_ {
163  cfg_type_t cfg_type;
164  uint32_t num;
165 } soc_peripheral_hdr_t;
166 
167 typedef struct _SOC_PER_INFO_DESC_ {
168  cfg_type_t cfg_type;
169  uint32_t vendor_id;
170  uint32_t device_id;
171  addr_t base;
172  uint32_t size;
173  uint32_t intr_id;
174  perm_type_t permission;
175  uint32_t timeout_in_micro_sec_low;
176  uint32_t timeout_in_micro_sec_medium;
177  uint32_t timeout_in_micro_sec_high;
178  uint32_t timeout_in_micro_sec_crypto;
179  uint32_t num_of_tick_per_micro_sec;
180  dev_attr_t attribute;
181 } soc_peripheral_desc_t;
182 
183 /**
184  System Miscellaneous Information
185 **/
186 
187 typedef struct _MISCELLANEOUS_INFO_HDR_ {
188  cfg_type_t cfg_type;
189  uint32_t num;
190 } miscellaneous_hdr_t;
191 
192 typedef struct _MISCELLANEOUS_INFO_DESC_ {
193  cfg_type_t cfg_type;
194  firmware_level_t implemented_psa_firmware_isolation_level;
195  addr_t ns_start_addr_of_combine_test_binary;
196  is_available_t combine_test_binary_in_ram;
197  addr_t ns_test_addr;
198 } miscellaneous_desc_t;
199 
200 /*val target config read apis */
201 STATIC_DECLARE val_status_t val_target_get_config(cfg_id_t cfg_id, uint8_t **data, uint32_t *size);
202 STATIC_DECLARE val_status_t val_target_cfg_get_next(void **blob);
203 STATIC_DECLARE val_status_t val_target_get_cfg_blob(cfg_id_t cfg_id, uint8_t **data, uint32_t *size);
204 STATIC_DECLARE val_status_t val_target_get_config(cfg_id_t cfg_id, uint8_t **data, uint32_t *size);
205 #endif
miscellaneous_hdr_t
struct _MISCELLANEOUS_INFO_HDR_ miscellaneous_hdr_t
System Miscellaneous Information.
comp_group_assign_t
enum _COMPONENT_GROUPING_ comp_group_assign_t
Assign group type to each system component.
_SOC_PER_INFO_NUM_
Definition: val_target.h:162
_GROUP_CONFIG_ID_
_GROUP_CONFIG_ID_
Config IDs for each group/component 31:24 : MAJOR (group) 23:16 : MINOR (component) 16:8 : SUB-compon...
Definition: val_target.h:48
_MEM_INFO_DESC_
Memory Information.
Definition: val_target.h:146
target_cfg_hdr_t
struct _TARGET_CFG_HDR_ target_cfg_hdr_t
Target Configuration Header.
_SOC_PER_INFO_DESC_
Definition: val_target.h:167
val.h
Copyright (c) 2018-2019, Arm Limited or its affiliates.
_MEM_REGION_
Definition: val_target.h:151
memory_hdr_t
struct _MEM_INFO_DESC_ memory_hdr_t
Memory Information.
_MISCELLANEOUS_INFO_HDR_
System Miscellaneous Information.
Definition: val_target.h:187
group_cfg_id_t
enum _GROUP_CONFIG_ID_ group_cfg_id_t
Config IDs for each group/component 31:24 : MAJOR (group) 23:16 : MINOR (component) 16:8 : SUB-compon...
_CFG_HDR_TYPE_
Definition: val_target.h:137
_TARGET_CFG_HDR_
Target Configuration Header.
Definition: val_target.h:94
_MISCELLANEOUS_INFO_DESC_
Definition: val_target.h:192
_COMPONENT_GROUPING_
_COMPONENT_GROUPING_
Assign group type to each system component.
Definition: val_target.h:79
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