mbed library sources for airmote
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targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/gic.h@390:35c2c1cf29cd, 2014-11-06 (annotated)
- Committer:
- mbed_official
- Date:
- Thu Nov 06 11:00:10 2014 +0000
- Revision:
- 390:35c2c1cf29cd
Synchronized with git revision 8724eb616b6e07a3bd111d3022652eb5bbefe9b7
Full URL: https://github.com/mbedmicro/mbed/commit/8724eb616b6e07a3bd111d3022652eb5bbefe9b7/
[RZ/A1H] mbed-RZ first release
Who changed what in which revision?
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mbed_official | 390:35c2c1cf29cd | 1 | /**************************************************************************//** |
mbed_official | 390:35c2c1cf29cd | 2 | * @file gic.h |
mbed_official | 390:35c2c1cf29cd | 3 | * @brief Implementation of GIC functions declared in CMSIS Cortex-A9 Core Peripheral Access Layer Header File |
mbed_official | 390:35c2c1cf29cd | 4 | * @version |
mbed_official | 390:35c2c1cf29cd | 5 | * @date 29 August 2013 |
mbed_official | 390:35c2c1cf29cd | 6 | * |
mbed_official | 390:35c2c1cf29cd | 7 | * @note |
mbed_official | 390:35c2c1cf29cd | 8 | * |
mbed_official | 390:35c2c1cf29cd | 9 | ******************************************************************************/ |
mbed_official | 390:35c2c1cf29cd | 10 | /* Copyright (c) 2011 - 2013 ARM LIMITED |
mbed_official | 390:35c2c1cf29cd | 11 | |
mbed_official | 390:35c2c1cf29cd | 12 | All rights reserved. |
mbed_official | 390:35c2c1cf29cd | 13 | Redistribution and use in source and binary forms, with or without |
mbed_official | 390:35c2c1cf29cd | 14 | modification, are permitted provided that the following conditions are met: |
mbed_official | 390:35c2c1cf29cd | 15 | - Redistributions of source code must retain the above copyright |
mbed_official | 390:35c2c1cf29cd | 16 | notice, this list of conditions and the following disclaimer. |
mbed_official | 390:35c2c1cf29cd | 17 | - Redistributions in binary form must reproduce the above copyright |
mbed_official | 390:35c2c1cf29cd | 18 | notice, this list of conditions and the following disclaimer in the |
mbed_official | 390:35c2c1cf29cd | 19 | documentation and/or other materials provided with the distribution. |
mbed_official | 390:35c2c1cf29cd | 20 | - Neither the name of ARM nor the names of its contributors may be used |
mbed_official | 390:35c2c1cf29cd | 21 | to endorse or promote products derived from this software without |
mbed_official | 390:35c2c1cf29cd | 22 | specific prior written permission. |
mbed_official | 390:35c2c1cf29cd | 23 | * |
mbed_official | 390:35c2c1cf29cd | 24 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 390:35c2c1cf29cd | 25 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 390:35c2c1cf29cd | 26 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
mbed_official | 390:35c2c1cf29cd | 27 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE |
mbed_official | 390:35c2c1cf29cd | 28 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
mbed_official | 390:35c2c1cf29cd | 29 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
mbed_official | 390:35c2c1cf29cd | 30 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
mbed_official | 390:35c2c1cf29cd | 31 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
mbed_official | 390:35c2c1cf29cd | 32 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
mbed_official | 390:35c2c1cf29cd | 33 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
mbed_official | 390:35c2c1cf29cd | 34 | POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 390:35c2c1cf29cd | 35 | ---------------------------------------------------------------------------*/ |
mbed_official | 390:35c2c1cf29cd | 36 | |
mbed_official | 390:35c2c1cf29cd | 37 | #ifndef GIC_H_ |
mbed_official | 390:35c2c1cf29cd | 38 | #define GIC_H_ |
mbed_official | 390:35c2c1cf29cd | 39 | |
mbed_official | 390:35c2c1cf29cd | 40 | /* IO definitions (access restrictions to peripheral registers) */ |
mbed_official | 390:35c2c1cf29cd | 41 | /** |
mbed_official | 390:35c2c1cf29cd | 42 | */ |
mbed_official | 390:35c2c1cf29cd | 43 | #ifdef __cplusplus |
mbed_official | 390:35c2c1cf29cd | 44 | #define __I volatile /*!< Defines 'read only' permissions */ |
mbed_official | 390:35c2c1cf29cd | 45 | #else |
mbed_official | 390:35c2c1cf29cd | 46 | #define __I volatile const /*!< Defines 'read only' permissions */ |
mbed_official | 390:35c2c1cf29cd | 47 | #endif |
mbed_official | 390:35c2c1cf29cd | 48 | #define __O volatile /*!< Defines 'write only' permissions */ |
mbed_official | 390:35c2c1cf29cd | 49 | #define __IO volatile /*!< Defines 'read / write' permissions */ |
mbed_official | 390:35c2c1cf29cd | 50 | |
mbed_official | 390:35c2c1cf29cd | 51 | /** \brief Structure type to access the Generic Interrupt Controller Distributor (GICD) |
mbed_official | 390:35c2c1cf29cd | 52 | */ |
mbed_official | 390:35c2c1cf29cd | 53 | typedef struct |
mbed_official | 390:35c2c1cf29cd | 54 | { |
mbed_official | 390:35c2c1cf29cd | 55 | __IO uint32_t ICDDCR; |
mbed_official | 390:35c2c1cf29cd | 56 | __I uint32_t ICDICTR; |
mbed_official | 390:35c2c1cf29cd | 57 | __I uint32_t ICDIIDR; |
mbed_official | 390:35c2c1cf29cd | 58 | uint32_t RESERVED0[29]; |
mbed_official | 390:35c2c1cf29cd | 59 | __IO uint32_t ICDISR[32]; |
mbed_official | 390:35c2c1cf29cd | 60 | __IO uint32_t ICDISER[32]; |
mbed_official | 390:35c2c1cf29cd | 61 | __IO uint32_t ICDICER[32]; |
mbed_official | 390:35c2c1cf29cd | 62 | __IO uint32_t ICDISPR[32]; |
mbed_official | 390:35c2c1cf29cd | 63 | __IO uint32_t ICDICPR[32]; |
mbed_official | 390:35c2c1cf29cd | 64 | __I uint32_t ICDABR[32]; |
mbed_official | 390:35c2c1cf29cd | 65 | uint32_t RESERVED1[32]; |
mbed_official | 390:35c2c1cf29cd | 66 | __IO uint32_t ICDIPR[256]; |
mbed_official | 390:35c2c1cf29cd | 67 | __IO uint32_t ICDIPTR[256]; |
mbed_official | 390:35c2c1cf29cd | 68 | __IO uint32_t ICDICFR[64]; |
mbed_official | 390:35c2c1cf29cd | 69 | uint32_t RESERVED2[128]; |
mbed_official | 390:35c2c1cf29cd | 70 | __IO uint32_t ICDSGIR; |
mbed_official | 390:35c2c1cf29cd | 71 | } GICDistributor_Type; |
mbed_official | 390:35c2c1cf29cd | 72 | |
mbed_official | 390:35c2c1cf29cd | 73 | /** \brief Structure type to access the Controller Interface (GICC) |
mbed_official | 390:35c2c1cf29cd | 74 | */ |
mbed_official | 390:35c2c1cf29cd | 75 | typedef struct |
mbed_official | 390:35c2c1cf29cd | 76 | { |
mbed_official | 390:35c2c1cf29cd | 77 | __IO uint32_t ICCICR; // +0x000 - RW - CPU Interface Control Register |
mbed_official | 390:35c2c1cf29cd | 78 | __IO uint32_t ICCPMR; // +0x004 - RW - Interrupt Priority Mask Register |
mbed_official | 390:35c2c1cf29cd | 79 | __IO uint32_t ICCBPR; // +0x008 - RW - Binary Point Register |
mbed_official | 390:35c2c1cf29cd | 80 | __I uint32_t ICCIAR; // +0x00C - RO - Interrupt Acknowledge Register |
mbed_official | 390:35c2c1cf29cd | 81 | __IO uint32_t ICCEOIR; // +0x010 - WO - End of Interrupt Register |
mbed_official | 390:35c2c1cf29cd | 82 | __I uint32_t ICCRPR; // +0x014 - RO - Running Priority Register |
mbed_official | 390:35c2c1cf29cd | 83 | __I uint32_t ICCHPIR; // +0x018 - RO - Highest Pending Interrupt Register |
mbed_official | 390:35c2c1cf29cd | 84 | __IO uint32_t ICCABPR; // +0x01C - RW - Aliased Binary Point Register |
mbed_official | 390:35c2c1cf29cd | 85 | |
mbed_official | 390:35c2c1cf29cd | 86 | uint32_t RESERVED[55]; |
mbed_official | 390:35c2c1cf29cd | 87 | |
mbed_official | 390:35c2c1cf29cd | 88 | __I uint32_t ICCIIDR; // +0x0FC - RO - CPU Interface Identification Register |
mbed_official | 390:35c2c1cf29cd | 89 | } GICInterface_Type; |
mbed_official | 390:35c2c1cf29cd | 90 | |
mbed_official | 390:35c2c1cf29cd | 91 | /*@} end of GICD */ |
mbed_official | 390:35c2c1cf29cd | 92 | |
mbed_official | 390:35c2c1cf29cd | 93 | /* ########################## GIC functions #################################### */ |
mbed_official | 390:35c2c1cf29cd | 94 | /** \brief Functions that manage interrupts via the GIC. |
mbed_official | 390:35c2c1cf29cd | 95 | @{ |
mbed_official | 390:35c2c1cf29cd | 96 | */ |
mbed_official | 390:35c2c1cf29cd | 97 | |
mbed_official | 390:35c2c1cf29cd | 98 | /** \brief Enable DistributorGICInterface->ICCICR |= 1; //enable interface |
mbed_official | 390:35c2c1cf29cd | 99 | |
mbed_official | 390:35c2c1cf29cd | 100 | Enables the forwarding of pending interrupts to the CPU interfaces. |
mbed_official | 390:35c2c1cf29cd | 101 | |
mbed_official | 390:35c2c1cf29cd | 102 | */ |
mbed_official | 390:35c2c1cf29cd | 103 | void GIC_EnableDistributor(void); |
mbed_official | 390:35c2c1cf29cd | 104 | |
mbed_official | 390:35c2c1cf29cd | 105 | /** \brief Disable Distributor |
mbed_official | 390:35c2c1cf29cd | 106 | |
mbed_official | 390:35c2c1cf29cd | 107 | Disables the forwarding of pending interrupts to the CPU interfaces. |
mbed_official | 390:35c2c1cf29cd | 108 | |
mbed_official | 390:35c2c1cf29cd | 109 | */ |
mbed_official | 390:35c2c1cf29cd | 110 | void GIC_DisableDistributor(void); |
mbed_official | 390:35c2c1cf29cd | 111 | |
mbed_official | 390:35c2c1cf29cd | 112 | /** \brief Provides information about the configuration of the GIC. |
mbed_official | 390:35c2c1cf29cd | 113 | Provides information about the configuration of the GIC. |
mbed_official | 390:35c2c1cf29cd | 114 | - whether the GIC implements the Security Extensions |
mbed_official | 390:35c2c1cf29cd | 115 | - the maximum number of interrupt IDs that the GIC supports |
mbed_official | 390:35c2c1cf29cd | 116 | - the number of CPU interfaces implemented |
mbed_official | 390:35c2c1cf29cd | 117 | - if the GIC implements the Security Extensions, the maximum number of implemented Lockable Shared Peripheral Interrupts (LSPIs). |
mbed_official | 390:35c2c1cf29cd | 118 | |
mbed_official | 390:35c2c1cf29cd | 119 | \return Distributor Information. |
mbed_official | 390:35c2c1cf29cd | 120 | */ |
mbed_official | 390:35c2c1cf29cd | 121 | uint32_t GIC_DistributorInfo(void); |
mbed_official | 390:35c2c1cf29cd | 122 | |
mbed_official | 390:35c2c1cf29cd | 123 | /** \brief Distributor Implementer Identification Register. |
mbed_official | 390:35c2c1cf29cd | 124 | |
mbed_official | 390:35c2c1cf29cd | 125 | Distributor Implementer Identification Register |
mbed_official | 390:35c2c1cf29cd | 126 | |
mbed_official | 390:35c2c1cf29cd | 127 | \return Implementer Information. |
mbed_official | 390:35c2c1cf29cd | 128 | */ |
mbed_official | 390:35c2c1cf29cd | 129 | uint32_t GIC_DistributorImplementer(void); |
mbed_official | 390:35c2c1cf29cd | 130 | |
mbed_official | 390:35c2c1cf29cd | 131 | /** \brief Set list of processors that the interrupt is sent to if it is asserted. |
mbed_official | 390:35c2c1cf29cd | 132 | |
mbed_official | 390:35c2c1cf29cd | 133 | The ICDIPTRs provide an 8-bit CPU targets field for each interrupt supported by the GIC. |
mbed_official | 390:35c2c1cf29cd | 134 | This field stores the list of processors that the interrupt is sent to if it is asserted. |
mbed_official | 390:35c2c1cf29cd | 135 | |
mbed_official | 390:35c2c1cf29cd | 136 | \param [in] IRQn Interrupt number. |
mbed_official | 390:35c2c1cf29cd | 137 | \param [in] target CPU target |
mbed_official | 390:35c2c1cf29cd | 138 | */ |
mbed_official | 390:35c2c1cf29cd | 139 | void GIC_SetTarget(IRQn_Type IRQn, uint32_t cpu_target); |
mbed_official | 390:35c2c1cf29cd | 140 | |
mbed_official | 390:35c2c1cf29cd | 141 | /** \brief Get list of processors that the interrupt is sent to if it is asserted. |
mbed_official | 390:35c2c1cf29cd | 142 | |
mbed_official | 390:35c2c1cf29cd | 143 | The ICDIPTRs provide an 8-bit CPU targets field for each interrupt supported by the GIC. |
mbed_official | 390:35c2c1cf29cd | 144 | This field stores the list of processors that the interrupt is sent to if it is asserted. |
mbed_official | 390:35c2c1cf29cd | 145 | |
mbed_official | 390:35c2c1cf29cd | 146 | \param [in] IRQn Interrupt number. |
mbed_official | 390:35c2c1cf29cd | 147 | \param [in] target CPU target |
mbed_official | 390:35c2c1cf29cd | 148 | */ |
mbed_official | 390:35c2c1cf29cd | 149 | uint32_t GIC_GetTarget(IRQn_Type IRQn); |
mbed_official | 390:35c2c1cf29cd | 150 | |
mbed_official | 390:35c2c1cf29cd | 151 | /** \brief Enable Interface |
mbed_official | 390:35c2c1cf29cd | 152 | |
mbed_official | 390:35c2c1cf29cd | 153 | Enables the signalling of interrupts to the target processors. |
mbed_official | 390:35c2c1cf29cd | 154 | |
mbed_official | 390:35c2c1cf29cd | 155 | */ |
mbed_official | 390:35c2c1cf29cd | 156 | void GIC_EnableInterface(void); |
mbed_official | 390:35c2c1cf29cd | 157 | |
mbed_official | 390:35c2c1cf29cd | 158 | /** \brief Disable Interface |
mbed_official | 390:35c2c1cf29cd | 159 | |
mbed_official | 390:35c2c1cf29cd | 160 | Disables the signalling of interrupts to the target processors. |
mbed_official | 390:35c2c1cf29cd | 161 | |
mbed_official | 390:35c2c1cf29cd | 162 | */ |
mbed_official | 390:35c2c1cf29cd | 163 | void GIC_DisableInterface(void); |
mbed_official | 390:35c2c1cf29cd | 164 | |
mbed_official | 390:35c2c1cf29cd | 165 | /** \brief Acknowledge Interrupt |
mbed_official | 390:35c2c1cf29cd | 166 | |
mbed_official | 390:35c2c1cf29cd | 167 | The function acknowledges the highest priority pending interrupt and returns its IRQ number. |
mbed_official | 390:35c2c1cf29cd | 168 | |
mbed_official | 390:35c2c1cf29cd | 169 | \return Interrupt number |
mbed_official | 390:35c2c1cf29cd | 170 | */ |
mbed_official | 390:35c2c1cf29cd | 171 | IRQn_Type GIC_AcknowledgePending(void); |
mbed_official | 390:35c2c1cf29cd | 172 | |
mbed_official | 390:35c2c1cf29cd | 173 | /** \brief End Interrupt |
mbed_official | 390:35c2c1cf29cd | 174 | |
mbed_official | 390:35c2c1cf29cd | 175 | The function writes the end of interrupt register, indicating that handling of the interrupt is complete. |
mbed_official | 390:35c2c1cf29cd | 176 | |
mbed_official | 390:35c2c1cf29cd | 177 | \param [in] IRQn Interrupt number. |
mbed_official | 390:35c2c1cf29cd | 178 | */ |
mbed_official | 390:35c2c1cf29cd | 179 | void GIC_EndInterrupt(IRQn_Type IRQn); |
mbed_official | 390:35c2c1cf29cd | 180 | |
mbed_official | 390:35c2c1cf29cd | 181 | |
mbed_official | 390:35c2c1cf29cd | 182 | /** \brief Enable Interrupt |
mbed_official | 390:35c2c1cf29cd | 183 | |
mbed_official | 390:35c2c1cf29cd | 184 | Set-enable bit for each interrupt supported by the GIC. |
mbed_official | 390:35c2c1cf29cd | 185 | |
mbed_official | 390:35c2c1cf29cd | 186 | \param [in] IRQn External interrupt number. |
mbed_official | 390:35c2c1cf29cd | 187 | */ |
mbed_official | 390:35c2c1cf29cd | 188 | void GIC_EnableIRQ(IRQn_Type IRQn); |
mbed_official | 390:35c2c1cf29cd | 189 | |
mbed_official | 390:35c2c1cf29cd | 190 | /** \brief Disable Interrupt |
mbed_official | 390:35c2c1cf29cd | 191 | |
mbed_official | 390:35c2c1cf29cd | 192 | Clear-enable bit for each interrupt supported by the GIC. |
mbed_official | 390:35c2c1cf29cd | 193 | |
mbed_official | 390:35c2c1cf29cd | 194 | \param [in] IRQn Number of the external interrupt to disable |
mbed_official | 390:35c2c1cf29cd | 195 | */ |
mbed_official | 390:35c2c1cf29cd | 196 | void GIC_DisableIRQ(IRQn_Type IRQn); |
mbed_official | 390:35c2c1cf29cd | 197 | |
mbed_official | 390:35c2c1cf29cd | 198 | /** \brief Set Pending Interrupt |
mbed_official | 390:35c2c1cf29cd | 199 | |
mbed_official | 390:35c2c1cf29cd | 200 | Set-pending bit for each interrupt supported by the GIC. |
mbed_official | 390:35c2c1cf29cd | 201 | |
mbed_official | 390:35c2c1cf29cd | 202 | \param [in] IRQn Interrupt number. |
mbed_official | 390:35c2c1cf29cd | 203 | */ |
mbed_official | 390:35c2c1cf29cd | 204 | void GIC_SetPendingIRQ(IRQn_Type IRQn); |
mbed_official | 390:35c2c1cf29cd | 205 | |
mbed_official | 390:35c2c1cf29cd | 206 | /** \brief Clear Pending Interrupt |
mbed_official | 390:35c2c1cf29cd | 207 | |
mbed_official | 390:35c2c1cf29cd | 208 | Clear-pending bit for each interrupt supported by the GIC |
mbed_official | 390:35c2c1cf29cd | 209 | |
mbed_official | 390:35c2c1cf29cd | 210 | \param [in] IRQn Number of the interrupt for clear pending |
mbed_official | 390:35c2c1cf29cd | 211 | */ |
mbed_official | 390:35c2c1cf29cd | 212 | void GIC_ClearPendingIRQ(IRQn_Type IRQn); |
mbed_official | 390:35c2c1cf29cd | 213 | |
mbed_official | 390:35c2c1cf29cd | 214 | /** \brief Int_config field for each interrupt supported by the GIC. |
mbed_official | 390:35c2c1cf29cd | 215 | |
mbed_official | 390:35c2c1cf29cd | 216 | This field identifies whether the corresponding interrupt is: |
mbed_official | 390:35c2c1cf29cd | 217 | (1) edge-triggered or (0) level-sensitive |
mbed_official | 390:35c2c1cf29cd | 218 | (1) 1-N model or (0) N-N model |
mbed_official | 390:35c2c1cf29cd | 219 | |
mbed_official | 390:35c2c1cf29cd | 220 | \param [in] IRQn Interrupt number. |
mbed_official | 390:35c2c1cf29cd | 221 | \param [in] edge_level (1) edge-triggered or (0) level-sensitive |
mbed_official | 390:35c2c1cf29cd | 222 | \param [in] model (1) 1-N model or (0) N-N model |
mbed_official | 390:35c2c1cf29cd | 223 | */ |
mbed_official | 390:35c2c1cf29cd | 224 | void GIC_SetLevelModel(IRQn_Type IRQn, int8_t edge_level, int8_t model); |
mbed_official | 390:35c2c1cf29cd | 225 | |
mbed_official | 390:35c2c1cf29cd | 226 | |
mbed_official | 390:35c2c1cf29cd | 227 | /** \brief Set Interrupt Priority |
mbed_official | 390:35c2c1cf29cd | 228 | |
mbed_official | 390:35c2c1cf29cd | 229 | The function sets the priority of an interrupt. |
mbed_official | 390:35c2c1cf29cd | 230 | |
mbed_official | 390:35c2c1cf29cd | 231 | \param [in] IRQn Interrupt number. |
mbed_official | 390:35c2c1cf29cd | 232 | \param [in] priority Priority to set. |
mbed_official | 390:35c2c1cf29cd | 233 | */ |
mbed_official | 390:35c2c1cf29cd | 234 | void GIC_SetPriority(IRQn_Type IRQn, uint32_t priority); |
mbed_official | 390:35c2c1cf29cd | 235 | |
mbed_official | 390:35c2c1cf29cd | 236 | /** \brief Get Interrupt Priority |
mbed_official | 390:35c2c1cf29cd | 237 | |
mbed_official | 390:35c2c1cf29cd | 238 | The function reads the priority of an interrupt. |
mbed_official | 390:35c2c1cf29cd | 239 | |
mbed_official | 390:35c2c1cf29cd | 240 | \param [in] IRQn Interrupt number. |
mbed_official | 390:35c2c1cf29cd | 241 | \return Interrupt Priority. |
mbed_official | 390:35c2c1cf29cd | 242 | */ |
mbed_official | 390:35c2c1cf29cd | 243 | uint32_t GIC_GetPriority(IRQn_Type IRQn); |
mbed_official | 390:35c2c1cf29cd | 244 | |
mbed_official | 390:35c2c1cf29cd | 245 | /** \brief CPU Interface Priority Mask Register |
mbed_official | 390:35c2c1cf29cd | 246 | |
mbed_official | 390:35c2c1cf29cd | 247 | The priority mask level for the CPU interface. If the priority of an interrupt is higher than the |
mbed_official | 390:35c2c1cf29cd | 248 | value indicated by this field, the interface signals the interrupt to the processor. |
mbed_official | 390:35c2c1cf29cd | 249 | |
mbed_official | 390:35c2c1cf29cd | 250 | \param [in] Mask. |
mbed_official | 390:35c2c1cf29cd | 251 | */ |
mbed_official | 390:35c2c1cf29cd | 252 | void GIC_InterfacePriorityMask(uint32_t priority); |
mbed_official | 390:35c2c1cf29cd | 253 | |
mbed_official | 390:35c2c1cf29cd | 254 | /** \brief Set the binary point. |
mbed_official | 390:35c2c1cf29cd | 255 | |
mbed_official | 390:35c2c1cf29cd | 256 | Set the point at which the priority value fields split into two parts, the group priority field and the subpriority field. |
mbed_official | 390:35c2c1cf29cd | 257 | |
mbed_official | 390:35c2c1cf29cd | 258 | \param [in] Mask. |
mbed_official | 390:35c2c1cf29cd | 259 | */ |
mbed_official | 390:35c2c1cf29cd | 260 | void GIC_SetBinaryPoint(uint32_t binary_point); |
mbed_official | 390:35c2c1cf29cd | 261 | |
mbed_official | 390:35c2c1cf29cd | 262 | /** \brief Get the binary point. |
mbed_official | 390:35c2c1cf29cd | 263 | |
mbed_official | 390:35c2c1cf29cd | 264 | Get the point at which the priority value fields split into two parts, the group priority field and the subpriority field. |
mbed_official | 390:35c2c1cf29cd | 265 | |
mbed_official | 390:35c2c1cf29cd | 266 | \return Binary point. |
mbed_official | 390:35c2c1cf29cd | 267 | */ |
mbed_official | 390:35c2c1cf29cd | 268 | uint32_t GIC_GetBinaryPoint(uint32_t binary_point); |
mbed_official | 390:35c2c1cf29cd | 269 | |
mbed_official | 390:35c2c1cf29cd | 270 | /** \brief Get Interrupt state. |
mbed_official | 390:35c2c1cf29cd | 271 | |
mbed_official | 390:35c2c1cf29cd | 272 | Get the interrupt state, whether pending and/or active |
mbed_official | 390:35c2c1cf29cd | 273 | |
mbed_official | 390:35c2c1cf29cd | 274 | \return 0 - inactive, 1 - pending, 2 - active, 3 - pending and active |
mbed_official | 390:35c2c1cf29cd | 275 | */ |
mbed_official | 390:35c2c1cf29cd | 276 | uint32_t GIC_GetIRQStatus(IRQn_Type IRQn); |
mbed_official | 390:35c2c1cf29cd | 277 | |
mbed_official | 390:35c2c1cf29cd | 278 | /** \brief Send Software Generated interrupt |
mbed_official | 390:35c2c1cf29cd | 279 | |
mbed_official | 390:35c2c1cf29cd | 280 | Provides an interrupt priority filter. Only interrupts with higher priority than the value in this register can be signalled to the processor. |
mbed_official | 390:35c2c1cf29cd | 281 | GIC_InterfacePriorityMask |
mbed_official | 390:35c2c1cf29cd | 282 | \param [in] IRQn The Interrupt ID of the SGI. |
mbed_official | 390:35c2c1cf29cd | 283 | \param [in] target_list CPUTargetList |
mbed_official | 390:35c2c1cf29cd | 284 | \param [in] filter_list TargetListFilter |
mbed_official | 390:35c2c1cf29cd | 285 | */ |
mbed_official | 390:35c2c1cf29cd | 286 | void GIC_SendSGI(IRQn_Type IRQn, uint32_t target_list, uint32_t filter_list); |
mbed_official | 390:35c2c1cf29cd | 287 | |
mbed_official | 390:35c2c1cf29cd | 288 | /** \brief API call to initialise the interrupt distributor |
mbed_official | 390:35c2c1cf29cd | 289 | |
mbed_official | 390:35c2c1cf29cd | 290 | API call to initialise the interrupt distributor |
mbed_official | 390:35c2c1cf29cd | 291 | |
mbed_official | 390:35c2c1cf29cd | 292 | */ |
mbed_official | 390:35c2c1cf29cd | 293 | void GIC_DistInit(void); |
mbed_official | 390:35c2c1cf29cd | 294 | |
mbed_official | 390:35c2c1cf29cd | 295 | /** \brief API call to initialise the CPU interface |
mbed_official | 390:35c2c1cf29cd | 296 | |
mbed_official | 390:35c2c1cf29cd | 297 | API call to initialise the CPU interface |
mbed_official | 390:35c2c1cf29cd | 298 | |
mbed_official | 390:35c2c1cf29cd | 299 | */ |
mbed_official | 390:35c2c1cf29cd | 300 | void GIC_CPUInterfaceInit(void); |
mbed_official | 390:35c2c1cf29cd | 301 | |
mbed_official | 390:35c2c1cf29cd | 302 | /** \brief API call to set the Interrupt Configuration Registers |
mbed_official | 390:35c2c1cf29cd | 303 | |
mbed_official | 390:35c2c1cf29cd | 304 | API call to initialise the Interrupt Configuration Registers |
mbed_official | 390:35c2c1cf29cd | 305 | |
mbed_official | 390:35c2c1cf29cd | 306 | */ |
mbed_official | 390:35c2c1cf29cd | 307 | void GIC_SetICDICFR (const uint32_t *ICDICFRn); |
mbed_official | 390:35c2c1cf29cd | 308 | |
mbed_official | 390:35c2c1cf29cd | 309 | /** \brief API call to Enable the GIC |
mbed_official | 390:35c2c1cf29cd | 310 | |
mbed_official | 390:35c2c1cf29cd | 311 | API call to Enable the GIC |
mbed_official | 390:35c2c1cf29cd | 312 | |
mbed_official | 390:35c2c1cf29cd | 313 | */ |
mbed_official | 390:35c2c1cf29cd | 314 | void GIC_Enable(void); |
mbed_official | 390:35c2c1cf29cd | 315 | |
mbed_official | 390:35c2c1cf29cd | 316 | #endif /* GIC_H_ */ |