Zakaria ElQotbi / mbed-src

mbed library sources for airmote

Fork of mbed-src by mbed official

targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/inc/iodefines/rspi_iodefine.h@625:88d3fa07e462, 2015-11-24 (annotated)

Committer:
zskdan
Date:
Tue Nov 24 14:02:46 2015 +0000
Revision:
625:88d3fa07e462
Parent:
390:35c2c1cf29cd 
remove unused service

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 390:35c2c1cf29cd 1 /*******************************************************************************
mbed_official 390:35c2c1cf29cd 2 * DISCLAIMER
mbed_official 390:35c2c1cf29cd 3 * This software is supplied by Renesas Electronics Corporation and is only
mbed_official 390:35c2c1cf29cd 4 * intended for use with Renesas products. No other uses are authorized. This
mbed_official 390:35c2c1cf29cd 5 * software is owned by Renesas Electronics Corporation and is protected under
mbed_official 390:35c2c1cf29cd 6 * all applicable laws, including copyright laws.
mbed_official 390:35c2c1cf29cd 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
mbed_official 390:35c2c1cf29cd 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
mbed_official 390:35c2c1cf29cd 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
mbed_official 390:35c2c1cf29cd 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
mbed_official 390:35c2c1cf29cd 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
mbed_official 390:35c2c1cf29cd 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
mbed_official 390:35c2c1cf29cd 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
mbed_official 390:35c2c1cf29cd 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
mbed_official 390:35c2c1cf29cd 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
mbed_official 390:35c2c1cf29cd 16 * Renesas reserves the right, without notice, to make changes to this software
mbed_official 390:35c2c1cf29cd 17 * and to discontinue the availability of this software. By using this software,
mbed_official 390:35c2c1cf29cd 18 * you agree to the additional terms and conditions found by accessing the
mbed_official 390:35c2c1cf29cd 19 * following link:
mbed_official 390:35c2c1cf29cd 20 * http://www.renesas.com/disclaimer*
mbed_official 390:35c2c1cf29cd 21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
mbed_official 390:35c2c1cf29cd 22 *******************************************************************************/
mbed_official 390:35c2c1cf29cd 23 /*******************************************************************************
mbed_official 390:35c2c1cf29cd 24 * File Name : rspi_iodefine.h
mbed_official 390:35c2c1cf29cd 25 * $Rev: $
mbed_official 390:35c2c1cf29cd 26 * $Date:: $
mbed_official 390:35c2c1cf29cd 27 * Description : Definition of I/O Register (V1.00a)
mbed_official 390:35c2c1cf29cd 28 ******************************************************************************/
mbed_official 390:35c2c1cf29cd 29 #ifndef RSPI_IODEFINE_H
mbed_official 390:35c2c1cf29cd 30 #define RSPI_IODEFINE_H
mbed_official 390:35c2c1cf29cd 31 /* ->SEC M1.10.1 : Not magic number */
mbed_official 390:35c2c1cf29cd 32
mbed_official 390:35c2c1cf29cd 33 #include "reg32_t.h"
mbed_official 390:35c2c1cf29cd 34
mbed_official 390:35c2c1cf29cd 35 struct st_rspi
mbed_official 390:35c2c1cf29cd 36 { /* RSPI */
mbed_official 390:35c2c1cf29cd 37 volatile uint8_t SPCR; /* SPCR */
mbed_official 390:35c2c1cf29cd 38 volatile uint8_t SSLP; /* SSLP */
mbed_official 390:35c2c1cf29cd 39 volatile uint8_t SPPCR; /* SPPCR */
mbed_official 390:35c2c1cf29cd 40 volatile uint8_t SPSR; /* SPSR */
mbed_official 390:35c2c1cf29cd 41 union reg32_t SPDR; /* SPDR */
mbed_official 390:35c2c1cf29cd 42
mbed_official 390:35c2c1cf29cd 43 volatile uint8_t SPSCR; /* SPSCR */
mbed_official 390:35c2c1cf29cd 44 volatile uint8_t SPSSR; /* SPSSR */
mbed_official 390:35c2c1cf29cd 45 volatile uint8_t SPBR; /* SPBR */
mbed_official 390:35c2c1cf29cd 46 volatile uint8_t SPDCR; /* SPDCR */
mbed_official 390:35c2c1cf29cd 47 volatile uint8_t SPCKD; /* SPCKD */
mbed_official 390:35c2c1cf29cd 48 volatile uint8_t SSLND; /* SSLND */
mbed_official 390:35c2c1cf29cd 49 volatile uint8_t SPND; /* SPND */
mbed_official 390:35c2c1cf29cd 50 volatile uint8_t dummy1[1]; /* */
mbed_official 390:35c2c1cf29cd 51 #define SPCMD_COUNT 4
mbed_official 390:35c2c1cf29cd 52 volatile uint16_t SPCMD0; /* SPCMD0 */
mbed_official 390:35c2c1cf29cd 53 volatile uint16_t SPCMD1; /* SPCMD1 */
mbed_official 390:35c2c1cf29cd 54 volatile uint16_t SPCMD2; /* SPCMD2 */
mbed_official 390:35c2c1cf29cd 55 volatile uint16_t SPCMD3; /* SPCMD3 */
mbed_official 390:35c2c1cf29cd 56 volatile uint8_t dummy2[8]; /* */
mbed_official 390:35c2c1cf29cd 57 volatile uint8_t SPBFCR; /* SPBFCR */
mbed_official 390:35c2c1cf29cd 58 volatile uint8_t dummy3[1]; /* */
mbed_official 390:35c2c1cf29cd 59 volatile uint16_t SPBFDR; /* SPBFDR */
mbed_official 390:35c2c1cf29cd 60 };
mbed_official 390:35c2c1cf29cd 61
mbed_official 390:35c2c1cf29cd 62
mbed_official 390:35c2c1cf29cd 63 #define RSPI0 (*(struct st_rspi *)0xE800C800uL) /* RSPI0 */
mbed_official 390:35c2c1cf29cd 64 #define RSPI1 (*(struct st_rspi *)0xE800D000uL) /* RSPI1 */
mbed_official 390:35c2c1cf29cd 65 #define RSPI2 (*(struct st_rspi *)0xE800D800uL) /* RSPI2 */
mbed_official 390:35c2c1cf29cd 66 #define RSPI3 (*(struct st_rspi *)0xE800E000uL) /* RSPI3 */
mbed_official 390:35c2c1cf29cd 67 #define RSPI4 (*(struct st_rspi *)0xE800E800uL) /* RSPI4 */
mbed_official 390:35c2c1cf29cd 68
mbed_official 390:35c2c1cf29cd 69
mbed_official 390:35c2c1cf29cd 70 /* Start of channnel array defines of RSPI */
mbed_official 390:35c2c1cf29cd 71
mbed_official 390:35c2c1cf29cd 72 /* Channnel array defines of RSPI */
mbed_official 390:35c2c1cf29cd 73 /*(Sample) value = RSPI[ channel ]->SPCR; */
mbed_official 390:35c2c1cf29cd 74 #define RSPI_COUNT 5
mbed_official 390:35c2c1cf29cd 75 #define RSPI_ADDRESS_LIST \
mbed_official 390:35c2c1cf29cd 76 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
mbed_official 390:35c2c1cf29cd 77 &RSPI0, &RSPI1, &RSPI2, &RSPI3, &RSPI4 \
mbed_official 390:35c2c1cf29cd 78 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
mbed_official 390:35c2c1cf29cd 79
mbed_official 390:35c2c1cf29cd 80 /* End of channnel array defines of RSPI */
mbed_official 390:35c2c1cf29cd 81
mbed_official 390:35c2c1cf29cd 82
mbed_official 390:35c2c1cf29cd 83 #define SPCR_0 RSPI0.SPCR
mbed_official 390:35c2c1cf29cd 84 #define SSLP_0 RSPI0.SSLP
mbed_official 390:35c2c1cf29cd 85 #define SPPCR_0 RSPI0.SPPCR
mbed_official 390:35c2c1cf29cd 86 #define SPSR_0 RSPI0.SPSR
mbed_official 390:35c2c1cf29cd 87 #define SPDR_0 RSPI0.SPDR.UINT32
mbed_official 390:35c2c1cf29cd 88 #define SPDR_0L RSPI0.SPDR.UINT16[L]
mbed_official 390:35c2c1cf29cd 89 #define SPDR_0H RSPI0.SPDR.UINT16[H]
mbed_official 390:35c2c1cf29cd 90 #define SPDR_0LL RSPI0.SPDR.UINT8[LL]
mbed_official 390:35c2c1cf29cd 91 #define SPDR_0LH RSPI0.SPDR.UINT8[LH]
mbed_official 390:35c2c1cf29cd 92 #define SPDR_0HL RSPI0.SPDR.UINT8[HL]
mbed_official 390:35c2c1cf29cd 93 #define SPDR_0HH RSPI0.SPDR.UINT8[HH]
mbed_official 390:35c2c1cf29cd 94 #define SPSCR_0 RSPI0.SPSCR
mbed_official 390:35c2c1cf29cd 95 #define SPSSR_0 RSPI0.SPSSR
mbed_official 390:35c2c1cf29cd 96 #define SPBR_0 RSPI0.SPBR
mbed_official 390:35c2c1cf29cd 97 #define SPDCR_0 RSPI0.SPDCR
mbed_official 390:35c2c1cf29cd 98 #define SPCKD_0 RSPI0.SPCKD
mbed_official 390:35c2c1cf29cd 99 #define SSLND_0 RSPI0.SSLND
mbed_official 390:35c2c1cf29cd 100 #define SPND_0 RSPI0.SPND
mbed_official 390:35c2c1cf29cd 101 #define SPCMD0_0 RSPI0.SPCMD0
mbed_official 390:35c2c1cf29cd 102 #define SPCMD1_0 RSPI0.SPCMD1
mbed_official 390:35c2c1cf29cd 103 #define SPCMD2_0 RSPI0.SPCMD2
mbed_official 390:35c2c1cf29cd 104 #define SPCMD3_0 RSPI0.SPCMD3
mbed_official 390:35c2c1cf29cd 105 #define SPBFCR_0 RSPI0.SPBFCR
mbed_official 390:35c2c1cf29cd 106 #define SPBFDR_0 RSPI0.SPBFDR
mbed_official 390:35c2c1cf29cd 107 #define SPCR_1 RSPI1.SPCR
mbed_official 390:35c2c1cf29cd 108 #define SSLP_1 RSPI1.SSLP
mbed_official 390:35c2c1cf29cd 109 #define SPPCR_1 RSPI1.SPPCR
mbed_official 390:35c2c1cf29cd 110 #define SPSR_1 RSPI1.SPSR
mbed_official 390:35c2c1cf29cd 111 #define SPDR_1 RSPI1.SPDR.UINT32
mbed_official 390:35c2c1cf29cd 112 #define SPDR_1L RSPI1.SPDR.UINT16[L]
mbed_official 390:35c2c1cf29cd 113 #define SPDR_1H RSPI1.SPDR.UINT16[H]
mbed_official 390:35c2c1cf29cd 114 #define SPDR_1LL RSPI1.SPDR.UINT8[LL]
mbed_official 390:35c2c1cf29cd 115 #define SPDR_1LH RSPI1.SPDR.UINT8[LH]
mbed_official 390:35c2c1cf29cd 116 #define SPDR_1HL RSPI1.SPDR.UINT8[HL]
mbed_official 390:35c2c1cf29cd 117 #define SPDR_1HH RSPI1.SPDR.UINT8[HH]
mbed_official 390:35c2c1cf29cd 118 #define SPSCR_1 RSPI1.SPSCR
mbed_official 390:35c2c1cf29cd 119 #define SPSSR_1 RSPI1.SPSSR
mbed_official 390:35c2c1cf29cd 120 #define SPBR_1 RSPI1.SPBR
mbed_official 390:35c2c1cf29cd 121 #define SPDCR_1 RSPI1.SPDCR
mbed_official 390:35c2c1cf29cd 122 #define SPCKD_1 RSPI1.SPCKD
mbed_official 390:35c2c1cf29cd 123 #define SSLND_1 RSPI1.SSLND
mbed_official 390:35c2c1cf29cd 124 #define SPND_1 RSPI1.SPND
mbed_official 390:35c2c1cf29cd 125 #define SPCMD0_1 RSPI1.SPCMD0
mbed_official 390:35c2c1cf29cd 126 #define SPCMD1_1 RSPI1.SPCMD1
mbed_official 390:35c2c1cf29cd 127 #define SPCMD2_1 RSPI1.SPCMD2
mbed_official 390:35c2c1cf29cd 128 #define SPCMD3_1 RSPI1.SPCMD3
mbed_official 390:35c2c1cf29cd 129 #define SPBFCR_1 RSPI1.SPBFCR
mbed_official 390:35c2c1cf29cd 130 #define SPBFDR_1 RSPI1.SPBFDR
mbed_official 390:35c2c1cf29cd 131 #define SPCR_2 RSPI2.SPCR
mbed_official 390:35c2c1cf29cd 132 #define SSLP_2 RSPI2.SSLP
mbed_official 390:35c2c1cf29cd 133 #define SPPCR_2 RSPI2.SPPCR
mbed_official 390:35c2c1cf29cd 134 #define SPSR_2 RSPI2.SPSR
mbed_official 390:35c2c1cf29cd 135 #define SPDR_2 RSPI2.SPDR.UINT32
mbed_official 390:35c2c1cf29cd 136 #define SPDR_2L RSPI2.SPDR.UINT16[L]
mbed_official 390:35c2c1cf29cd 137 #define SPDR_2H RSPI2.SPDR.UINT16[H]
mbed_official 390:35c2c1cf29cd 138 #define SPDR_2LL RSPI2.SPDR.UINT8[LL]
mbed_official 390:35c2c1cf29cd 139 #define SPDR_2LH RSPI2.SPDR.UINT8[LH]
mbed_official 390:35c2c1cf29cd 140 #define SPDR_2HL RSPI2.SPDR.UINT8[HL]
mbed_official 390:35c2c1cf29cd 141 #define SPDR_2HH RSPI2.SPDR.UINT8[HH]
mbed_official 390:35c2c1cf29cd 142 #define SPSCR_2 RSPI2.SPSCR
mbed_official 390:35c2c1cf29cd 143 #define SPSSR_2 RSPI2.SPSSR
mbed_official 390:35c2c1cf29cd 144 #define SPBR_2 RSPI2.SPBR
mbed_official 390:35c2c1cf29cd 145 #define SPDCR_2 RSPI2.SPDCR
mbed_official 390:35c2c1cf29cd 146 #define SPCKD_2 RSPI2.SPCKD
mbed_official 390:35c2c1cf29cd 147 #define SSLND_2 RSPI2.SSLND
mbed_official 390:35c2c1cf29cd 148 #define SPND_2 RSPI2.SPND
mbed_official 390:35c2c1cf29cd 149 #define SPCMD0_2 RSPI2.SPCMD0
mbed_official 390:35c2c1cf29cd 150 #define SPCMD1_2 RSPI2.SPCMD1
mbed_official 390:35c2c1cf29cd 151 #define SPCMD2_2 RSPI2.SPCMD2
mbed_official 390:35c2c1cf29cd 152 #define SPCMD3_2 RSPI2.SPCMD3
mbed_official 390:35c2c1cf29cd 153 #define SPBFCR_2 RSPI2.SPBFCR
mbed_official 390:35c2c1cf29cd 154 #define SPBFDR_2 RSPI2.SPBFDR
mbed_official 390:35c2c1cf29cd 155 #define SPCR_3 RSPI3.SPCR
mbed_official 390:35c2c1cf29cd 156 #define SSLP_3 RSPI3.SSLP
mbed_official 390:35c2c1cf29cd 157 #define SPPCR_3 RSPI3.SPPCR
mbed_official 390:35c2c1cf29cd 158 #define SPSR_3 RSPI3.SPSR
mbed_official 390:35c2c1cf29cd 159 #define SPDR_3 RSPI3.SPDR.UINT32
mbed_official 390:35c2c1cf29cd 160 #define SPDR_3L RSPI3.SPDR.UINT16[L]
mbed_official 390:35c2c1cf29cd 161 #define SPDR_3H RSPI3.SPDR.UINT16[H]
mbed_official 390:35c2c1cf29cd 162 #define SPDR_3LL RSPI3.SPDR.UINT8[LL]
mbed_official 390:35c2c1cf29cd 163 #define SPDR_3LH RSPI3.SPDR.UINT8[LH]
mbed_official 390:35c2c1cf29cd 164 #define SPDR_3HL RSPI3.SPDR.UINT8[HL]
mbed_official 390:35c2c1cf29cd 165 #define SPDR_3HH RSPI3.SPDR.UINT8[HH]
mbed_official 390:35c2c1cf29cd 166 #define SPSCR_3 RSPI3.SPSCR
mbed_official 390:35c2c1cf29cd 167 #define SPSSR_3 RSPI3.SPSSR
mbed_official 390:35c2c1cf29cd 168 #define SPBR_3 RSPI3.SPBR
mbed_official 390:35c2c1cf29cd 169 #define SPDCR_3 RSPI3.SPDCR
mbed_official 390:35c2c1cf29cd 170 #define SPCKD_3 RSPI3.SPCKD
mbed_official 390:35c2c1cf29cd 171 #define SSLND_3 RSPI3.SSLND
mbed_official 390:35c2c1cf29cd 172 #define SPND_3 RSPI3.SPND
mbed_official 390:35c2c1cf29cd 173 #define SPCMD0_3 RSPI3.SPCMD0
mbed_official 390:35c2c1cf29cd 174 #define SPCMD1_3 RSPI3.SPCMD1
mbed_official 390:35c2c1cf29cd 175 #define SPCMD2_3 RSPI3.SPCMD2
mbed_official 390:35c2c1cf29cd 176 #define SPCMD3_3 RSPI3.SPCMD3
mbed_official 390:35c2c1cf29cd 177 #define SPBFCR_3 RSPI3.SPBFCR
mbed_official 390:35c2c1cf29cd 178 #define SPBFDR_3 RSPI3.SPBFDR
mbed_official 390:35c2c1cf29cd 179 #define SPCR_4 RSPI4.SPCR
mbed_official 390:35c2c1cf29cd 180 #define SSLP_4 RSPI4.SSLP
mbed_official 390:35c2c1cf29cd 181 #define SPPCR_4 RSPI4.SPPCR
mbed_official 390:35c2c1cf29cd 182 #define SPSR_4 RSPI4.SPSR
mbed_official 390:35c2c1cf29cd 183 #define SPDR_4 RSPI4.SPDR.UINT32
mbed_official 390:35c2c1cf29cd 184 #define SPDR_4L RSPI4.SPDR.UINT16[L]
mbed_official 390:35c2c1cf29cd 185 #define SPDR_4H RSPI4.SPDR.UINT16[H]
mbed_official 390:35c2c1cf29cd 186 #define SPDR_4LL RSPI4.SPDR.UINT8[LL]
mbed_official 390:35c2c1cf29cd 187 #define SPDR_4LH RSPI4.SPDR.UINT8[LH]
mbed_official 390:35c2c1cf29cd 188 #define SPDR_4HL RSPI4.SPDR.UINT8[HL]
mbed_official 390:35c2c1cf29cd 189 #define SPDR_4HH RSPI4.SPDR.UINT8[HH]
mbed_official 390:35c2c1cf29cd 190 #define SPSCR_4 RSPI4.SPSCR
mbed_official 390:35c2c1cf29cd 191 #define SPSSR_4 RSPI4.SPSSR
mbed_official 390:35c2c1cf29cd 192 #define SPBR_4 RSPI4.SPBR
mbed_official 390:35c2c1cf29cd 193 #define SPDCR_4 RSPI4.SPDCR
mbed_official 390:35c2c1cf29cd 194 #define SPCKD_4 RSPI4.SPCKD
mbed_official 390:35c2c1cf29cd 195 #define SSLND_4 RSPI4.SSLND
mbed_official 390:35c2c1cf29cd 196 #define SPND_4 RSPI4.SPND
mbed_official 390:35c2c1cf29cd 197 #define SPCMD0_4 RSPI4.SPCMD0
mbed_official 390:35c2c1cf29cd 198 #define SPCMD1_4 RSPI4.SPCMD1
mbed_official 390:35c2c1cf29cd 199 #define SPCMD2_4 RSPI4.SPCMD2
mbed_official 390:35c2c1cf29cd 200 #define SPCMD3_4 RSPI4.SPCMD3
mbed_official 390:35c2c1cf29cd 201 #define SPBFCR_4 RSPI4.SPBFCR
mbed_official 390:35c2c1cf29cd 202 #define SPBFDR_4 RSPI4.SPBFDR
mbed_official 390:35c2c1cf29cd 203 /* <-SEC M1.10.1 */
mbed_official 390:35c2c1cf29cd 204 #endif