Zakaria ElQotbi / mbed-src

mbed library sources for airmote

Fork of mbed-src by mbed official

targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/inc/iodefines/romdec_iodefine.h@625:88d3fa07e462, 2015-11-24 (annotated)

Committer:
zskdan
Date:
Tue Nov 24 14:02:46 2015 +0000
Revision:
625:88d3fa07e462
Parent:
390:35c2c1cf29cd 
remove unused service

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 390:35c2c1cf29cd 1 /*******************************************************************************
mbed_official 390:35c2c1cf29cd 2 * DISCLAIMER
mbed_official 390:35c2c1cf29cd 3 * This software is supplied by Renesas Electronics Corporation and is only
mbed_official 390:35c2c1cf29cd 4 * intended for use with Renesas products. No other uses are authorized. This
mbed_official 390:35c2c1cf29cd 5 * software is owned by Renesas Electronics Corporation and is protected under
mbed_official 390:35c2c1cf29cd 6 * all applicable laws, including copyright laws.
mbed_official 390:35c2c1cf29cd 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
mbed_official 390:35c2c1cf29cd 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
mbed_official 390:35c2c1cf29cd 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
mbed_official 390:35c2c1cf29cd 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
mbed_official 390:35c2c1cf29cd 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
mbed_official 390:35c2c1cf29cd 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
mbed_official 390:35c2c1cf29cd 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
mbed_official 390:35c2c1cf29cd 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
mbed_official 390:35c2c1cf29cd 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
mbed_official 390:35c2c1cf29cd 16 * Renesas reserves the right, without notice, to make changes to this software
mbed_official 390:35c2c1cf29cd 17 * and to discontinue the availability of this software. By using this software,
mbed_official 390:35c2c1cf29cd 18 * you agree to the additional terms and conditions found by accessing the
mbed_official 390:35c2c1cf29cd 19 * following link:
mbed_official 390:35c2c1cf29cd 20 * http://www.renesas.com/disclaimer*
mbed_official 390:35c2c1cf29cd 21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
mbed_official 390:35c2c1cf29cd 22 *******************************************************************************/
mbed_official 390:35c2c1cf29cd 23 /*******************************************************************************
mbed_official 390:35c2c1cf29cd 24 * File Name : romdec_iodefine.h
mbed_official 390:35c2c1cf29cd 25 * $Rev: $
mbed_official 390:35c2c1cf29cd 26 * $Date:: $
mbed_official 390:35c2c1cf29cd 27 * Description : Definition of I/O Register (V1.00a)
mbed_official 390:35c2c1cf29cd 28 ******************************************************************************/
mbed_official 390:35c2c1cf29cd 29 #ifndef ROMDEC_IODEFINE_H
mbed_official 390:35c2c1cf29cd 30 #define ROMDEC_IODEFINE_H
mbed_official 390:35c2c1cf29cd 31 /* ->SEC M1.10.1 : Not magic number */
mbed_official 390:35c2c1cf29cd 32
mbed_official 390:35c2c1cf29cd 33 struct st_romdec
mbed_official 390:35c2c1cf29cd 34 { /* ROMDEC */
mbed_official 390:35c2c1cf29cd 35 volatile uint8_t CROMEN; /* CROMEN */
mbed_official 390:35c2c1cf29cd 36 volatile uint8_t CROMSY0; /* CROMSY0 */
mbed_official 390:35c2c1cf29cd 37 #define ROMDEC_CROMCTL0_COUNT 2
mbed_official 390:35c2c1cf29cd 38 volatile uint8_t CROMCTL0; /* CROMCTL0 */
mbed_official 390:35c2c1cf29cd 39 volatile uint8_t CROMCTL1; /* CROMCTL1 */
mbed_official 390:35c2c1cf29cd 40 volatile uint8_t dummy23[1]; /* */
mbed_official 390:35c2c1cf29cd 41 volatile uint8_t CROMCTL3; /* CROMCTL3 */
mbed_official 390:35c2c1cf29cd 42 volatile uint8_t CROMCTL4; /* CROMCTL4 */
mbed_official 390:35c2c1cf29cd 43 volatile uint8_t CROMCTL5; /* CROMCTL5 */
mbed_official 390:35c2c1cf29cd 44 #define ROMDEC_CROMST0_COUNT 2
mbed_official 390:35c2c1cf29cd 45 volatile uint8_t CROMST0; /* CROMST0 */
mbed_official 390:35c2c1cf29cd 46 volatile uint8_t CROMST1; /* CROMST1 */
mbed_official 390:35c2c1cf29cd 47 volatile uint8_t dummy24[1]; /* */
mbed_official 390:35c2c1cf29cd 48 volatile uint8_t CROMST3; /* CROMST3 */
mbed_official 390:35c2c1cf29cd 49 volatile uint8_t CROMST4; /* CROMST4 */
mbed_official 390:35c2c1cf29cd 50 volatile uint8_t CROMST5; /* CROMST5 */
mbed_official 390:35c2c1cf29cd 51 volatile uint8_t CROMST6; /* CROMST6 */
mbed_official 390:35c2c1cf29cd 52 volatile uint8_t dummy25[5]; /* */
mbed_official 390:35c2c1cf29cd 53 #define ROMDEC_CBUFST0_COUNT 3
mbed_official 390:35c2c1cf29cd 54 volatile uint8_t CBUFST0; /* CBUFST0 */
mbed_official 390:35c2c1cf29cd 55 volatile uint8_t CBUFST1; /* CBUFST1 */
mbed_official 390:35c2c1cf29cd 56 volatile uint8_t CBUFST2; /* CBUFST2 */
mbed_official 390:35c2c1cf29cd 57 volatile uint8_t dummy26[1]; /* */
mbed_official 390:35c2c1cf29cd 58 #define ROMDEC_HEAD00_COUNT 4
mbed_official 390:35c2c1cf29cd 59 volatile uint8_t HEAD00; /* HEAD00 */
mbed_official 390:35c2c1cf29cd 60 volatile uint8_t HEAD01; /* HEAD01 */
mbed_official 390:35c2c1cf29cd 61 volatile uint8_t HEAD02; /* HEAD02 */
mbed_official 390:35c2c1cf29cd 62 volatile uint8_t HEAD03; /* HEAD03 */
mbed_official 390:35c2c1cf29cd 63 #define ROMDEC_SHEAD00_COUNT 8
mbed_official 390:35c2c1cf29cd 64 volatile uint8_t SHEAD00; /* SHEAD00 */
mbed_official 390:35c2c1cf29cd 65 volatile uint8_t SHEAD01; /* SHEAD01 */
mbed_official 390:35c2c1cf29cd 66 volatile uint8_t SHEAD02; /* SHEAD02 */
mbed_official 390:35c2c1cf29cd 67 volatile uint8_t SHEAD03; /* SHEAD03 */
mbed_official 390:35c2c1cf29cd 68 volatile uint8_t SHEAD04; /* SHEAD04 */
mbed_official 390:35c2c1cf29cd 69 volatile uint8_t SHEAD05; /* SHEAD05 */
mbed_official 390:35c2c1cf29cd 70 volatile uint8_t SHEAD06; /* SHEAD06 */
mbed_official 390:35c2c1cf29cd 71 volatile uint8_t SHEAD07; /* SHEAD07 */
mbed_official 390:35c2c1cf29cd 72 #define ROMDEC_HEAD20_COUNT 4
mbed_official 390:35c2c1cf29cd 73 volatile uint8_t HEAD20; /* HEAD20 */
mbed_official 390:35c2c1cf29cd 74 volatile uint8_t HEAD21; /* HEAD21 */
mbed_official 390:35c2c1cf29cd 75 volatile uint8_t HEAD22; /* HEAD22 */
mbed_official 390:35c2c1cf29cd 76 volatile uint8_t HEAD23; /* HEAD23 */
mbed_official 390:35c2c1cf29cd 77 #define ROMDEC_SHEAD20_COUNT 8
mbed_official 390:35c2c1cf29cd 78 volatile uint8_t SHEAD20; /* SHEAD20 */
mbed_official 390:35c2c1cf29cd 79 volatile uint8_t SHEAD21; /* SHEAD21 */
mbed_official 390:35c2c1cf29cd 80 volatile uint8_t SHEAD22; /* SHEAD22 */
mbed_official 390:35c2c1cf29cd 81 volatile uint8_t SHEAD23; /* SHEAD23 */
mbed_official 390:35c2c1cf29cd 82 volatile uint8_t SHEAD24; /* SHEAD24 */
mbed_official 390:35c2c1cf29cd 83 volatile uint8_t SHEAD25; /* SHEAD25 */
mbed_official 390:35c2c1cf29cd 84 volatile uint8_t SHEAD26; /* SHEAD26 */
mbed_official 390:35c2c1cf29cd 85 volatile uint8_t SHEAD27; /* SHEAD27 */
mbed_official 390:35c2c1cf29cd 86 volatile uint8_t dummy27[16]; /* */
mbed_official 390:35c2c1cf29cd 87 #define ROMDEC_CBUFCTL0_COUNT 4
mbed_official 390:35c2c1cf29cd 88 volatile uint8_t CBUFCTL0; /* CBUFCTL0 */
mbed_official 390:35c2c1cf29cd 89 volatile uint8_t CBUFCTL1; /* CBUFCTL1 */
mbed_official 390:35c2c1cf29cd 90 volatile uint8_t CBUFCTL2; /* CBUFCTL2 */
mbed_official 390:35c2c1cf29cd 91 volatile uint8_t CBUFCTL3; /* CBUFCTL3 */
mbed_official 390:35c2c1cf29cd 92 volatile uint8_t dummy28[1]; /* */
mbed_official 390:35c2c1cf29cd 93 volatile uint8_t CROMST0M; /* CROMST0M */
mbed_official 390:35c2c1cf29cd 94 volatile uint8_t dummy29[186]; /* */
mbed_official 390:35c2c1cf29cd 95 volatile uint8_t ROMDECRST; /* ROMDECRST */
mbed_official 390:35c2c1cf29cd 96 volatile uint8_t RSTSTAT; /* RSTSTAT */
mbed_official 390:35c2c1cf29cd 97 volatile uint8_t SSI; /* SSI */
mbed_official 390:35c2c1cf29cd 98 volatile uint8_t dummy30[5]; /* */
mbed_official 390:35c2c1cf29cd 99 volatile uint8_t INTHOLD; /* INTHOLD */
mbed_official 390:35c2c1cf29cd 100 volatile uint8_t INHINT; /* INHINT */
mbed_official 390:35c2c1cf29cd 101 volatile uint8_t dummy31[246]; /* */
mbed_official 390:35c2c1cf29cd 102 #define ROMDEC_STRMDIN0_COUNT 2
mbed_official 390:35c2c1cf29cd 103 volatile uint16_t STRMDIN0; /* STRMDIN0 */
mbed_official 390:35c2c1cf29cd 104 volatile uint16_t STRMDIN2; /* STRMDIN2 */
mbed_official 390:35c2c1cf29cd 105 volatile uint16_t STRMDOUT0; /* STRMDOUT0 */
mbed_official 390:35c2c1cf29cd 106 };
mbed_official 390:35c2c1cf29cd 107
mbed_official 390:35c2c1cf29cd 108
mbed_official 390:35c2c1cf29cd 109 #define ROMDEC (*(struct st_romdec *)0xE8005000uL) /* ROMDEC */
mbed_official 390:35c2c1cf29cd 110
mbed_official 390:35c2c1cf29cd 111
mbed_official 390:35c2c1cf29cd 112 #define ROMDECCROMEN ROMDEC.CROMEN
mbed_official 390:35c2c1cf29cd 113 #define ROMDECCROMSY0 ROMDEC.CROMSY0
mbed_official 390:35c2c1cf29cd 114 #define ROMDECCROMCTL0 ROMDEC.CROMCTL0
mbed_official 390:35c2c1cf29cd 115 #define ROMDECCROMCTL1 ROMDEC.CROMCTL1
mbed_official 390:35c2c1cf29cd 116 #define ROMDECCROMCTL3 ROMDEC.CROMCTL3
mbed_official 390:35c2c1cf29cd 117 #define ROMDECCROMCTL4 ROMDEC.CROMCTL4
mbed_official 390:35c2c1cf29cd 118 #define ROMDECCROMCTL5 ROMDEC.CROMCTL5
mbed_official 390:35c2c1cf29cd 119 #define ROMDECCROMST0 ROMDEC.CROMST0
mbed_official 390:35c2c1cf29cd 120 #define ROMDECCROMST1 ROMDEC.CROMST1
mbed_official 390:35c2c1cf29cd 121 #define ROMDECCROMST3 ROMDEC.CROMST3
mbed_official 390:35c2c1cf29cd 122 #define ROMDECCROMST4 ROMDEC.CROMST4
mbed_official 390:35c2c1cf29cd 123 #define ROMDECCROMST5 ROMDEC.CROMST5
mbed_official 390:35c2c1cf29cd 124 #define ROMDECCROMST6 ROMDEC.CROMST6
mbed_official 390:35c2c1cf29cd 125 #define ROMDECCBUFST0 ROMDEC.CBUFST0
mbed_official 390:35c2c1cf29cd 126 #define ROMDECCBUFST1 ROMDEC.CBUFST1
mbed_official 390:35c2c1cf29cd 127 #define ROMDECCBUFST2 ROMDEC.CBUFST2
mbed_official 390:35c2c1cf29cd 128 #define ROMDECHEAD00 ROMDEC.HEAD00
mbed_official 390:35c2c1cf29cd 129 #define ROMDECHEAD01 ROMDEC.HEAD01
mbed_official 390:35c2c1cf29cd 130 #define ROMDECHEAD02 ROMDEC.HEAD02
mbed_official 390:35c2c1cf29cd 131 #define ROMDECHEAD03 ROMDEC.HEAD03
mbed_official 390:35c2c1cf29cd 132 #define ROMDECSHEAD00 ROMDEC.SHEAD00
mbed_official 390:35c2c1cf29cd 133 #define ROMDECSHEAD01 ROMDEC.SHEAD01
mbed_official 390:35c2c1cf29cd 134 #define ROMDECSHEAD02 ROMDEC.SHEAD02
mbed_official 390:35c2c1cf29cd 135 #define ROMDECSHEAD03 ROMDEC.SHEAD03
mbed_official 390:35c2c1cf29cd 136 #define ROMDECSHEAD04 ROMDEC.SHEAD04
mbed_official 390:35c2c1cf29cd 137 #define ROMDECSHEAD05 ROMDEC.SHEAD05
mbed_official 390:35c2c1cf29cd 138 #define ROMDECSHEAD06 ROMDEC.SHEAD06
mbed_official 390:35c2c1cf29cd 139 #define ROMDECSHEAD07 ROMDEC.SHEAD07
mbed_official 390:35c2c1cf29cd 140 #define ROMDECHEAD20 ROMDEC.HEAD20
mbed_official 390:35c2c1cf29cd 141 #define ROMDECHEAD21 ROMDEC.HEAD21
mbed_official 390:35c2c1cf29cd 142 #define ROMDECHEAD22 ROMDEC.HEAD22
mbed_official 390:35c2c1cf29cd 143 #define ROMDECHEAD23 ROMDEC.HEAD23
mbed_official 390:35c2c1cf29cd 144 #define ROMDECSHEAD20 ROMDEC.SHEAD20
mbed_official 390:35c2c1cf29cd 145 #define ROMDECSHEAD21 ROMDEC.SHEAD21
mbed_official 390:35c2c1cf29cd 146 #define ROMDECSHEAD22 ROMDEC.SHEAD22
mbed_official 390:35c2c1cf29cd 147 #define ROMDECSHEAD23 ROMDEC.SHEAD23
mbed_official 390:35c2c1cf29cd 148 #define ROMDECSHEAD24 ROMDEC.SHEAD24
mbed_official 390:35c2c1cf29cd 149 #define ROMDECSHEAD25 ROMDEC.SHEAD25
mbed_official 390:35c2c1cf29cd 150 #define ROMDECSHEAD26 ROMDEC.SHEAD26
mbed_official 390:35c2c1cf29cd 151 #define ROMDECSHEAD27 ROMDEC.SHEAD27
mbed_official 390:35c2c1cf29cd 152 #define ROMDECCBUFCTL0 ROMDEC.CBUFCTL0
mbed_official 390:35c2c1cf29cd 153 #define ROMDECCBUFCTL1 ROMDEC.CBUFCTL1
mbed_official 390:35c2c1cf29cd 154 #define ROMDECCBUFCTL2 ROMDEC.CBUFCTL2
mbed_official 390:35c2c1cf29cd 155 #define ROMDECCBUFCTL3 ROMDEC.CBUFCTL3
mbed_official 390:35c2c1cf29cd 156 #define ROMDECCROMST0M ROMDEC.CROMST0M
mbed_official 390:35c2c1cf29cd 157 #define ROMDECROMDECRST ROMDEC.ROMDECRST
mbed_official 390:35c2c1cf29cd 158 #define ROMDECRSTSTAT ROMDEC.RSTSTAT
mbed_official 390:35c2c1cf29cd 159 #define ROMDECSSI ROMDEC.SSI
mbed_official 390:35c2c1cf29cd 160 #define ROMDECINTHOLD ROMDEC.INTHOLD
mbed_official 390:35c2c1cf29cd 161 #define ROMDECINHINT ROMDEC.INHINT
mbed_official 390:35c2c1cf29cd 162 #define ROMDECSTRMDIN0 ROMDEC.STRMDIN0
mbed_official 390:35c2c1cf29cd 163 #define ROMDECSTRMDIN2 ROMDEC.STRMDIN2
mbed_official 390:35c2c1cf29cd 164 #define ROMDECSTRMDOUT0 ROMDEC.STRMDOUT0
mbed_official 390:35c2c1cf29cd 165 /* <-SEC M1.10.1 */
mbed_official 390:35c2c1cf29cd 166 #endif