mbed library sources for airmote
Fork of mbed-src by
targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/inc/iodefines/ether_iodefine.h@625:88d3fa07e462, 2015-11-24 (annotated)
- Committer:
- zskdan
- Date:
- Tue Nov 24 14:02:46 2015 +0000
- Revision:
- 625:88d3fa07e462
- Parent:
- 390:35c2c1cf29cd
remove unused service
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 390:35c2c1cf29cd | 1 | /******************************************************************************* |
mbed_official | 390:35c2c1cf29cd | 2 | * DISCLAIMER |
mbed_official | 390:35c2c1cf29cd | 3 | * This software is supplied by Renesas Electronics Corporation and is only |
mbed_official | 390:35c2c1cf29cd | 4 | * intended for use with Renesas products. No other uses are authorized. This |
mbed_official | 390:35c2c1cf29cd | 5 | * software is owned by Renesas Electronics Corporation and is protected under |
mbed_official | 390:35c2c1cf29cd | 6 | * all applicable laws, including copyright laws. |
mbed_official | 390:35c2c1cf29cd | 7 | * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING |
mbed_official | 390:35c2c1cf29cd | 8 | * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT |
mbed_official | 390:35c2c1cf29cd | 9 | * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE |
mbed_official | 390:35c2c1cf29cd | 10 | * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. |
mbed_official | 390:35c2c1cf29cd | 11 | * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS |
mbed_official | 390:35c2c1cf29cd | 12 | * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE |
mbed_official | 390:35c2c1cf29cd | 13 | * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR |
mbed_official | 390:35c2c1cf29cd | 14 | * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE |
mbed_official | 390:35c2c1cf29cd | 15 | * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
mbed_official | 390:35c2c1cf29cd | 16 | * Renesas reserves the right, without notice, to make changes to this software |
mbed_official | 390:35c2c1cf29cd | 17 | * and to discontinue the availability of this software. By using this software, |
mbed_official | 390:35c2c1cf29cd | 18 | * you agree to the additional terms and conditions found by accessing the |
mbed_official | 390:35c2c1cf29cd | 19 | * following link: |
mbed_official | 390:35c2c1cf29cd | 20 | * http://www.renesas.com/disclaimer* |
mbed_official | 390:35c2c1cf29cd | 21 | * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved. |
mbed_official | 390:35c2c1cf29cd | 22 | *******************************************************************************/ |
mbed_official | 390:35c2c1cf29cd | 23 | /******************************************************************************* |
mbed_official | 390:35c2c1cf29cd | 24 | * File Name : ether_iodefine.h |
mbed_official | 390:35c2c1cf29cd | 25 | * $Rev: $ |
mbed_official | 390:35c2c1cf29cd | 26 | * $Date:: $ |
mbed_official | 390:35c2c1cf29cd | 27 | * Description : Definition of I/O Register (V1.00a) |
mbed_official | 390:35c2c1cf29cd | 28 | ******************************************************************************/ |
mbed_official | 390:35c2c1cf29cd | 29 | #ifndef ETHER_IODEFINE_H |
mbed_official | 390:35c2c1cf29cd | 30 | #define ETHER_IODEFINE_H |
mbed_official | 390:35c2c1cf29cd | 31 | /* ->QAC 0639 : Over 127 members (C90) */ |
mbed_official | 390:35c2c1cf29cd | 32 | /* ->SEC M1.10.1 : Not magic number */ |
mbed_official | 390:35c2c1cf29cd | 33 | |
mbed_official | 390:35c2c1cf29cd | 34 | struct st_ether |
mbed_official | 390:35c2c1cf29cd | 35 | { /* ETHER */ |
mbed_official | 390:35c2c1cf29cd | 36 | volatile uint32_t EDSR0; /* EDSR0 */ |
mbed_official | 390:35c2c1cf29cd | 37 | volatile uint8_t dummy207[12]; /* */ |
mbed_official | 390:35c2c1cf29cd | 38 | volatile uint32_t TDLAR0; /* TDLAR0 */ |
mbed_official | 390:35c2c1cf29cd | 39 | volatile uint32_t TDFAR0; /* TDFAR0 */ |
mbed_official | 390:35c2c1cf29cd | 40 | volatile uint32_t TDFXR0; /* TDFXR0 */ |
mbed_official | 390:35c2c1cf29cd | 41 | volatile uint32_t TDFFR0; /* TDFFR0 */ |
mbed_official | 390:35c2c1cf29cd | 42 | volatile uint8_t dummy208[16]; /* */ |
mbed_official | 390:35c2c1cf29cd | 43 | volatile uint32_t RDLAR0; /* RDLAR0 */ |
mbed_official | 390:35c2c1cf29cd | 44 | volatile uint32_t RDFAR0; /* RDFAR0 */ |
mbed_official | 390:35c2c1cf29cd | 45 | volatile uint32_t RDFXR0; /* RDFXR0 */ |
mbed_official | 390:35c2c1cf29cd | 46 | volatile uint32_t RDFFR0; /* RDFFR0 */ |
mbed_official | 390:35c2c1cf29cd | 47 | volatile uint8_t dummy209[960]; /* */ |
mbed_official | 390:35c2c1cf29cd | 48 | volatile uint32_t EDMR0; /* EDMR0 */ |
mbed_official | 390:35c2c1cf29cd | 49 | volatile uint8_t dummy210[4]; /* */ |
mbed_official | 390:35c2c1cf29cd | 50 | volatile uint32_t EDTRR0; /* EDTRR0 */ |
mbed_official | 390:35c2c1cf29cd | 51 | volatile uint8_t dummy211[4]; /* */ |
mbed_official | 390:35c2c1cf29cd | 52 | volatile uint32_t EDRRR0; /* EDRRR0 */ |
mbed_official | 390:35c2c1cf29cd | 53 | volatile uint8_t dummy212[20]; /* */ |
mbed_official | 390:35c2c1cf29cd | 54 | volatile uint32_t EESR0; /* EESR0 */ |
mbed_official | 390:35c2c1cf29cd | 55 | volatile uint8_t dummy213[4]; /* */ |
mbed_official | 390:35c2c1cf29cd | 56 | volatile uint32_t EESIPR0; /* EESIPR0 */ |
mbed_official | 390:35c2c1cf29cd | 57 | volatile uint8_t dummy214[4]; /* */ |
mbed_official | 390:35c2c1cf29cd | 58 | volatile uint32_t TRSCER0; /* TRSCER0 */ |
mbed_official | 390:35c2c1cf29cd | 59 | volatile uint8_t dummy215[4]; /* */ |
mbed_official | 390:35c2c1cf29cd | 60 | volatile uint32_t RMFCR0; /* RMFCR0 */ |
mbed_official | 390:35c2c1cf29cd | 61 | volatile uint8_t dummy216[4]; /* */ |
mbed_official | 390:35c2c1cf29cd | 62 | volatile uint32_t TFTR0; /* TFTR0 */ |
mbed_official | 390:35c2c1cf29cd | 63 | volatile uint8_t dummy217[4]; /* */ |
mbed_official | 390:35c2c1cf29cd | 64 | volatile uint32_t FDR0; /* FDR0 */ |
mbed_official | 390:35c2c1cf29cd | 65 | volatile uint8_t dummy218[4]; /* */ |
mbed_official | 390:35c2c1cf29cd | 66 | volatile uint32_t RMCR0; /* RMCR0 */ |
mbed_official | 390:35c2c1cf29cd | 67 | volatile uint8_t dummy219[4]; /* */ |
mbed_official | 390:35c2c1cf29cd | 68 | volatile uint32_t RPADIR0; /* RPADIR0 */ |
mbed_official | 390:35c2c1cf29cd | 69 | volatile uint8_t dummy220[4]; /* */ |
mbed_official | 390:35c2c1cf29cd | 70 | volatile uint32_t FCFTR0; /* FCFTR0 */ |
mbed_official | 390:35c2c1cf29cd | 71 | volatile uint8_t dummy221[120]; /* */ |
mbed_official | 390:35c2c1cf29cd | 72 | volatile uint32_t CSMR; /* CSMR */ |
mbed_official | 390:35c2c1cf29cd | 73 | volatile uint32_t CSSBM; /* CSSBM */ |
mbed_official | 390:35c2c1cf29cd | 74 | volatile uint32_t CSSMR; /* CSSMR */ |
mbed_official | 390:35c2c1cf29cd | 75 | volatile uint8_t dummy222[16]; /* */ |
mbed_official | 390:35c2c1cf29cd | 76 | volatile uint32_t ECMR0; /* ECMR0 */ |
mbed_official | 390:35c2c1cf29cd | 77 | volatile uint8_t dummy223[4]; /* */ |
mbed_official | 390:35c2c1cf29cd | 78 | volatile uint32_t RFLR0; /* RFLR0 */ |
mbed_official | 390:35c2c1cf29cd | 79 | volatile uint8_t dummy224[4]; /* */ |
mbed_official | 390:35c2c1cf29cd | 80 | volatile uint32_t ECSR0; /* ECSR0 */ |
mbed_official | 390:35c2c1cf29cd | 81 | volatile uint8_t dummy225[4]; /* */ |
mbed_official | 390:35c2c1cf29cd | 82 | volatile uint32_t ECSIPR0; /* ECSIPR0 */ |
mbed_official | 390:35c2c1cf29cd | 83 | volatile uint8_t dummy226[4]; /* */ |
mbed_official | 390:35c2c1cf29cd | 84 | volatile uint32_t PIR0; /* PIR0 */ |
mbed_official | 390:35c2c1cf29cd | 85 | volatile uint8_t dummy227[48]; /* */ |
mbed_official | 390:35c2c1cf29cd | 86 | volatile uint32_t APR0; /* APR0 */ |
mbed_official | 390:35c2c1cf29cd | 87 | volatile uint32_t MPR0; /* MPR0 */ |
mbed_official | 390:35c2c1cf29cd | 88 | volatile uint32_t PFTCR0; /* PFTCR0 */ |
mbed_official | 390:35c2c1cf29cd | 89 | volatile uint32_t PFRCR0; /* PFRCR0 */ |
mbed_official | 390:35c2c1cf29cd | 90 | volatile uint32_t TPAUSER0; /* TPAUSER0 */ |
mbed_official | 390:35c2c1cf29cd | 91 | volatile uint8_t dummy228[88]; /* */ |
mbed_official | 390:35c2c1cf29cd | 92 | volatile uint32_t MAHR0; /* MAHR0 */ |
mbed_official | 390:35c2c1cf29cd | 93 | volatile uint8_t dummy229[4]; /* */ |
mbed_official | 390:35c2c1cf29cd | 94 | volatile uint32_t MALR0; /* MALR0 */ |
mbed_official | 390:35c2c1cf29cd | 95 | volatile uint8_t dummy230[372]; /* */ |
mbed_official | 390:35c2c1cf29cd | 96 | volatile uint32_t CEFCR0; /* CEFCR0 */ |
mbed_official | 390:35c2c1cf29cd | 97 | volatile uint8_t dummy231[4]; /* */ |
mbed_official | 390:35c2c1cf29cd | 98 | volatile uint32_t FRECR0; /* FRECR0 */ |
mbed_official | 390:35c2c1cf29cd | 99 | volatile uint8_t dummy232[4]; /* */ |
mbed_official | 390:35c2c1cf29cd | 100 | volatile uint32_t TSFRCR0; /* TSFRCR0 */ |
mbed_official | 390:35c2c1cf29cd | 101 | volatile uint8_t dummy233[4]; /* */ |
mbed_official | 390:35c2c1cf29cd | 102 | volatile uint32_t TLFRCR0; /* TLFRCR0 */ |
mbed_official | 390:35c2c1cf29cd | 103 | volatile uint8_t dummy234[4]; /* */ |
mbed_official | 390:35c2c1cf29cd | 104 | volatile uint32_t RFCR0; /* RFCR0 */ |
mbed_official | 390:35c2c1cf29cd | 105 | volatile uint8_t dummy235[20]; /* */ |
mbed_official | 390:35c2c1cf29cd | 106 | volatile uint32_t MAFCR0; /* MAFCR0 */ |
mbed_official | 390:35c2c1cf29cd | 107 | volatile uint8_t dummy236[4228]; /* */ |
mbed_official | 390:35c2c1cf29cd | 108 | volatile uint32_t ARSTR; /* ARSTR */ |
mbed_official | 390:35c2c1cf29cd | 109 | volatile uint32_t TSU_CTRST; /* TSU_CTRST */ |
mbed_official | 390:35c2c1cf29cd | 110 | volatile uint8_t dummy237[80]; /* */ |
mbed_official | 390:35c2c1cf29cd | 111 | volatile uint32_t TSU_VTAG0; /* TSU_VTAG0 */ |
mbed_official | 390:35c2c1cf29cd | 112 | volatile uint8_t dummy238[4]; /* */ |
mbed_official | 390:35c2c1cf29cd | 113 | volatile uint32_t TSU_ADSBSY; /* TSU_ADSBSY */ |
mbed_official | 390:35c2c1cf29cd | 114 | volatile uint32_t TSU_TEN; /* TSU_TEN */ |
mbed_official | 390:35c2c1cf29cd | 115 | volatile uint8_t dummy239[24]; /* */ |
mbed_official | 390:35c2c1cf29cd | 116 | volatile uint32_t TXNLCR0; /* TXNLCR0 */ |
mbed_official | 390:35c2c1cf29cd | 117 | volatile uint32_t TXALCR0; /* TXALCR0 */ |
mbed_official | 390:35c2c1cf29cd | 118 | volatile uint32_t RXNLCR0; /* RXNLCR0 */ |
mbed_official | 390:35c2c1cf29cd | 119 | volatile uint32_t RXALCR0; /* RXALCR0 */ |
mbed_official | 390:35c2c1cf29cd | 120 | volatile uint8_t dummy240[112]; /* */ |
mbed_official | 390:35c2c1cf29cd | 121 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 122 | volatile uint32_t TSU_ADRH0; /* TSU_ADRH0 */ |
mbed_official | 390:35c2c1cf29cd | 123 | volatile uint32_t TSU_ADRL0; /* TSU_ADRL0 */ |
mbed_official | 390:35c2c1cf29cd | 124 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 125 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 126 | volatile uint32_t TSU_ADRH1; /* TSU_ADRH1 */ |
mbed_official | 390:35c2c1cf29cd | 127 | volatile uint32_t TSU_ADRL1; /* TSU_ADRL1 */ |
mbed_official | 390:35c2c1cf29cd | 128 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 129 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 130 | volatile uint32_t TSU_ADRH2; /* TSU_ADRH2 */ |
mbed_official | 390:35c2c1cf29cd | 131 | volatile uint32_t TSU_ADRL2; /* TSU_ADRL2 */ |
mbed_official | 390:35c2c1cf29cd | 132 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 133 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 134 | volatile uint32_t TSU_ADRH3; /* TSU_ADRH3 */ |
mbed_official | 390:35c2c1cf29cd | 135 | volatile uint32_t TSU_ADRL3; /* TSU_ADRL3 */ |
mbed_official | 390:35c2c1cf29cd | 136 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 137 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 138 | volatile uint32_t TSU_ADRH4; /* TSU_ADRH4 */ |
mbed_official | 390:35c2c1cf29cd | 139 | volatile uint32_t TSU_ADRL4; /* TSU_ADRL4 */ |
mbed_official | 390:35c2c1cf29cd | 140 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 141 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 142 | volatile uint32_t TSU_ADRH5; /* TSU_ADRH5 */ |
mbed_official | 390:35c2c1cf29cd | 143 | volatile uint32_t TSU_ADRL5; /* TSU_ADRL5 */ |
mbed_official | 390:35c2c1cf29cd | 144 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 145 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 146 | volatile uint32_t TSU_ADRH6; /* TSU_ADRH6 */ |
mbed_official | 390:35c2c1cf29cd | 147 | volatile uint32_t TSU_ADRL6; /* TSU_ADRL6 */ |
mbed_official | 390:35c2c1cf29cd | 148 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 149 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 150 | volatile uint32_t TSU_ADRH7; /* TSU_ADRH7 */ |
mbed_official | 390:35c2c1cf29cd | 151 | volatile uint32_t TSU_ADRL7; /* TSU_ADRL7 */ |
mbed_official | 390:35c2c1cf29cd | 152 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 153 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 154 | volatile uint32_t TSU_ADRH8; /* TSU_ADRH8 */ |
mbed_official | 390:35c2c1cf29cd | 155 | volatile uint32_t TSU_ADRL8; /* TSU_ADRL8 */ |
mbed_official | 390:35c2c1cf29cd | 156 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 157 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 158 | volatile uint32_t TSU_ADRH9; /* TSU_ADRH9 */ |
mbed_official | 390:35c2c1cf29cd | 159 | volatile uint32_t TSU_ADRL9; /* TSU_ADRL9 */ |
mbed_official | 390:35c2c1cf29cd | 160 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 161 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 162 | volatile uint32_t TSU_ADRH10; /* TSU_ADRH10 */ |
mbed_official | 390:35c2c1cf29cd | 163 | volatile uint32_t TSU_ADRL10; /* TSU_ADRL10 */ |
mbed_official | 390:35c2c1cf29cd | 164 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 165 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 166 | volatile uint32_t TSU_ADRH11; /* TSU_ADRH11 */ |
mbed_official | 390:35c2c1cf29cd | 167 | volatile uint32_t TSU_ADRL11; /* TSU_ADRL11 */ |
mbed_official | 390:35c2c1cf29cd | 168 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 169 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 170 | volatile uint32_t TSU_ADRH12; /* TSU_ADRH12 */ |
mbed_official | 390:35c2c1cf29cd | 171 | volatile uint32_t TSU_ADRL12; /* TSU_ADRL12 */ |
mbed_official | 390:35c2c1cf29cd | 172 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 173 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 174 | volatile uint32_t TSU_ADRH13; /* TSU_ADRH13 */ |
mbed_official | 390:35c2c1cf29cd | 175 | volatile uint32_t TSU_ADRL13; /* TSU_ADRL13 */ |
mbed_official | 390:35c2c1cf29cd | 176 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 177 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 178 | volatile uint32_t TSU_ADRH14; /* TSU_ADRH14 */ |
mbed_official | 390:35c2c1cf29cd | 179 | volatile uint32_t TSU_ADRL14; /* TSU_ADRL14 */ |
mbed_official | 390:35c2c1cf29cd | 180 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 181 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 182 | volatile uint32_t TSU_ADRH15; /* TSU_ADRH15 */ |
mbed_official | 390:35c2c1cf29cd | 183 | volatile uint32_t TSU_ADRL15; /* TSU_ADRL15 */ |
mbed_official | 390:35c2c1cf29cd | 184 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 185 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 186 | volatile uint32_t TSU_ADRH16; /* TSU_ADRH16 */ |
mbed_official | 390:35c2c1cf29cd | 187 | volatile uint32_t TSU_ADRL16; /* TSU_ADRL16 */ |
mbed_official | 390:35c2c1cf29cd | 188 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 189 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 190 | volatile uint32_t TSU_ADRH17; /* TSU_ADRH17 */ |
mbed_official | 390:35c2c1cf29cd | 191 | volatile uint32_t TSU_ADRL17; /* TSU_ADRL17 */ |
mbed_official | 390:35c2c1cf29cd | 192 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 193 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 194 | volatile uint32_t TSU_ADRH18; /* TSU_ADRH18 */ |
mbed_official | 390:35c2c1cf29cd | 195 | volatile uint32_t TSU_ADRL18; /* TSU_ADRL18 */ |
mbed_official | 390:35c2c1cf29cd | 196 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 197 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 198 | volatile uint32_t TSU_ADRH19; /* TSU_ADRH19 */ |
mbed_official | 390:35c2c1cf29cd | 199 | volatile uint32_t TSU_ADRL19; /* TSU_ADRL19 */ |
mbed_official | 390:35c2c1cf29cd | 200 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 201 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 202 | volatile uint32_t TSU_ADRH20; /* TSU_ADRH20 */ |
mbed_official | 390:35c2c1cf29cd | 203 | volatile uint32_t TSU_ADRL20; /* TSU_ADRL20 */ |
mbed_official | 390:35c2c1cf29cd | 204 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 205 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 206 | volatile uint32_t TSU_ADRH21; /* TSU_ADRH21 */ |
mbed_official | 390:35c2c1cf29cd | 207 | volatile uint32_t TSU_ADRL21; /* TSU_ADRL21 */ |
mbed_official | 390:35c2c1cf29cd | 208 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 209 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 210 | volatile uint32_t TSU_ADRH22; /* TSU_ADRH22 */ |
mbed_official | 390:35c2c1cf29cd | 211 | volatile uint32_t TSU_ADRL22; /* TSU_ADRL22 */ |
mbed_official | 390:35c2c1cf29cd | 212 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 213 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 214 | volatile uint32_t TSU_ADRH23; /* TSU_ADRH23 */ |
mbed_official | 390:35c2c1cf29cd | 215 | volatile uint32_t TSU_ADRL23; /* TSU_ADRL23 */ |
mbed_official | 390:35c2c1cf29cd | 216 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 217 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 218 | volatile uint32_t TSU_ADRH24; /* TSU_ADRH24 */ |
mbed_official | 390:35c2c1cf29cd | 219 | volatile uint32_t TSU_ADRL24; /* TSU_ADRL24 */ |
mbed_official | 390:35c2c1cf29cd | 220 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 221 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 222 | volatile uint32_t TSU_ADRH25; /* TSU_ADRH25 */ |
mbed_official | 390:35c2c1cf29cd | 223 | volatile uint32_t TSU_ADRL25; /* TSU_ADRL25 */ |
mbed_official | 390:35c2c1cf29cd | 224 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 225 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 226 | volatile uint32_t TSU_ADRH26; /* TSU_ADRH26 */ |
mbed_official | 390:35c2c1cf29cd | 227 | volatile uint32_t TSU_ADRL26; /* TSU_ADRL26 */ |
mbed_official | 390:35c2c1cf29cd | 228 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 229 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 230 | volatile uint32_t TSU_ADRH27; /* TSU_ADRH27 */ |
mbed_official | 390:35c2c1cf29cd | 231 | volatile uint32_t TSU_ADRL27; /* TSU_ADRL27 */ |
mbed_official | 390:35c2c1cf29cd | 232 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 233 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 234 | volatile uint32_t TSU_ADRH28; /* TSU_ADRH28 */ |
mbed_official | 390:35c2c1cf29cd | 235 | volatile uint32_t TSU_ADRL28; /* TSU_ADRL28 */ |
mbed_official | 390:35c2c1cf29cd | 236 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 237 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 238 | volatile uint32_t TSU_ADRH29; /* TSU_ADRH29 */ |
mbed_official | 390:35c2c1cf29cd | 239 | volatile uint32_t TSU_ADRL29; /* TSU_ADRL29 */ |
mbed_official | 390:35c2c1cf29cd | 240 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 241 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 242 | volatile uint32_t TSU_ADRH30; /* TSU_ADRH30 */ |
mbed_official | 390:35c2c1cf29cd | 243 | volatile uint32_t TSU_ADRL30; /* TSU_ADRL30 */ |
mbed_official | 390:35c2c1cf29cd | 244 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 245 | /* start of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 246 | volatile uint32_t TSU_ADRH31; /* TSU_ADRH31 */ |
mbed_official | 390:35c2c1cf29cd | 247 | volatile uint32_t TSU_ADRL31; /* TSU_ADRL31 */ |
mbed_official | 390:35c2c1cf29cd | 248 | /* end of struct st_ether_from_tsu_adrh0 */ |
mbed_official | 390:35c2c1cf29cd | 249 | }; |
mbed_official | 390:35c2c1cf29cd | 250 | |
mbed_official | 390:35c2c1cf29cd | 251 | |
mbed_official | 390:35c2c1cf29cd | 252 | struct st_ether_from_tsu_adrh0 |
mbed_official | 390:35c2c1cf29cd | 253 | { |
mbed_official | 390:35c2c1cf29cd | 254 | volatile uint32_t TSU_ADRH0; /* TSU_ADRH0 */ |
mbed_official | 390:35c2c1cf29cd | 255 | volatile uint32_t TSU_ADRL0; /* TSU_ADRL0 */ |
mbed_official | 390:35c2c1cf29cd | 256 | }; |
mbed_official | 390:35c2c1cf29cd | 257 | |
mbed_official | 390:35c2c1cf29cd | 258 | |
mbed_official | 390:35c2c1cf29cd | 259 | #define ETHER (*(struct st_ether *)0xE8203000uL) /* ETHER */ |
mbed_official | 390:35c2c1cf29cd | 260 | |
mbed_official | 390:35c2c1cf29cd | 261 | |
mbed_official | 390:35c2c1cf29cd | 262 | /* Start of channnel array defines of ETHER */ |
mbed_official | 390:35c2c1cf29cd | 263 | |
mbed_official | 390:35c2c1cf29cd | 264 | /* Channnel array defines of ETHER_FROM_TSU_ADRH0_ARRAY */ |
mbed_official | 390:35c2c1cf29cd | 265 | /*(Sample) value = ETHER_FROM_TSU_ADRH0_ARRAY[ channel ]->TSU_ADRH0; */ |
mbed_official | 390:35c2c1cf29cd | 266 | #define ETHER_FROM_TSU_ADRH0_ARRAY_COUNT 32 |
mbed_official | 390:35c2c1cf29cd | 267 | #define ETHER_FROM_TSU_ADRH0_ARRAY_ADDRESS_LIST \ |
mbed_official | 390:35c2c1cf29cd | 268 | { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \ |
mbed_official | 390:35c2c1cf29cd | 269 | ÐER_FROM_TSU_ADRH0, ÐER_FROM_TSU_ADRH1, ÐER_FROM_TSU_ADRH2, ÐER_FROM_TSU_ADRH3, ÐER_FROM_TSU_ADRH4, ÐER_FROM_TSU_ADRH5, ÐER_FROM_TSU_ADRH6, ÐER_FROM_TSU_ADRH7, \ |
mbed_official | 390:35c2c1cf29cd | 270 | ÐER_FROM_TSU_ADRH8, ÐER_FROM_TSU_ADRH9, ÐER_FROM_TSU_ADRH10, ÐER_FROM_TSU_ADRH11, ÐER_FROM_TSU_ADRH12, ÐER_FROM_TSU_ADRH13, ÐER_FROM_TSU_ADRH14, ÐER_FROM_TSU_ADRH15, \ |
mbed_official | 390:35c2c1cf29cd | 271 | ÐER_FROM_TSU_ADRH16, ÐER_FROM_TSU_ADRH17, ÐER_FROM_TSU_ADRH18, ÐER_FROM_TSU_ADRH19, ÐER_FROM_TSU_ADRH20, ÐER_FROM_TSU_ADRH21, ÐER_FROM_TSU_ADRH22, ÐER_FROM_TSU_ADRH23, \ |
mbed_official | 390:35c2c1cf29cd | 272 | ÐER_FROM_TSU_ADRH24, ÐER_FROM_TSU_ADRH25, ÐER_FROM_TSU_ADRH26, ÐER_FROM_TSU_ADRH27, ÐER_FROM_TSU_ADRH28, ÐER_FROM_TSU_ADRH29, ÐER_FROM_TSU_ADRH30, ÐER_FROM_TSU_ADRH31 \ |
mbed_official | 390:35c2c1cf29cd | 273 | } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */ |
mbed_official | 390:35c2c1cf29cd | 274 | #define ETHER_FROM_TSU_ADRH0 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH0) /* ETHER_FROM_TSU_ADRH0 */ |
mbed_official | 390:35c2c1cf29cd | 275 | #define ETHER_FROM_TSU_ADRH1 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH1) /* ETHER_FROM_TSU_ADRH1 */ |
mbed_official | 390:35c2c1cf29cd | 276 | #define ETHER_FROM_TSU_ADRH2 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH2) /* ETHER_FROM_TSU_ADRH2 */ |
mbed_official | 390:35c2c1cf29cd | 277 | #define ETHER_FROM_TSU_ADRH3 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH3) /* ETHER_FROM_TSU_ADRH3 */ |
mbed_official | 390:35c2c1cf29cd | 278 | #define ETHER_FROM_TSU_ADRH4 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH4) /* ETHER_FROM_TSU_ADRH4 */ |
mbed_official | 390:35c2c1cf29cd | 279 | #define ETHER_FROM_TSU_ADRH5 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH5) /* ETHER_FROM_TSU_ADRH5 */ |
mbed_official | 390:35c2c1cf29cd | 280 | #define ETHER_FROM_TSU_ADRH6 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH6) /* ETHER_FROM_TSU_ADRH6 */ |
mbed_official | 390:35c2c1cf29cd | 281 | #define ETHER_FROM_TSU_ADRH7 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH7) /* ETHER_FROM_TSU_ADRH7 */ |
mbed_official | 390:35c2c1cf29cd | 282 | #define ETHER_FROM_TSU_ADRH8 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH8) /* ETHER_FROM_TSU_ADRH8 */ |
mbed_official | 390:35c2c1cf29cd | 283 | #define ETHER_FROM_TSU_ADRH9 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH9) /* ETHER_FROM_TSU_ADRH9 */ |
mbed_official | 390:35c2c1cf29cd | 284 | #define ETHER_FROM_TSU_ADRH10 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH10) /* ETHER_FROM_TSU_ADRH10 */ |
mbed_official | 390:35c2c1cf29cd | 285 | #define ETHER_FROM_TSU_ADRH11 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH11) /* ETHER_FROM_TSU_ADRH11 */ |
mbed_official | 390:35c2c1cf29cd | 286 | #define ETHER_FROM_TSU_ADRH12 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH12) /* ETHER_FROM_TSU_ADRH12 */ |
mbed_official | 390:35c2c1cf29cd | 287 | #define ETHER_FROM_TSU_ADRH13 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH13) /* ETHER_FROM_TSU_ADRH13 */ |
mbed_official | 390:35c2c1cf29cd | 288 | #define ETHER_FROM_TSU_ADRH14 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH14) /* ETHER_FROM_TSU_ADRH14 */ |
mbed_official | 390:35c2c1cf29cd | 289 | #define ETHER_FROM_TSU_ADRH15 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH15) /* ETHER_FROM_TSU_ADRH15 */ |
mbed_official | 390:35c2c1cf29cd | 290 | #define ETHER_FROM_TSU_ADRH16 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH16) /* ETHER_FROM_TSU_ADRH16 */ |
mbed_official | 390:35c2c1cf29cd | 291 | #define ETHER_FROM_TSU_ADRH17 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH17) /* ETHER_FROM_TSU_ADRH17 */ |
mbed_official | 390:35c2c1cf29cd | 292 | #define ETHER_FROM_TSU_ADRH18 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH18) /* ETHER_FROM_TSU_ADRH18 */ |
mbed_official | 390:35c2c1cf29cd | 293 | #define ETHER_FROM_TSU_ADRH19 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH19) /* ETHER_FROM_TSU_ADRH19 */ |
mbed_official | 390:35c2c1cf29cd | 294 | #define ETHER_FROM_TSU_ADRH20 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH20) /* ETHER_FROM_TSU_ADRH20 */ |
mbed_official | 390:35c2c1cf29cd | 295 | #define ETHER_FROM_TSU_ADRH21 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH21) /* ETHER_FROM_TSU_ADRH21 */ |
mbed_official | 390:35c2c1cf29cd | 296 | #define ETHER_FROM_TSU_ADRH22 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH22) /* ETHER_FROM_TSU_ADRH22 */ |
mbed_official | 390:35c2c1cf29cd | 297 | #define ETHER_FROM_TSU_ADRH23 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH23) /* ETHER_FROM_TSU_ADRH23 */ |
mbed_official | 390:35c2c1cf29cd | 298 | #define ETHER_FROM_TSU_ADRH24 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH24) /* ETHER_FROM_TSU_ADRH24 */ |
mbed_official | 390:35c2c1cf29cd | 299 | #define ETHER_FROM_TSU_ADRH25 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH25) /* ETHER_FROM_TSU_ADRH25 */ |
mbed_official | 390:35c2c1cf29cd | 300 | #define ETHER_FROM_TSU_ADRH26 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH26) /* ETHER_FROM_TSU_ADRH26 */ |
mbed_official | 390:35c2c1cf29cd | 301 | #define ETHER_FROM_TSU_ADRH27 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH27) /* ETHER_FROM_TSU_ADRH27 */ |
mbed_official | 390:35c2c1cf29cd | 302 | #define ETHER_FROM_TSU_ADRH28 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH28) /* ETHER_FROM_TSU_ADRH28 */ |
mbed_official | 390:35c2c1cf29cd | 303 | #define ETHER_FROM_TSU_ADRH29 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH29) /* ETHER_FROM_TSU_ADRH29 */ |
mbed_official | 390:35c2c1cf29cd | 304 | #define ETHER_FROM_TSU_ADRH30 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH30) /* ETHER_FROM_TSU_ADRH30 */ |
mbed_official | 390:35c2c1cf29cd | 305 | #define ETHER_FROM_TSU_ADRH31 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH31) /* ETHER_FROM_TSU_ADRH31 */ |
mbed_official | 390:35c2c1cf29cd | 306 | |
mbed_official | 390:35c2c1cf29cd | 307 | /* End of channnel array defines of ETHER */ |
mbed_official | 390:35c2c1cf29cd | 308 | |
mbed_official | 390:35c2c1cf29cd | 309 | |
mbed_official | 390:35c2c1cf29cd | 310 | #define ETHEREDSR0 ETHER.EDSR0 |
mbed_official | 390:35c2c1cf29cd | 311 | #define ETHERTDLAR0 ETHER.TDLAR0 |
mbed_official | 390:35c2c1cf29cd | 312 | #define ETHERTDFAR0 ETHER.TDFAR0 |
mbed_official | 390:35c2c1cf29cd | 313 | #define ETHERTDFXR0 ETHER.TDFXR0 |
mbed_official | 390:35c2c1cf29cd | 314 | #define ETHERTDFFR0 ETHER.TDFFR0 |
mbed_official | 390:35c2c1cf29cd | 315 | #define ETHERRDLAR0 ETHER.RDLAR0 |
mbed_official | 390:35c2c1cf29cd | 316 | #define ETHERRDFAR0 ETHER.RDFAR0 |
mbed_official | 390:35c2c1cf29cd | 317 | #define ETHERRDFXR0 ETHER.RDFXR0 |
mbed_official | 390:35c2c1cf29cd | 318 | #define ETHERRDFFR0 ETHER.RDFFR0 |
mbed_official | 390:35c2c1cf29cd | 319 | #define ETHEREDMR0 ETHER.EDMR0 |
mbed_official | 390:35c2c1cf29cd | 320 | #define ETHEREDTRR0 ETHER.EDTRR0 |
mbed_official | 390:35c2c1cf29cd | 321 | #define ETHEREDRRR0 ETHER.EDRRR0 |
mbed_official | 390:35c2c1cf29cd | 322 | #define ETHEREESR0 ETHER.EESR0 |
mbed_official | 390:35c2c1cf29cd | 323 | #define ETHEREESIPR0 ETHER.EESIPR0 |
mbed_official | 390:35c2c1cf29cd | 324 | #define ETHERTRSCER0 ETHER.TRSCER0 |
mbed_official | 390:35c2c1cf29cd | 325 | #define ETHERRMFCR0 ETHER.RMFCR0 |
mbed_official | 390:35c2c1cf29cd | 326 | #define ETHERTFTR0 ETHER.TFTR0 |
mbed_official | 390:35c2c1cf29cd | 327 | #define ETHERFDR0 ETHER.FDR0 |
mbed_official | 390:35c2c1cf29cd | 328 | #define ETHERRMCR0 ETHER.RMCR0 |
mbed_official | 390:35c2c1cf29cd | 329 | #define ETHERRPADIR0 ETHER.RPADIR0 |
mbed_official | 390:35c2c1cf29cd | 330 | #define ETHERFCFTR0 ETHER.FCFTR0 |
mbed_official | 390:35c2c1cf29cd | 331 | #define ETHERCSMR ETHER.CSMR |
mbed_official | 390:35c2c1cf29cd | 332 | #define ETHERCSSBM ETHER.CSSBM |
mbed_official | 390:35c2c1cf29cd | 333 | #define ETHERCSSMR ETHER.CSSMR |
mbed_official | 390:35c2c1cf29cd | 334 | #define ETHERECMR0 ETHER.ECMR0 |
mbed_official | 390:35c2c1cf29cd | 335 | #define ETHERRFLR0 ETHER.RFLR0 |
mbed_official | 390:35c2c1cf29cd | 336 | #define ETHERECSR0 ETHER.ECSR0 |
mbed_official | 390:35c2c1cf29cd | 337 | #define ETHERECSIPR0 ETHER.ECSIPR0 |
mbed_official | 390:35c2c1cf29cd | 338 | #define ETHERPIR0 ETHER.PIR0 |
mbed_official | 390:35c2c1cf29cd | 339 | #define ETHERAPR0 ETHER.APR0 |
mbed_official | 390:35c2c1cf29cd | 340 | #define ETHERMPR0 ETHER.MPR0 |
mbed_official | 390:35c2c1cf29cd | 341 | #define ETHERPFTCR0 ETHER.PFTCR0 |
mbed_official | 390:35c2c1cf29cd | 342 | #define ETHERPFRCR0 ETHER.PFRCR0 |
mbed_official | 390:35c2c1cf29cd | 343 | #define ETHERTPAUSER0 ETHER.TPAUSER0 |
mbed_official | 390:35c2c1cf29cd | 344 | #define ETHERMAHR0 ETHER.MAHR0 |
mbed_official | 390:35c2c1cf29cd | 345 | #define ETHERMALR0 ETHER.MALR0 |
mbed_official | 390:35c2c1cf29cd | 346 | #define ETHERCEFCR0 ETHER.CEFCR0 |
mbed_official | 390:35c2c1cf29cd | 347 | #define ETHERFRECR0 ETHER.FRECR0 |
mbed_official | 390:35c2c1cf29cd | 348 | #define ETHERTSFRCR0 ETHER.TSFRCR0 |
mbed_official | 390:35c2c1cf29cd | 349 | #define ETHERTLFRCR0 ETHER.TLFRCR0 |
mbed_official | 390:35c2c1cf29cd | 350 | #define ETHERRFCR0 ETHER.RFCR0 |
mbed_official | 390:35c2c1cf29cd | 351 | #define ETHERMAFCR0 ETHER.MAFCR0 |
mbed_official | 390:35c2c1cf29cd | 352 | #define ETHERARSTR ETHER.ARSTR |
mbed_official | 390:35c2c1cf29cd | 353 | #define ETHERTSU_CTRST ETHER.TSU_CTRST |
mbed_official | 390:35c2c1cf29cd | 354 | #define ETHERTSU_VTAG0 ETHER.TSU_VTAG0 |
mbed_official | 390:35c2c1cf29cd | 355 | #define ETHERTSU_ADSBSY ETHER.TSU_ADSBSY |
mbed_official | 390:35c2c1cf29cd | 356 | #define ETHERTSU_TEN ETHER.TSU_TEN |
mbed_official | 390:35c2c1cf29cd | 357 | #define ETHERTXNLCR0 ETHER.TXNLCR0 |
mbed_official | 390:35c2c1cf29cd | 358 | #define ETHERTXALCR0 ETHER.TXALCR0 |
mbed_official | 390:35c2c1cf29cd | 359 | #define ETHERRXNLCR0 ETHER.RXNLCR0 |
mbed_official | 390:35c2c1cf29cd | 360 | #define ETHERRXALCR0 ETHER.RXALCR0 |
mbed_official | 390:35c2c1cf29cd | 361 | #define ETHERTSU_ADRH0 ETHER.TSU_ADRH0 |
mbed_official | 390:35c2c1cf29cd | 362 | #define ETHERTSU_ADRL0 ETHER.TSU_ADRL0 |
mbed_official | 390:35c2c1cf29cd | 363 | #define ETHERTSU_ADRH1 ETHER.TSU_ADRH1 |
mbed_official | 390:35c2c1cf29cd | 364 | #define ETHERTSU_ADRL1 ETHER.TSU_ADRL1 |
mbed_official | 390:35c2c1cf29cd | 365 | #define ETHERTSU_ADRH2 ETHER.TSU_ADRH2 |
mbed_official | 390:35c2c1cf29cd | 366 | #define ETHERTSU_ADRL2 ETHER.TSU_ADRL2 |
mbed_official | 390:35c2c1cf29cd | 367 | #define ETHERTSU_ADRH3 ETHER.TSU_ADRH3 |
mbed_official | 390:35c2c1cf29cd | 368 | #define ETHERTSU_ADRL3 ETHER.TSU_ADRL3 |
mbed_official | 390:35c2c1cf29cd | 369 | #define ETHERTSU_ADRH4 ETHER.TSU_ADRH4 |
mbed_official | 390:35c2c1cf29cd | 370 | #define ETHERTSU_ADRL4 ETHER.TSU_ADRL4 |
mbed_official | 390:35c2c1cf29cd | 371 | #define ETHERTSU_ADRH5 ETHER.TSU_ADRH5 |
mbed_official | 390:35c2c1cf29cd | 372 | #define ETHERTSU_ADRL5 ETHER.TSU_ADRL5 |
mbed_official | 390:35c2c1cf29cd | 373 | #define ETHERTSU_ADRH6 ETHER.TSU_ADRH6 |
mbed_official | 390:35c2c1cf29cd | 374 | #define ETHERTSU_ADRL6 ETHER.TSU_ADRL6 |
mbed_official | 390:35c2c1cf29cd | 375 | #define ETHERTSU_ADRH7 ETHER.TSU_ADRH7 |
mbed_official | 390:35c2c1cf29cd | 376 | #define ETHERTSU_ADRL7 ETHER.TSU_ADRL7 |
mbed_official | 390:35c2c1cf29cd | 377 | #define ETHERTSU_ADRH8 ETHER.TSU_ADRH8 |
mbed_official | 390:35c2c1cf29cd | 378 | #define ETHERTSU_ADRL8 ETHER.TSU_ADRL8 |
mbed_official | 390:35c2c1cf29cd | 379 | #define ETHERTSU_ADRH9 ETHER.TSU_ADRH9 |
mbed_official | 390:35c2c1cf29cd | 380 | #define ETHERTSU_ADRL9 ETHER.TSU_ADRL9 |
mbed_official | 390:35c2c1cf29cd | 381 | #define ETHERTSU_ADRH10 ETHER.TSU_ADRH10 |
mbed_official | 390:35c2c1cf29cd | 382 | #define ETHERTSU_ADRL10 ETHER.TSU_ADRL10 |
mbed_official | 390:35c2c1cf29cd | 383 | #define ETHERTSU_ADRH11 ETHER.TSU_ADRH11 |
mbed_official | 390:35c2c1cf29cd | 384 | #define ETHERTSU_ADRL11 ETHER.TSU_ADRL11 |
mbed_official | 390:35c2c1cf29cd | 385 | #define ETHERTSU_ADRH12 ETHER.TSU_ADRH12 |
mbed_official | 390:35c2c1cf29cd | 386 | #define ETHERTSU_ADRL12 ETHER.TSU_ADRL12 |
mbed_official | 390:35c2c1cf29cd | 387 | #define ETHERTSU_ADRH13 ETHER.TSU_ADRH13 |
mbed_official | 390:35c2c1cf29cd | 388 | #define ETHERTSU_ADRL13 ETHER.TSU_ADRL13 |
mbed_official | 390:35c2c1cf29cd | 389 | #define ETHERTSU_ADRH14 ETHER.TSU_ADRH14 |
mbed_official | 390:35c2c1cf29cd | 390 | #define ETHERTSU_ADRL14 ETHER.TSU_ADRL14 |
mbed_official | 390:35c2c1cf29cd | 391 | #define ETHERTSU_ADRH15 ETHER.TSU_ADRH15 |
mbed_official | 390:35c2c1cf29cd | 392 | #define ETHERTSU_ADRL15 ETHER.TSU_ADRL15 |
mbed_official | 390:35c2c1cf29cd | 393 | #define ETHERTSU_ADRH16 ETHER.TSU_ADRH16 |
mbed_official | 390:35c2c1cf29cd | 394 | #define ETHERTSU_ADRL16 ETHER.TSU_ADRL16 |
mbed_official | 390:35c2c1cf29cd | 395 | #define ETHERTSU_ADRH17 ETHER.TSU_ADRH17 |
mbed_official | 390:35c2c1cf29cd | 396 | #define ETHERTSU_ADRL17 ETHER.TSU_ADRL17 |
mbed_official | 390:35c2c1cf29cd | 397 | #define ETHERTSU_ADRH18 ETHER.TSU_ADRH18 |
mbed_official | 390:35c2c1cf29cd | 398 | #define ETHERTSU_ADRL18 ETHER.TSU_ADRL18 |
mbed_official | 390:35c2c1cf29cd | 399 | #define ETHERTSU_ADRH19 ETHER.TSU_ADRH19 |
mbed_official | 390:35c2c1cf29cd | 400 | #define ETHERTSU_ADRL19 ETHER.TSU_ADRL19 |
mbed_official | 390:35c2c1cf29cd | 401 | #define ETHERTSU_ADRH20 ETHER.TSU_ADRH20 |
mbed_official | 390:35c2c1cf29cd | 402 | #define ETHERTSU_ADRL20 ETHER.TSU_ADRL20 |
mbed_official | 390:35c2c1cf29cd | 403 | #define ETHERTSU_ADRH21 ETHER.TSU_ADRH21 |
mbed_official | 390:35c2c1cf29cd | 404 | #define ETHERTSU_ADRL21 ETHER.TSU_ADRL21 |
mbed_official | 390:35c2c1cf29cd | 405 | #define ETHERTSU_ADRH22 ETHER.TSU_ADRH22 |
mbed_official | 390:35c2c1cf29cd | 406 | #define ETHERTSU_ADRL22 ETHER.TSU_ADRL22 |
mbed_official | 390:35c2c1cf29cd | 407 | #define ETHERTSU_ADRH23 ETHER.TSU_ADRH23 |
mbed_official | 390:35c2c1cf29cd | 408 | #define ETHERTSU_ADRL23 ETHER.TSU_ADRL23 |
mbed_official | 390:35c2c1cf29cd | 409 | #define ETHERTSU_ADRH24 ETHER.TSU_ADRH24 |
mbed_official | 390:35c2c1cf29cd | 410 | #define ETHERTSU_ADRL24 ETHER.TSU_ADRL24 |
mbed_official | 390:35c2c1cf29cd | 411 | #define ETHERTSU_ADRH25 ETHER.TSU_ADRH25 |
mbed_official | 390:35c2c1cf29cd | 412 | #define ETHERTSU_ADRL25 ETHER.TSU_ADRL25 |
mbed_official | 390:35c2c1cf29cd | 413 | #define ETHERTSU_ADRH26 ETHER.TSU_ADRH26 |
mbed_official | 390:35c2c1cf29cd | 414 | #define ETHERTSU_ADRL26 ETHER.TSU_ADRL26 |
mbed_official | 390:35c2c1cf29cd | 415 | #define ETHERTSU_ADRH27 ETHER.TSU_ADRH27 |
mbed_official | 390:35c2c1cf29cd | 416 | #define ETHERTSU_ADRL27 ETHER.TSU_ADRL27 |
mbed_official | 390:35c2c1cf29cd | 417 | #define ETHERTSU_ADRH28 ETHER.TSU_ADRH28 |
mbed_official | 390:35c2c1cf29cd | 418 | #define ETHERTSU_ADRL28 ETHER.TSU_ADRL28 |
mbed_official | 390:35c2c1cf29cd | 419 | #define ETHERTSU_ADRH29 ETHER.TSU_ADRH29 |
mbed_official | 390:35c2c1cf29cd | 420 | #define ETHERTSU_ADRL29 ETHER.TSU_ADRL29 |
mbed_official | 390:35c2c1cf29cd | 421 | #define ETHERTSU_ADRH30 ETHER.TSU_ADRH30 |
mbed_official | 390:35c2c1cf29cd | 422 | #define ETHERTSU_ADRL30 ETHER.TSU_ADRL30 |
mbed_official | 390:35c2c1cf29cd | 423 | #define ETHERTSU_ADRH31 ETHER.TSU_ADRH31 |
mbed_official | 390:35c2c1cf29cd | 424 | #define ETHERTSU_ADRL31 ETHER.TSU_ADRL31 |
mbed_official | 390:35c2c1cf29cd | 425 | /* <-SEC M1.10.1 */ |
mbed_official | 390:35c2c1cf29cd | 426 | /* <-QAC 0639 */ |
mbed_official | 390:35c2c1cf29cd | 427 | #endif |